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| author | crgeddes <crgeddes@us.ibm.com> | 2017-04-11 07:59:21 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-04-17 23:13:56 -0400 |
| commit | 670d2aeb447d1dd6092d571d2f42a7acd08bd4b5 (patch) | |
| tree | 2f77536d81c233e4b47c27db8bf4e8772581466b /src/usr/isteps | |
| parent | 4bf5f4034a4381599a47cc3873af81b27653f957 (diff) | |
| download | talos-hostboot-670d2aeb447d1dd6092d571d2f42a7acd08bd4b5.tar.gz talos-hostboot-670d2aeb447d1dd6092d571d2f42a7acd08bd4b5.zip | |
Improve mpipl workaround setting WAKEUP_SELECT bit
Previously the workaround was depending on the master core being
first in the list of returned targets. This is usually what happens
but technically we cannot rely on that.
Change-Id: I291bbcc406afaa1d0f40c7a65a93d2b47993c072
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39093
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr/isteps')
| -rw-r--r-- | src/usr/isteps/istep06/host_discover_targets.C | 27 |
1 files changed, 16 insertions, 11 deletions
diff --git a/src/usr/isteps/istep06/host_discover_targets.C b/src/usr/isteps/istep06/host_discover_targets.C index ee3594af9..f551b3659 100644 --- a/src/usr/isteps/istep06/host_discover_targets.C +++ b/src/usr/isteps/istep06/host_discover_targets.C @@ -313,19 +313,24 @@ errlHndl_t powerDownSlaveQuads() //TODO 171763 Core state setup for MPIPL should be done in a HWP //Set WKUP_SELECT bit on slave cores - for(uint8_t x = 1; x < (l_coreTargetList.size()) ; x++) + for(const auto & l_core_target : l_coreTargetList) { - //Set WKUP_SELECT bit on non-master cores that are on - // the master quad - l_err = deviceWrite(l_coreTargetList[x], - &SET_WKUP_SELECT_MASK, - MASK_SIZE, - DEVICE_SCOM_ADDRESS(CPPM_CORE_POWMAN_MODE_REG)); - if(l_err) + TARGETING::ATTR_CHIP_UNIT_type l_core_id = l_core_target->getAttr<TARGETING::ATTR_CHIP_UNIT>(); + + if(l_core_id != l_masterCoreId) { - TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, - "Error setting WKUP_SELECT bit of CPPM_CORE_REG on core %d", l_coreTargetList[x]->getAttr<TARGETING::ATTR_CHIP_UNIT>()); - break; + + //Set WKUP_SELECT bit on all slave cores on master EQ + l_err = deviceWrite(l_core_target, + &SET_WKUP_SELECT_MASK, + MASK_SIZE, + DEVICE_SCOM_ADDRESS(CPPM_CORE_POWMAN_MODE_REG)); + if(l_err) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "Error setting WKUP_SELECT bit of CPPM_CORE_REG on core %d", l_core_id); + break; + } } } |
