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authorDan Crowell <dcrowell@us.ibm.com>2018-06-18 13:22:54 -0500
committerNicholas E. Bofferding <bofferdn@us.ibm.com>2018-06-20 01:38:19 -0400
commit3eddb7eaa9945ec30d8777b9c8872fcfd8280e57 (patch)
tree66086e6c795859c8c8b806ea856c532b29daf8e8 /src/usr/isteps
parented7254aed9caeb0dddb49de92b8f161c2d4227dc (diff)
downloadtalos-hostboot-3eddb7eaa9945ec30d8777b9c8872fcfd8280e57.tar.gz
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Force ATTR_PROC_EFF_FABRIC_CHIP_ID to correct values
There are two ways to handle the scenario where there is no memory at address zero. a) For systems not running PHYP we swap the entire memory map between each chip. We use ATTR_PROC_EFF_FABRIC_xx to do this. b) For PHYP systems we boot Hostboot into a different address space, leaving a hole at zero. We use ATTR_PROC_MEM_TO_USE to do this. There is a code upgrade issue related to ATTR_PROC_EFF_FABRIC_xx where it can get stuck with the wrong value. If we are running in mode b, we never touch those attributes. This change will force an attribute update to get things back in line. Change-Id: Ic706a346233bef82e90de1d70525cd09d30f1ab6 CQ: SW433790 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60879 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Diffstat (limited to 'src/usr/isteps')
-rw-r--r--src/usr/isteps/istep07/call_mss_attr_update.C40
1 files changed, 40 insertions, 0 deletions
diff --git a/src/usr/isteps/istep07/call_mss_attr_update.C b/src/usr/isteps/istep07/call_mss_attr_update.C
index e05a2b3c4..1cbfcfb65 100644
--- a/src/usr/isteps/istep07/call_mss_attr_update.C
+++ b/src/usr/isteps/istep07/call_mss_attr_update.C
@@ -519,6 +519,46 @@ void* call_mss_attr_update( void *io_pArgs )
INITSERVICE::doShutdown(INITSERVICE::SHUTDOWN_DO_RECONFIG_LOOP);
}
+
+ // Need to handle some code upgrade scenarios where the
+ // Nimbus-style swap values aren't getting cleared out
+ // correctly. We will force the EFF attributes to match.
+ bool l_mismatch = false;
+ TARGETING::TargetHandleList l_procTargetList;
+ getAllChips(l_procTargetList, TYPE_PROC);
+ for (const auto & l_proc: l_procTargetList)
+ {
+ auto l_chipid =
+ l_proc->getAttr<TARGETING::ATTR_FABRIC_CHIP_ID>();
+ auto l_effid =
+ l_proc->getAttr<TARGETING::ATTR_PROC_EFF_FABRIC_CHIP_ID>();
+ if( l_chipid != l_effid )
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "Mismatch on proc %.8X : chipid=%.8X, effid=%.8X",
+ get_huid(l_proc), l_chipid, l_effid);
+ l_mismatch = true;
+ l_proc->setAttr<TARGETING::ATTR_PROC_EFF_FABRIC_CHIP_ID>
+ (l_chipid);
+ }
+ }
+
+ // force an update to the SBE if needed
+ if( l_mismatch )
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "Forcing SBE update to fix old memory swap");
+ l_err = SBE::updateProcessorSbeSeeproms();
+ if( l_err )
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR: updateProcessorSbeSeeproms");
+ l_StepError.addErrorDetails(l_err);
+ errlCommit(l_err, HWPF_COMP_ID);
+ }
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "Unexpectedly didn't do a SBE update when we should have...");
+ }
}
// Get all functional MCS chiplets
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