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author | Christian Geddes <crgeddes@us.ibm.com> | 2018-01-30 16:52:30 -0600 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2018-02-07 17:53:45 -0500 |
commit | 0752d042e8fc1a6bdc1892bd349f7bb08b22c650 (patch) | |
tree | 6eda509c32308dcc13ad2da33eccea100ceb2af5 /src/usr/isteps | |
parent | 0e0dc100a1ad96074dcde43dd204d78d4f7bbcac (diff) | |
download | talos-hostboot-0752d042e8fc1a6bdc1892bd349f7bb08b22c650.tar.gz talos-hostboot-0752d042e8fc1a6bdc1892bd349f7bb08b22c650.zip |
Set PAYLOAD_KIND attribute based on fused bits in scom register
The scom register 0xF000F, bit 57 tells us whether or not the fuse
has been blown on this processor. If it is set, that means that it
is up to hostboot to set the PAYLOAD_KIND attribute. We decide this
based on if we are in SMT4 or SMT8 mode, which is known during istep 6.
If we are in SMT4 and the fuse is blown, we can assume PAYLOAD_KIND is
OPAL, if we are in SMT8 and the fuse is blown, we are booting PHYP. In
a lab scenario on which a system has blown fuses, and we want to force
OPAL boot on a system we are forcing to be SMT8, we would have to apply
an attribute override to make ATTR_PAYLOAD_KIND = 0x2 . 0x2 is the enum
for SAPHHIRE as the payload kind.
Change-Id: Ia15dee4dd67130691440bf7fe76915acfb81a19d
RTC: 186965
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52957
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Reviewed-by: ILYA SMIRNOV <ismirno@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr/isteps')
-rw-r--r-- | src/usr/isteps/istep06/thread_activate/thread_activate.C | 33 |
1 files changed, 32 insertions, 1 deletions
diff --git a/src/usr/isteps/istep06/thread_activate/thread_activate.C b/src/usr/isteps/istep06/thread_activate/thread_activate.C index ad481dd16..d141c58e8 100644 --- a/src/usr/isteps/istep06/thread_activate/thread_activate.C +++ b/src/usr/isteps/istep06/thread_activate/thread_activate.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2012,2017 */ +/* Contributors Listed Below - COPYRIGHT 2012,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -270,6 +270,27 @@ void activate_threads( errlHndl_t& io_rtaskRetErrl ) // set the fused core mode attribute bool l_smt8 = false; PVR_t l_pvr( mmio_pvr_read() & 0xFFFFFFFF ); + + //We need to read the CHIP_READOUT_SCOM_REG to tell if the fuse has + //been blown to force PHYP -> SMT 8 and force OPAL -> SMT 4 + const uint64_t CHIP_READOUT_SCOM_REG = 0xF000F; + const uint64_t IS_FUSED_BLOWN_BIT_MASK = 0x0000000000000040; + uint64_t l_chipIdReadout = 0; + size_t l_size = sizeof(l_chipIdReadout); + l_errl = deviceRead(l_masterProc, + &l_chipIdReadout, + l_size, + DEVICE_SCOM_ADDRESS(CHIP_READOUT_SCOM_REG) ); + + if(l_errl) + { + TRACFCOMP( g_fapiTd,ERR_MRK"activate_threads: Failed reading fused bits!" ); + // break from do loop if error occured + break; + } + + uint8_t l_isFuseBlown = (l_chipIdReadout & IS_FUSED_BLOWN_BIT_MASK); + if( l_pvr.isNimbusDD1() ) { sys->setAttr<TARGETING::ATTR_FUSED_CORE_MODE_HB> @@ -281,12 +302,22 @@ void activate_threads( errlHndl_t& io_rtaskRetErrl ) { sys->setAttr<TARGETING::ATTR_FUSED_CORE_MODE_HB> (TARGETING::FUSED_CORE_MODE_HB_SMT4_ONLY); + if(l_isFuseBlown) + { + sys->setAttr<TARGETING::ATTR_PAYLOAD_KIND> + (TARGETING::PAYLOAD_KIND_SAPPHIRE); + } } else // SMT8_MODE { sys->setAttr<TARGETING::ATTR_FUSED_CORE_MODE_HB> (TARGETING::FUSED_CORE_MODE_HB_SMT8_ONLY); l_smt8 = true; + if(l_isFuseBlown) + { + sys->setAttr<TARGETING::ATTR_PAYLOAD_KIND> + (TARGETING::PAYLOAD_KIND_PHYP); + } } } |