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| author | Dan Crowell <dcrowell@us.ibm.com> | 2015-12-14 09:30:28 -0600 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-02-29 16:29:48 -0500 |
| commit | bee7f1cbcd5bf18acc539c9c9b6a14960dadea3d (patch) | |
| tree | 2b7f1c777e10bc41101d7515e96122b3fd8cd1dc /src/usr/isteps/istep16 | |
| parent | 1fe31da7eeae17f43b6908f9eccf30d6a8b355dd (diff) | |
| download | talos-hostboot-bee7f1cbcd5bf18acc539c9c9b6a14960dadea3d.tar.gz talos-hostboot-bee7f1cbcd5bf18acc539c9c9b6a14960dadea3d.zip | |
Update constants and comments for P9 PIR format
Implemented a set of macros and constants that can be used
everywhere to translate a PIR into its component parts
and pull out individual pieces of data from a complete
PIR.
Also added and updated the references to the old
ATTR_FABRIC_NODE_ID with ATTR_FABRIC_GROUP_ID.
Change-Id: If9735f53940e5849a648729e4bf8ca0cfbb09f6e
RTC: 88055
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/706
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr/isteps/istep16')
| -rw-r--r-- | src/usr/isteps/istep16/call_host_activate_slave_cores.C | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/usr/isteps/istep16/call_host_activate_slave_cores.C b/src/usr/isteps/istep16/call_host_activate_slave_cores.C index 88e8f025e..ebb51482c 100644 --- a/src/usr/isteps/istep16/call_host_activate_slave_cores.C +++ b/src/usr/isteps/istep16/call_host_activate_slave_cores.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015 */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -38,7 +38,7 @@ #include <isteps/hwpisteperror.H> #include <errl/errludtarget.H> -#include <intr/interrupt.H> +#include <arch/pirformat.H> #include <console/consoleif.H> // targeting support @@ -88,8 +88,8 @@ void* call_host_activate_slave_cores (void *io_pArgs) CHIP_UNIT_ATTR l_coreId = (*l_core)->getAttr<TARGETING::ATTR_CHIP_UNIT>(); - FABRIC_NODE_ID_ATTR l_logicalNodeId = - l_processor->getAttr<TARGETING::ATTR_FABRIC_NODE_ID>(); + FABRIC_GROUP_ID_ATTR l_logicalNodeId = + l_processor->getAttr<TARGETING::ATTR_FABRIC_GROUP_ID>(); FABRIC_CHIP_ID_ATTR l_chipId = l_processor->getAttr<TARGETING::ATTR_FABRIC_CHIP_ID>(); TARGETING::Target* sys = NULL; @@ -97,7 +97,7 @@ void* call_host_activate_slave_cores (void *io_pArgs) assert( sys != NULL ); uint64_t en_threads = sys->getAttr<ATTR_ENABLED_THREADS>(); - uint64_t pir = INTR::PIR_t(l_logicalNodeId, l_chipId, l_coreId).word; + uint64_t pir = PIR_t(l_logicalNodeId, l_chipId, l_coreId).word; if (pir != l_masterCoreID) { |
