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| author | Ilya Smirnov <ismirno@us.ibm.com> | 2017-07-11 11:39:08 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-08-22 10:04:10 -0400 |
| commit | 818acb95a2dc8ff8e94c652e0964f013c1bf34cb (patch) | |
| tree | 58beb81f944d85df9a62a3e3efca278d890c0ab2 /src/usr/isteps/istep06/makefile | |
| parent | 8344a11d2ff2a23a83f2e78d139f5067544850d5 (diff) | |
| download | talos-hostboot-818acb95a2dc8ff8e94c652e0964f013c1bf34cb.tar.gz talos-hostboot-818acb95a2dc8ff8e94c652e0964f013c1bf34cb.zip | |
IPL Time Checkstop Analysis Part 1: Load OCC
First part of the IPL Time Checkstop Analysis story.
The OCC image gets loaded from the PNOR directly into
SRAM in istep 6.11. The OCC is reset in step 21.1
and the image is reloaded to HOMER.
Change-Id: I73ce96b81b311d7ae54356c64aeec816d52fafbb
RTC:155065
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43574
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr/isteps/istep06/makefile')
| -rw-r--r-- | src/usr/isteps/istep06/makefile | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/usr/isteps/istep06/makefile b/src/usr/isteps/istep06/makefile index 0cef7c3f6..e18d1c2e5 100644 --- a/src/usr/isteps/istep06/makefile +++ b/src/usr/isteps/istep06/makefile @@ -62,7 +62,7 @@ EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/pm/include/registe EXTRAINCDIR += ${LIB_HWP_PATH} EXTRAINCDIR += ${CORE_HWP_PATH} EXTRAINCDIR += ${CACHE_HWP_PATH} - +EXTRAINCDIR += ${ROOTPATH}/src/usr/isteps #Required include before all the procedure.mk are included include ${ROOTPATH}/procedure.rules.mk |
