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| author | Patrick Williams <iawillia@us.ibm.com> | 2012-05-31 13:00:52 -0500 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2012-06-01 20:31:48 -0500 |
| commit | 63c956fe6ab673da7b68bcdf12f03608cac368b1 (patch) | |
| tree | 9719fd668302c0fd2d9134b0c598631c4ac5ffb1 /src/usr/intr/test/intrtest.H | |
| parent | 450350b9bdae0f52237e22624f06f8b14854db1a (diff) | |
| download | talos-hostboot-63c956fe6ab673da7b68bcdf12f03608cac368b1.tar.gz talos-hostboot-63c956fe6ab673da7b68bcdf12f03608cac368b1.zip | |
Support P8 memory map from PHYP
Change-Id: I19e5c373713b6e8b12386266c5c2c3a015068d5a
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1132
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/intr/test/intrtest.H')
| -rw-r--r-- | src/usr/intr/test/intrtest.H | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/usr/intr/test/intrtest.H b/src/usr/intr/test/intrtest.H index f7c6b37f4..d395ab9ac 100644 --- a/src/usr/intr/test/intrtest.H +++ b/src/usr/intr/test/intrtest.H @@ -78,7 +78,7 @@ class IntrTest: public CxxTest::TestSuite *(addr + 2) ); } - + } // Potentially could check all link registers on other chips @@ -129,7 +129,7 @@ class IntrTest: public CxxTest::TestSuite void test_intr( void ) { - // DISABLE in VBU + // DISABLE in VBU if( TARGETING::is_vpo() ) { return; @@ -148,7 +148,7 @@ class IntrTest: public CxxTest::TestSuite } // Force an interrupt by writing to the MFFR on master - volatile uint8_t * mfrr = + volatile uint8_t * mfrr = reinterpret_cast<uint8_t *>(iv_masterAddr+12); *(mfrr) = 0x55; *(mfrr) = 0xff; @@ -211,7 +211,7 @@ class IntrTest: public CxxTest::TestSuite }; //note: this must be changed if the BAR changes -const uint64_t IntrTest::cv_realAddr = 0x3fbff9000000ul; +const uint64_t IntrTest::cv_realAddr = 0x3ffff80000000ul; |
