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| author | Doug Gilbert <dgilbert@us.ibm.com> | 2013-02-27 18:12:43 -0600 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2013-02-28 09:54:17 -0600 |
| commit | c99b3756a8a0c424e5002673a2fd4e6bd480b308 (patch) | |
| tree | bed0aeb8edc0d9c16b1ba8773bd79a6aa88e1618 /src/usr/intr/intrrp.H | |
| parent | 98f83dee564324f66e25691eccfd18855d39b884 (diff) | |
| download | talos-hostboot-c99b3756a8a0c424e5002673a2fd4e6bd480b308.tar.gz talos-hostboot-c99b3756a8a0c424e5002673a2fd4e6bd480b308.zip | |
INTR: Setup XIVR w/intr disabled before ISRN is written
Change-Id: I44ddaeaa69ebaa02d5c23c2aec56da24acd7c0f2
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3370
Tested-by: Jenkins Server
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/intr/intrrp.H')
| -rw-r--r-- | src/usr/intr/intrrp.H | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/usr/intr/intrrp.H b/src/usr/intr/intrrp.H index 2a32edca4..884fc27fc 100644 --- a/src/usr/intr/intrrp.H +++ b/src/usr/intr/intrrp.H @@ -403,6 +403,14 @@ namespace INTR errlHndl_t initXIVR(enum ISNvalue_t i_isn, bool i_enable); /** + * Setup XIVR with intr masked and isn & destination set for + * xivr/isn that hostboot uses. + * @param i_target : The target processor chip + * @return error handle + */ + errlHndl_t maskXIVR(TARGETING::Target * i_target); + + /** * Shutdown procedure */ void shutDown(); |
