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| author | Patrick Williams <iawillia@us.ibm.com> | 2012-05-31 13:00:52 -0500 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2012-06-01 20:31:48 -0500 |
| commit | 63c956fe6ab673da7b68bcdf12f03608cac368b1 (patch) | |
| tree | 9719fd668302c0fd2d9134b0c598631c4ac5ffb1 /src/usr/intr/intrrp.C | |
| parent | 450350b9bdae0f52237e22624f06f8b14854db1a (diff) | |
| download | talos-hostboot-63c956fe6ab673da7b68bcdf12f03608cac368b1.tar.gz talos-hostboot-63c956fe6ab673da7b68bcdf12f03608cac368b1.zip | |
Support P8 memory map from PHYP
Change-Id: I19e5c373713b6e8b12386266c5c2c3a015068d5a
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1132
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/intr/intrrp.C')
| -rw-r--r-- | src/usr/intr/intrrp.C | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/usr/intr/intrrp.C b/src/usr/intr/intrrp.C index 61f537932..ce2e1a26f 100644 --- a/src/usr/intr/intrrp.C +++ b/src/usr/intr/intrrp.C @@ -66,11 +66,11 @@ void IntrRp::init( errlHndl_t &io_errlHndl_t ) } -// ICPBAR = INTP.ICP_BAR[0:25] in P7 = 0x3FBFF90 + (8*node) + procPos +// ICPBAR = INTP.ICP_BAR[0:25] in P8 = 0x3FFFF800 + (8*node) + procPos // P7 Scom address 0x02011C09 P8 = 0x020109c9 // BaseAddress P7: // BA[18:43] = ICPBAR (P8 says [14:43] (30 bits)) -// BA[47:49] = COREid (0-7) +// BA[47:49] = COREid (0-7) // BA[50:51] = cpu thread (0-3) // // BaseAddress P8: @@ -408,7 +408,7 @@ errlHndl_t IntrRp::setBAR(TARGETING::Target * i_target, { errlHndl_t err = NULL; - uint64_t barValue = static_cast<uint64_t>(ICPBAR_VAL) + + uint64_t barValue = static_cast<uint64_t>(ICPBAR_VAL) + (8 * i_pir.nodeId) + i_pir.chipId; barValue <<= 34; @@ -523,7 +523,7 @@ void IntrRp::deconfigureInterruptPresenter(const PIR_t i_pir) const reinterpret_cast<uint32_t *>(baseAddr + LINKA_OFFSET); // non- side effect xirr register - uint32_t * xirrAddr = + uint32_t * xirrAddr = reinterpret_cast<uint32_t *>(baseAddr) + XIRR_RO_OFFSET; uint32_t xirr = *xirrAddr & 0x00FFFFFF; |
