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| author | Corey Swenson <cswenson@us.ibm.com> | 2015-04-23 14:55:20 -0500 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2015-04-24 10:56:50 -0500 |
| commit | c17c45d7e8d3a09c49ab882a361e7e7f223b1301 (patch) | |
| tree | 7156820cc6ed23cda35f3ac753ae09d821b81946 /src/usr/i2c | |
| parent | c0c0500336e23bbfe0c254fd7c8c2428af94c932 (diff) | |
| download | talos-hostboot-c17c45d7e8d3a09c49ab882a361e7e7f223b1301.tar.gz talos-hostboot-c17c45d7e8d3a09c49ab882a361e7e7f223b1301.zip | |
Disable Centaur I2C at runtime
Change-Id: I0425f642ed84041e604ad8004f77f0c385227526
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/17387
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Michael Baiocchi <baiocchi@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/i2c')
| -rwxr-xr-x | src/usr/i2c/runtime/rt_i2c.C | 76 |
1 files changed, 42 insertions, 34 deletions
diff --git a/src/usr/i2c/runtime/rt_i2c.C b/src/usr/i2c/runtime/rt_i2c.C index 5d21bbf42..bdadbbed4 100755 --- a/src/usr/i2c/runtime/rt_i2c.C +++ b/src/usr/i2c/runtime/rt_i2c.C @@ -139,44 +139,52 @@ errlHndl_t i2cPerformOp( DeviceFW::OperationType i_opType, proc_engine_port |= (uint64_t)(args.engine) << HBRT_I2C_MASTER_ENGINE_SHIFT; proc_engine_port |= (uint64_t)(args.port) << HBRT_I2C_MASTER_PORT_SHIFT; - if(i_opType == DeviceFW::READ) + // Send I2C op to host interface + // Centaur I2C not yet supported + // @todo RTC:127533 -- Enable Centaur I2C at runtime + if( i_target->getAttr<TARGETING::ATTR_TYPE>() != TARGETING::TYPE_MEMBUF ) { - if(g_hostInterfaces->i2c_read != NULL) + if(i_opType == DeviceFW::READ) { - rc = g_hostInterfaces->i2c_read - ( - proc_engine_port, // Master Chip/Engine/Port - args.devAddr, // Dev Addr - args.offset_length, // Offset size - offset, // Offset - io_buflen, // Buffer length - io_buffer // Buffer - ); + if(g_hostInterfaces->i2c_read != NULL) + { + rc = g_hostInterfaces->i2c_read + ( + proc_engine_port, // Master Chip/Engine/Port + args.devAddr, // Dev Addr + args.offset_length, // Offset size + offset, // Offset + io_buflen, // Buffer length + io_buffer // Buffer + ); + } + else + { + TRACFCOMP(g_trac_i2c, + ERR_MRK"Hypervisor I2C read interface not linked"); + l_host_if_enabled = false; + } } - else - { - TRACFCOMP(g_trac_i2c,ERR_MRK"Hypervisor I2C read interface not linked"); - l_host_if_enabled = false; - } - } - else if (i_opType == DeviceFW::WRITE) - { - if(g_hostInterfaces->i2c_write != NULL) - { - rc = g_hostInterfaces->i2c_write - ( - proc_engine_port, // Master Chip/Engine/Port - args.devAddr, // Dev Addr - args.offset_length, // Offset size - offset, // Offset - io_buflen, // Buffer length - io_buffer // Buffer - ); - } - else + else if (i_opType == DeviceFW::WRITE) { - TRACFCOMP(g_trac_i2c,ERR_MRK"Hypervisor I2C write interface not linked"); - l_host_if_enabled = false; + if(g_hostInterfaces->i2c_write != NULL) + { + rc = g_hostInterfaces->i2c_write + ( + proc_engine_port, // Master Chip/Engine/Port + args.devAddr, // Dev Addr + args.offset_length, // Offset size + offset, // Offset + io_buflen, // Buffer length + io_buffer // Buffer + ); + } + else + { + TRACFCOMP(g_trac_i2c, + ERR_MRK"Hypervisor I2C write interface not linked"); + l_host_if_enabled = false; + } } } |
