Updates to I2C and EEPROM Device Drivers to work for P8

There were several changes required for successful operation
of the I2C and EEPROM Device Drivers based on HW Testing.
There was also a need to upddate the attribute files and
various testcases for processor support.

Change-Id: Idd9351ffb01a992c835f99d06ef1246709eceb8b
RTC: 64765
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/4678
Tested-by: Jenkins Server
Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

2 files changed, 288 insertions, 95 deletions

diff --git a/src/usr/i2c/test/eepromddtest.H b/src/usr/i2c/test/eepromddtest.H
index 5c622a7f5..71211c08a 100755
--- a/src/usr/i2c/test/eepromddtest.H
+++ b/src/usr/i2c/test/eepromddtest.H
@@ -1,25 +1,25 @@
-//  IBM_PROLOG_BEGIN_TAG
-//  This is an automatically generated prolog.
-//
-//  $Source: src/usr/i2c/test/eepromddtest.H $
-//
-//  IBM CONFIDENTIAL
-//
-//  COPYRIGHT International Business Machines Corp. 2011
-//
-//  p1
-//
-//  Object Code Only (OCO) source materials
-//  Licensed Internal Code Source Materials
-//  IBM HostBoot Licensed Internal Code
-//
-//  The source code for this program is not published or other-
-//  wise divested of its trade secrets, irrespective of what has
-//  been deposited with the U.S. Copyright Office.
-//
-//  Origin: 30
-//
-//  IBM_PROLOG_END
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/usr/i2c/test/eepromddtest.H $                             */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* COPYRIGHT International Business Machines Corp. 2011,2013              */
+/*                                                                        */
+/* p1                                                                     */
+/*                                                                        */
+/* Object Code Only (OCO) source materials                                */
+/* Licensed Internal Code Source Materials                                */
+/* IBM HostBoot Licensed Internal Code                                    */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* Origin: 30                                                             */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
 #ifndef __EEPROMTEST_H
 #define __EEPROMTEST_H
 
@@ -37,10 +37,18 @@
 #include <i2c/eepromddreasoncodes.H>
 #include <targeting/common/commontargeting.H>
 #include "i2ctest.H"
+#include "../eepromdd.H"
 
 extern trace_desc_t* g_trac_eeprom;
 
+// Easy macro replace for unit testing
+//#define TRACUCOMP(args...)  TRACFCOMP(args)
+#define TRACUCOMP(args...)
+
 using namespace TARGETING;
+using namespace EEPROM;
+
+
 
 class EEPROMTest: public CxxTest::TestSuite
 {
@@ -57,32 +65,47 @@ class EEPROMTest: public CxxTest::TestSuite
             int fails = 0;
             int num_ops = 0;
 
+            uint8_t* testBuffer = NULL;
+            uint8_t* testBuffer_read = NULL;
+
+
             TRACFCOMP( g_trac_eeprom,
                        "testEEPROMReadWrite - Start" );
 
             struct
             {
-                uint64_t addr;      // Slave Device Address to access
+                uint64_t offset;    // Internal Slave Device Offset to access
                 uint64_t chip;      // Which EEPROM chip hung off of the target to access
                 uint64_t data;      // Data to write or compare to
                 size_t   size;      // Number of bytes to read/write
                 bool     rnw;       // Read (true), Write (false)
             } testData[] =
+
             {
-                { 0x1111, 0x0, 0xfedcba9876543210, 8, false },    // Write data
-                { 0x1111, 0x0, 0xfedcba9876543210, 8, true  },    // Read data
-                { 0x2222, 0x0, 0xaabb000000000000, 2, false },
-                { 0x2222, 0x0, 0xaabb000000000000, 2, true  },
-                { 0x1122, 0x0, 0x1122334400000000, 4, false },
-                { 0x1122, 0x0, 0x1122334400000000, 4, true  },
+
+
+                // MVPD of processor - chip 0
+                // Write:
+                { 0x0000, VPD_PRIMARY, 0xfedcba9876543210, 8, false },
+                // Read:
+                { 0x0000, VPD_PRIMARY, 0xfedcba9876543210, 8, true  },
+
+                // SBE Primary of processor - chip 2
+                // Write:
+                { 0x0100, SBE_PRIMARY, 0xaabb000000000000, 2, false },
+                // Read:
+                { 0x0100, SBE_PRIMARY, 0xaabb000000000000, 2, true  },
+
+                // SBE Backup of processor - chip 3
+                // Write:
+                { 0x00F0, SBE_BACKUP, 0x1122334400000000, 4, false },
+                // Read:
+                { 0x00F0, SBE_BACKUP, 0x1122334400000000, 4, true  },
             };
 
             const uint32_t NUM_CMDS = sizeof(testData)/sizeof(testData[0]);
 
-            //@TODO
-            //@VBU workaround - Disable I2C test case on fake target
-            //Test case use fake targets, which will fail when running
-            //on VBU.  Need to fix this.
+            // Skipping EEPROM test altogether in VBU/VPO environment
             if( TARGETING::is_vpo() )
             {
                 return;
@@ -98,13 +121,10 @@ class EEPROMTest: public CxxTest::TestSuite
                 TargetHandleList fullList;
                 fullList.push_back( testTarget );
 
-                // TODO - The following is what I want to use...  BUT, since we
-                // can't target DIMMs yet, and only Proc 0 has a slave device
-                // hung off of it, we can't do that yet.  Uncomment the following
-                // when it is supported.
+                // Uncomment the following code when other I2C devices
+                // are supported
 //                TARGETING::TargetService& tS = TARGETING::targetService();
 //                TARGETING::Target * sysTarget = NULL;
-//                TargetHandleList fullList;
 
 //                // Get top level system target
 //                tS.getTopLevelTarget( sysTarget );
@@ -159,8 +179,9 @@ class EEPROMTest: public CxxTest::TestSuite
                                         fullList[j],
                                         &data,
                                         testData[i].size,
-                                        DEVICE_EEPROM_ADDRESS( testData[i].addr,
-                                                               testData[i].chip ) );
+                                        DEVICE_EEPROM_ADDRESS(
+                                                      testData[i].chip,
+                                                      testData[i].offset));
 
                         if( err )
                         {
@@ -189,8 +210,92 @@ class EEPROMTest: public CxxTest::TestSuite
                         }
                     }
                 }
+
+                // Test EEPROM Write of large size
+                // @todo RTC:69113 - will clean this up:
+                //  1) Make its own testcase function
+                //  2) Will use a larger data set: Plan on using 4K header of
+                //  test_signed_container and putting it into un-used area of
+                //  SBE_BACKUP
+                //  3) Will restore original data just in case
+                uint64_t testBufLen = 0xF1;
+                testBuffer = static_cast<uint8_t*>(malloc(testBufLen));
+                memset(testBuffer, 0xFE, testBufLen);
+
+                // Randomize the Data a bit
+                for (uint64_t i = 0;
+                       i < ((testBufLen / 8) + 1);
+                     i++)
+                    testBuffer[i*8] = i;
+
+                for (uint64_t k = 0; k < 8; k++)
+                    testBuffer[k] = k;
+
+                // do the Write operation
+                err = deviceOp( DeviceFW::WRITE,
+                                fullList[0],
+                                testBuffer,
+                                testBufLen,
+                                DEVICE_EEPROM_ADDRESS(SBE_BACKUP,0x0));
+                if( err )
+                {
+                    TS_FAIL( "testEEPROMReadWrite - FAIL on large Data Write");
+                    errlCommit( err,
+                                EEPROM_COMP_ID );
+                    delete err;
+                    break;
+                }
+
+                // Read Back and Compare
+                testBuffer_read = static_cast<uint8_t*>(malloc( testBufLen ));
+
+                // clear read buffer
+                memset (testBuffer_read, 0, testBufLen);
+
+                // do the Read operation
+                err = deviceOp( DeviceFW::READ,
+                                fullList[0],
+                                testBuffer_read,
+                                testBufLen,
+                                DEVICE_EEPROM_ADDRESS(SBE_BACKUP,0x0));
+
+
+                if( err )
+                {
+                    TS_FAIL( "testEEPROMReadWrite - FAIL on large Data Read");
+                    errlCommit( err,
+                                EEPROM_COMP_ID );
+                    delete err;
+                    break;
+                }
+
+
+                // Compare the data
+                if ( memcmp( testBuffer, testBuffer_read, testBufLen) )
+                {
+                    TS_FAIL( "testEEPROMReadWrite - MISCOMPARE on large Data");
+                    break;
+                }
+                else
+                {
+                    TRACUCOMP( g_trac_eeprom, "testEEPROMReadWrite - large "
+                                              "Data R/W Successful");
+                }
+
             } while( 0 );
 
+            // Clean up malloc'ed buffers
+            if ( testBuffer != NULL)
+            {
+                free(testBuffer);
+            }
+
+            if ( testBuffer_read != NULL)
+            {
+                free(testBuffer_read);
+            }
+
+
             TRACFCOMP( g_trac_eeprom,
                        "testEEPROMReadWrite - %d/%d fails",
                        fails, num_ops );
@@ -260,7 +365,6 @@ class EEPROMTest: public CxxTest::TestSuite
             uint64_t data = 0x0ull;
             size_t dataSize = 8;
 
-            const int64_t CHIP_NUM = 20;
 
             do
             {
@@ -283,14 +387,14 @@ class EEPROMTest: public CxxTest::TestSuite
                                 testTarget,
                                 &data,
                                 dataSize,
-                                DEVICE_EEPROM_ADDRESS( 0x0,
-                                                       CHIP_NUM ) );
+                                DEVICE_EEPROM_ADDRESS( LAST_CHIP_TYPE,
+                                                       0x0 ) );
 
                 if( NULL == err )
                 {
                     fails++;
                     TS_FAIL( "Error should've resulted in using EEPROM chip %d!",
-                             CHIP_NUM );
+                             LAST_CHIP_TYPE );
                 }
                 else
                 {
diff --git a/src/usr/i2c/test/i2ctest.H b/src/usr/i2c/test/i2ctest.H
index 95f1cc16d..d98858451 100755
--- a/src/usr/i2c/test/i2ctest.H
+++ b/src/usr/i2c/test/i2ctest.H
@@ -1,25 +1,25 @@
-//  IBM_PROLOG_BEGIN_TAG
-//  This is an automatically generated prolog.
-//
-//  $Source: src/usr/i2c/test/i2ctest.H $
-//
-//  IBM CONFIDENTIAL
-//
-//  COPYRIGHT International Business Machines Corp. 2011
-//
-//  p1
-//
-//  Object Code Only (OCO) source materials
-//  Licensed Internal Code Source Materials
-//  IBM HostBoot Licensed Internal Code
-//
-//  The source code for this program is not published or other-
-//  wise divested of its trade secrets, irrespective of what has
-//  been deposited with the U.S. Copyright Office.
-//
-//  Origin: 30
-//
-//  IBM_PROLOG_END
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/usr/i2c/test/i2ctest.H $                                  */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* COPYRIGHT International Business Machines Corp. 2011,2013              */
+/*                                                                        */
+/* p1                                                                     */
+/*                                                                        */
+/* Object Code Only (OCO) source materials                                */
+/* Licensed Internal Code Source Materials                                */
+/* IBM HostBoot Licensed Internal Code                                    */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* Origin: 30                                                             */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
 #ifndef __I2CTEST_H
 #define __I2CTEST_H
 
@@ -42,12 +42,21 @@ extern trace_desc_t* g_trac_i2c;
 
 using namespace TARGETING;
 
+
+// Used to ignore comparing data on reads
+#define I2C_TEST_IGNORE_DATA_COMPARE 0xFFFFFFFFFFFFFFFF
+
+// @todo RTC:72715: Re-visit the use of this function when we have full
+// Attribute support
 bool isI2CAvailable( TARGETING::Target * i_target )
 {
     bool avail = true;
-    EepromAddrInfo0 eepromData;
-    if( i_target->tryGetAttr<ATTR_EEPROM_ADDR_INFO0>( eepromData ) )
+
+    // Rudimentary Check - Every I2C Master has VPD Primary Attribute
+    EepromVpdPrimaryInfo eepromData;
+    if( i_target->tryGetAttr<ATTR_EEPROM_VPD_PRIMARY_INFO>( eepromData ) )
     {
+
         if( ( 0x80 == eepromData.port ) &&
             ( 0x80 == eepromData.devAddr ) &&
             ( 0x80 == eepromData.engine ) )
@@ -74,10 +83,10 @@ class I2CTest: public CxxTest::TestSuite
          *      This test will test a variety of reads/writes and lengths
          *      across slave devices.
          *
-         *      TODO - Currently there is only 1 dummy I2C device that is
-         *      accessible via Simics.  Once another is added the structure
-         *      used to direct commands will be altered to use the new device
-         *      and also be changed to not be destructive as they are currently.
+         *      Currently only Processor targets are supported in simics.
+         *
+         *      Add other targets to this testcase when their support is
+         *      added.
          */
         void testI2CReadWrite ( void )
         {
@@ -99,28 +108,97 @@ class I2CTest: public CxxTest::TestSuite
                 uint64_t port;      // Master engine port
                 uint64_t engine;    // Master engine
                 uint64_t devAddr;   // Slave Device address
+
                 uint64_t data;      // Data to write or compare to
+                                    // if data = I2C_TEST_IGNORE_DATA_COMPARE
+                                    //  than ignore data compare
+
                 size_t   size;      // Number of Bytes to read/write
                 bool     rnw;       // Read (true), Write (false)
                 targetType_t type;  // Target Type
             } testData[] =
             {
-                // Dummy I2C Device in Simics
-                { 0x00, 0x00, 0x50, 0x1234BA9876543210,
-                    8, false, I2C_PROC_TARGET }, // Write data
-                { 0x00, 0x00, 0x50, 0x1234000000000000,
-                    2, false, I2C_PROC_TARGET }, // Write addr for read
-                { 0x00, 0x00, 0x50, 0xba98765432100000,
-                    6, true, I2C_PROC_TARGET  }, // Read data back
-                { 0x00, 0x00, 0x50, 0x1100556677880000,
-                    6, false, I2C_PROC_TARGET },
-                { 0x00, 0x00, 0x50, 0x1100000000000000,
-                    2, false, I2C_PROC_TARGET },
-                { 0x00, 0x00, 0x50, 0x5566778800000000,
-                    4, true, I2C_PROC_TARGET  },
-
-                // TODO - Once these commands are working with Simics, they
-                // can be enabled.  No target date.
+
+                // PROCESSOR TESTS
+                //  -- For Processor SEEPROM's, ONLY USE ENGINE 0
+
+                // READ All 3 at address 0 for 8 bytes first
+                // Ignore data compare as we're not sure what's
+                //  been writted there
+
+                // Read SBE Primary:  Murano-0, port-0
+                { 0x00, 0x00, 0xAC, I2C_TEST_IGNORE_DATA_COMPARE,
+                     8, true, I2C_PROC_TARGET }, // Read
+
+                // Read SBE Backup:  Murano-0, port-0
+                { 0x00, 0x00, 0xAE, I2C_TEST_IGNORE_DATA_COMPARE,
+                     8, true, I2C_PROC_TARGET }, // Read
+
+                // Read From MVPD: Murano-0, port 1
+                { 0x01, 0x00, 0xA4, I2C_TEST_IGNORE_DATA_COMPARE,
+                     8, true, I2C_PROC_TARGET  }, // Read data back
+
+
+                // Read/Write SBE Primary:  Murano-0, port-0
+                // Safe to write to first 1K: 0x-0x400
+
+                { 0x00, 0x00, 0xAC, 0x0000ababcdcdefef,
+                     8, false, I2C_PROC_TARGET }, // Write data to 0x0000
+
+                { 0x00, 0x00, 0xAC, 0x0000000000000000,
+                     2, false, I2C_PROC_TARGET }, // Write addr for read
+
+                { 0x00, 0x00, 0xAc, 0xababcdcdefef0000,
+                     6, true, I2C_PROC_TARGET  }, // Read data back
+
+                { 0x00, 0x00, 0xAC, 0x0003000000000000,
+                     2, false, I2C_PROC_TARGET }, // Write addr for read
+
+                { 0x00, 0x00, 0xAC, 0xcdefef0000000000,
+                     3, true, I2C_PROC_TARGET  }, // Read data back
+
+                { 0x00, 0x00, 0xAC, 0x0005ee1200000000,
+                     4, false, I2C_PROC_TARGET }, // Write data to 0x0005
+
+                { 0x00, 0x00, 0xAC, 0x0005000000000000,
+                     2, false, I2C_PROC_TARGET }, // Write addr for read
+
+                { 0x00, 0x00, 0xAC, 0xee12000000000000,
+                     2, true, I2C_PROC_TARGET  }, // Read data back
+
+
+
+                // Read/Write SBE Backup:  Murano-0, port-0
+                // Safe to write to first 1K: 0x-0x400
+
+                { 0x00, 0x00, 0xAE, 0x0000ababcdcdefef,
+                     8, false, I2C_PROC_TARGET }, // Write data to 0x0000
+
+                { 0x00, 0x00, 0xAE, 0x0000000000000000,
+                     2, false, I2C_PROC_TARGET }, // Write addr for read
+
+                { 0x00, 0x00, 0xAE, 0xababcdcdefef0000,
+                     6, true, I2C_PROC_TARGET  }, // Read data back
+
+                { 0x00, 0x00, 0xAE, 0x0003000000000000,
+                     2, false, I2C_PROC_TARGET }, // Write addr for read
+
+                { 0x00, 0x00, 0xAE, 0xcdefef0000000000,
+                     3, true, I2C_PROC_TARGET  }, // Read data back
+
+                { 0x00, 0x00, 0xAE, 0x0005ee1200000000,
+                     4, false, I2C_PROC_TARGET }, // Write data to 0x0005
+
+                { 0x00, 0x00, 0xAE, 0x0005000000000000,
+                     2, false, I2C_PROC_TARGET }, // Write addr for read
+
+                { 0x00, 0x00, 0xAE, 0xee12000000000000,
+                     2, true, I2C_PROC_TARGET  }, // Read data back
+
+
+                // MEMBUF TESTS
+                // Use the following commands when Centaur devices are
+                // supported in simics.  No target date.
                 // Real Centaur Devices
 //                { 0x00, 0x00, 0x51, 0x1111000000000000,
 //                    2, false, I2C_CENTAUR_TARGET }, // Write addr of 0x0000
@@ -134,10 +212,8 @@ class I2CTest: public CxxTest::TestSuite
 
             const uint32_t NUM_CMDS = sizeof(testData)/sizeof(testData[0]);
 
-            //@TODO
-            //@VBU workaround - Disable I2C test case on fake target
-            //Test case use fake targets, which will fail when running
-            //on VBU.  Need to fix this.
+
+            // Skipping I2C test altogether in VBU/VPO environment
             if( TARGETING::is_vpo() )
             {
                 return;
@@ -168,7 +244,18 @@ class I2CTest: public CxxTest::TestSuite
 
                 for( uint32_t i = 0; i < NUM_CMDS; i++ )
                 {
+
+                    // Make sure size is less than or = to 8 bytes
+                    //  to fit into data
                     uint64_t data;
+                    if (testData[i].size > 8)
+                    {
+                        TRACFCOMP( g_trac_i2c,
+                                   "testI2ReadWrite Size (%d) is greater than"
+                                   " 8 bytes. Skipping test %d",
+                                   testData[i].size, i );
+                        continue;
+                    }
 
                     // if a read, initialize data, else, set data to write
                     if( testData[i].rnw )
@@ -220,7 +307,7 @@ class I2CTest: public CxxTest::TestSuite
                     if( !isI2CAvailable( theTarget ) )
                     {
                         TRACFCOMP( g_trac_i2c,
-                               "testI2ReadWrite Operation - no i2c function" );
+                               "testI2CReadWrite Operation - no i2c function" );
 
 
                         continue;
@@ -259,8 +346,10 @@ class I2CTest: public CxxTest::TestSuite
                         continue;
                     }
 
-                    // compare data for the read
-                    if( testData[i].rnw )
+                    // compare data for the read, but ignore case where
+                    //  data = I2C_TEST_IGNORE_DATA_COMPARE
+                    if( ( testData[i].rnw ) &&
+                        ( testData[i].data != I2C_TEST_IGNORE_DATA_COMPARE ))
                     {
                         if( data != testData[i].data )
                         {