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authorThi Tran <thi@us.ibm.com>2015-07-31 15:35:30 -0500
committerA. Patrick Williams III <iawillia@us.ibm.com>2015-08-24 15:57:29 -0500
commit3d6217acec3cc424dc631b39b61e8e0eac8406ed (patch)
tree6443134e8d2632f56db92519acc34485377fd85f /src/usr/i2c/runtime/rt_i2c.C
parent871fb2de70dbf80af6b68a9eb27c3641a89fdc39 (diff)
downloadtalos-hostboot-3d6217acec3cc424dc631b39b61e8e0eac8406ed.tar.gz
talos-hostboot-3d6217acec3cc424dc631b39b61e8e0eac8406ed.zip
SW316014: INITPROC: updates to implement SBE interrupt service
CMVC-Coreq: 968951 CQ:SW316014 Change-Id: I31c015962f39342d0d1d9d575fd0c4569496918c Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19475 Reviewed-by: Thi N. Tran <thi@us.ibm.com> Tested-by: Thi N. Tran <thi@us.ibm.com> Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19478 Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/i2c/runtime/rt_i2c.C')
-rwxr-xr-xsrc/usr/i2c/runtime/rt_i2c.C77
1 files changed, 36 insertions, 41 deletions
diff --git a/src/usr/i2c/runtime/rt_i2c.C b/src/usr/i2c/runtime/rt_i2c.C
index 8704b6be1..a74bb5dd0 100755
--- a/src/usr/i2c/runtime/rt_i2c.C
+++ b/src/usr/i2c/runtime/rt_i2c.C
@@ -149,51 +149,46 @@ errlHndl_t i2cPerformOp( DeviceFW::OperationType i_opType,
proc_engine_port |= (uint64_t)(args.port) << HBRT_I2C_MASTER_PORT_SHIFT;
// Send I2C op to host interface
- // Centaur I2C not yet supported
- // @todo RTC:127533 -- Enable Centaur I2C at runtime
- if( i_target->getAttr<TARGETING::ATTR_TYPE>() != TARGETING::TYPE_MEMBUF )
+ if(i_opType == DeviceFW::READ)
{
- if(i_opType == DeviceFW::READ)
+ if(g_hostInterfaces->i2c_read != NULL)
{
- if(g_hostInterfaces->i2c_read != NULL)
- {
- rc = g_hostInterfaces->i2c_read
- (
- proc_engine_port, // Master Chip/Engine/Port
- args.devAddr, // Dev Addr
- args.offset_length, // Offset size
- offset, // Offset
- io_buflen, // Buffer length
- io_buffer // Buffer
- );
- }
- else
- {
- TRACFCOMP(g_trac_i2c,
- ERR_MRK"Hypervisor I2C read interface not linked");
- l_host_if_enabled = false;
- }
+ rc = g_hostInterfaces->i2c_read
+ (
+ proc_engine_port, // Master Chip/Engine/Port
+ args.devAddr, // Dev Addr
+ args.offset_length, // Offset size
+ offset, // Offset
+ io_buflen, // Buffer length
+ io_buffer // Buffer
+ );
}
- else if (i_opType == DeviceFW::WRITE)
+ else
{
- if(g_hostInterfaces->i2c_write != NULL)
- {
- rc = g_hostInterfaces->i2c_write
- (
- proc_engine_port, // Master Chip/Engine/Port
- args.devAddr, // Dev Addr
- args.offset_length, // Offset size
- offset, // Offset
- io_buflen, // Buffer length
- io_buffer // Buffer
- );
- }
- else
- {
- TRACFCOMP(g_trac_i2c,
- ERR_MRK"Hypervisor I2C write interface not linked");
- l_host_if_enabled = false;
- }
+ TRACFCOMP(g_trac_i2c,
+ ERR_MRK"Hypervisor I2C read interface not linked");
+ l_host_if_enabled = false;
+ }
+ }
+ else if (i_opType == DeviceFW::WRITE)
+ {
+ if(g_hostInterfaces->i2c_write != NULL)
+ {
+ rc = g_hostInterfaces->i2c_write
+ (
+ proc_engine_port, // Master Chip/Engine/Port
+ args.devAddr, // Dev Addr
+ args.offset_length, // Offset size
+ offset, // Offset
+ io_buflen, // Buffer length
+ io_buffer // Buffer
+ );
+ }
+ else
+ {
+ TRACFCOMP(g_trac_i2c,
+ ERR_MRK"Hypervisor I2C write interface not linked");
+ l_host_if_enabled = false;
}
}
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