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| author | Thi Tran <thi@us.ibm.com> | 2015-12-04 07:29:09 -0600 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2015-12-09 17:48:23 -0600 |
| commit | b3e68cd17927d7bbccb33320270b494a828919a0 (patch) | |
| tree | 73a8a430b7ce4c5b42adcabddb7185d04c040e89 /src/usr/hwpf | |
| parent | 9421a5977cbc9ce334404066ca01239469ce0d72 (diff) | |
| download | talos-hostboot-b3e68cd17927d7bbccb33320270b494a828919a0.tar.gz talos-hostboot-b3e68cd17927d7bbccb33320270b494a828919a0.zip | |
SW322180: Change MCMODE0Q_L3_PREFETCH_RETRY_THRESHOLD from 0xF to 0x7 for all 4
Change-Id: I8f8cf6a668da4e1431a2d764367102f9c79fa711
CQ:SW322180
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22459
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Tested-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22460
Tested-by: Jenkins Server
Tested-by: Jenkins OP Build CI
Tested-by: Jenkins OP HW
Tested-by: FSP CI Jenkins
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/hwpf')
| -rw-r--r-- | src/usr/hwpf/hwp/initfiles/p8.mcs.scom.initfile | 23 |
1 files changed, 21 insertions, 2 deletions
diff --git a/src/usr/hwpf/hwp/initfiles/p8.mcs.scom.initfile b/src/usr/hwpf/hwp/initfiles/p8.mcs.scom.initfile index b346ead28..fded895b1 100644 --- a/src/usr/hwpf/hwp/initfiles/p8.mcs.scom.initfile +++ b/src/usr/hwpf/hwp/initfiles/p8.mcs.scom.initfile @@ -1,9 +1,11 @@ -#-- $Id: p8.mcs.scom.initfile,v 1.21 2014/11/17 21:13:37 baysah Exp $ +#-- $Id: p8.mcs.scom.initfile,v 1.22 2015/09/23 21:23:38 baysah Exp $ #-- CHANGE HISTORY: #-------------------------------------------------------------------------------- #-- Version:|Author: | Date: | Comment: #-- --------|--------|--------|-------------------------------------------------- #-- | | | +#-- 1.22|baysah |09/18/15|- SW322180 : MCMODE0Q_L3_PREFETCH_RETRY_THRESHOLD from 0xF to 0x7 for all 4 DMI systems with SYS.ATTR_MRW_MCS_PREFETCH_RETRY_THRESHOLD. +#-- | | | #-- 1.21|baysah |11/17/14|- FW630892 : Disable MCS Read Data OctoWord Gathering to prevent dcbz starvation #-- | | |- Don't attempt to enable this workaround for MurDD1.x, because it doesn't exist. #-- | | | @@ -61,6 +63,8 @@ SyntaxVersion = 1 # running risk level 0 define ecc_bypass_disable = ((TGT1.ATTR_CHIP_EC_FEATURE_MCS_ECC_BYPASS_DISABLE != 0x0) && (SYS.ATTR_RISK_LEVEL == ENUM_ATTR_RISK_LEVEL_RL0)); +# Set MCS PrefetchA retry threshold +define def_mcs_prefA_rtry_thrd = ((SYS.ATTR_MRW_MCS_PREFETCH_RETRY_THRESHOLD == 0x00) || (SYS.ATTR_MRW_MCS_PREFETCH_RETRY_THRESHOLD >= 0x0F)); #--****************************************************************************** @@ -72,7 +76,22 @@ define ecc_bypass_disable = ((TGT1.ATTR_CHIP_EC_FEATURE_MCS_ECC_BYPASS_DISABLE ! 1 , 0b0 , any ; # MCMODE0Q_RESERVED Reserved 2 , 0b1 , any ; # MCMODE0Q_ENABLE_NS_RD_AO_SFU_FOR_DCBZ 3 , 0b1 , any ; # MCMODE0Q_ENABLE_CENTAUR_LOCAL_CHECKSTOP_COMMAND - 4:7 , 0xF , any ; # MCMODE0Q_L3_PREFETCH_RETRY_THRESHOLD +# 4:7 , 0xF , any ; # MCMODE0Q_L3_PREFETCH_RETRY_THRESHOLD (actual value is 2x register value => 15 x 2 = 30) + 4:7 , 0xF , (def_mcs_prefA_rtry_thrd); # MCMODE0Q_L3_PREFETCH_RETRY_THRESHOLD + 4:7 , 0x1 , (SYS.ATTR_MRW_MCS_PREFETCH_RETRY_THRESHOLD == 0x01); # MCMODE0Q_L3_PREFETCH_RETRY_THRESHOLD + 4:7 , 0x2 , (SYS.ATTR_MRW_MCS_PREFETCH_RETRY_THRESHOLD == 0x02); # MCMODE0Q_L3_PREFETCH_RETRY_THRESHOLD + 4:7 , 0x3 , (SYS.ATTR_MRW_MCS_PREFETCH_RETRY_THRESHOLD == 0x03); # MCMODE0Q_L3_PREFETCH_RETRY_THRESHOLD + 4:7 , 0x4 , (SYS.ATTR_MRW_MCS_PREFETCH_RETRY_THRESHOLD == 0x04); # MCMODE0Q_L3_PREFETCH_RETRY_THRESHOLD + 4:7 , 0x5 , (SYS.ATTR_MRW_MCS_PREFETCH_RETRY_THRESHOLD == 0x05); # MCMODE0Q_L3_PREFETCH_RETRY_THRESHOLD + 4:7 , 0x6 , (SYS.ATTR_MRW_MCS_PREFETCH_RETRY_THRESHOLD == 0x06); # MCMODE0Q_L3_PREFETCH_RETRY_THRESHOLD + 4:7 , 0x7 , (SYS.ATTR_MRW_MCS_PREFETCH_RETRY_THRESHOLD == 0x07); # MCMODE0Q_L3_PREFETCH_RETRY_THRESHOLD + 4:7 , 0x8 , (SYS.ATTR_MRW_MCS_PREFETCH_RETRY_THRESHOLD == 0x08); # MCMODE0Q_L3_PREFETCH_RETRY_THRESHOLD + 4:7 , 0x9 , (SYS.ATTR_MRW_MCS_PREFETCH_RETRY_THRESHOLD == 0x09); # MCMODE0Q_L3_PREFETCH_RETRY_THRESHOLD + 4:7 , 0xA , (SYS.ATTR_MRW_MCS_PREFETCH_RETRY_THRESHOLD == 0x0A); # MCMODE0Q_L3_PREFETCH_RETRY_THRESHOLD + 4:7 , 0xB , (SYS.ATTR_MRW_MCS_PREFETCH_RETRY_THRESHOLD == 0x0B); # MCMODE0Q_L3_PREFETCH_RETRY_THRESHOLD + 4:7 , 0xC , (SYS.ATTR_MRW_MCS_PREFETCH_RETRY_THRESHOLD == 0x0C); # MCMODE0Q_L3_PREFETCH_RETRY_THRESHOLD + 4:7 , 0xD , (SYS.ATTR_MRW_MCS_PREFETCH_RETRY_THRESHOLD == 0x0D); # MCMODE0Q_L3_PREFETCH_RETRY_THRESHOLD + 4:7 , 0xE , (SYS.ATTR_MRW_MCS_PREFETCH_RETRY_THRESHOLD == 0x0E); # MCMODE0Q_L3_PREFETCH_RETRY_THRESHOLD # 8:11 , 0x0 , any ; # MCMODE0Q_Number_of_CL_Entries_Reserved_for_Read # 8:11 , 0x1 , (SYS.ATTR_PM_SLEEP_ENABLE == 1) ; # CAPI Deadlock workaround 8:11 , 0x1 , any ; # CAPI Deadlock workaround |
