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authorThi Tran <thi@us.ibm.com>2013-12-23 12:26:43 -0600
committerA. Patrick Williams III <iawillia@us.ibm.com>2014-01-10 11:07:54 -0600
commit4884c854b3fe4ade26ad62a55818573198474c22 (patch)
tree00c6ca6cd3e8d618d184ca9e853dd0e497fcb8db /src/usr/hwpf
parent33e3db975646adbcfbf27c993aba6da720ec8a20 (diff)
downloadtalos-hostboot-4884c854b3fe4ade26ad62a55818573198474c22.tar.gz
talos-hostboot-4884c854b3fe4ade26ad62a55818573198474c22.zip
INITPROC: Hostboot - SW237958 - Add proc_thermal_sync
Change-Id: I865769a88806f8cb911c4ae7d5f1db6ba8869724 CQ:SW237958 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/7852 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/hwpf')
-rw-r--r--src/usr/hwpf/hwp/dram_initialization/dram_initialization.C141
-rw-r--r--src/usr/hwpf/hwp/dram_initialization/makefile9
-rwxr-xr-xsrc/usr/hwpf/hwp/dram_initialization/proc_throttle_sync/proc_throttle_sync.C259
-rwxr-xr-xsrc/usr/hwpf/hwp/dram_initialization/proc_throttle_sync/proc_throttle_sync.H72
-rw-r--r--src/usr/hwpf/hwp/dram_initialization/proc_throttle_sync/proc_throttle_sync_errors.xml32
-rw-r--r--src/usr/hwpf/hwp/dram_training/dram_training.C122
-rw-r--r--src/usr/hwpf/hwp/dram_training/makefile3
-rw-r--r--src/usr/hwpf/hwp/proc_chip_ec_feature.xml10
-rw-r--r--src/usr/hwpf/makefile3
9 files changed, 564 insertions, 87 deletions
diff --git a/src/usr/hwpf/hwp/dram_initialization/dram_initialization.C b/src/usr/hwpf/hwp/dram_initialization/dram_initialization.C
index 4e669d1a1..c3d719010 100644
--- a/src/usr/hwpf/hwp/dram_initialization/dram_initialization.C
+++ b/src/usr/hwpf/hwp/dram_initialization/dram_initialization.C
@@ -5,7 +5,7 @@
/* */
/* IBM CONFIDENTIAL */
/* */
-/* COPYRIGHT International Business Machines Corp. 2012,2013 */
+/* COPYRIGHT International Business Machines Corp. 2012,2014 */
/* */
/* p1 */
/* */
@@ -34,7 +34,6 @@
// Includes
/******************************************************************************/
#include <stdint.h>
-
#include <trace/interface.H>
#include <initservice/taskargs.H>
#include <errl/errlentry.H>
@@ -71,6 +70,7 @@
#include "proc_pcie_config/proc_pcie_config.H"
#include "proc_exit_cache_contained/proc_exit_cache_contained.H"
#include "mss_power_cleanup/mss_power_cleanup.H"
+#include "proc_throttle_sync/proc_throttle_sync.H"
//remove these once memory setup workaround is removed
#include <devicefw/driverif.H>
#include <vpd/spdenums.H>
@@ -244,57 +244,117 @@ void* call_mss_memdiag( void *io_pArgs )
void* call_mss_thermal_init( void *io_pArgs )
{
errlHndl_t l_errl = NULL;
-
IStepError l_StepError;
- TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "call_mss_thermal_init entry" );
+ do
+ {
+ // Get all Centaur targets
+ TARGETING::TargetHandleList l_memBufTargetList;
+ getAllChips(l_memBufTargetList, TYPE_MEMBUF );
- // Get all Centaur targets
- TARGETING::TargetHandleList l_memBufTargetList;
- getAllChips(l_memBufTargetList, TYPE_MEMBUF );
+ // --------------------------------------------------------------------
+ // run mss_thermal_init on all Centaurs
+ // --------------------------------------------------------------------
+ for (TargetHandleList::const_iterator
+ l_iter = l_memBufTargetList.begin();
+ l_iter != l_memBufTargetList.end();
+ ++l_iter)
+ {
+ // make a local copy of the target for ease of use
+ const TARGETING::Target* l_pCentaur = *l_iter;
- // --------------------------------------------------------------------
- // run mss_thermal_init on all Centaurs
- // --------------------------------------------------------------------
- for (TargetHandleList::const_iterator
- l_iter = l_memBufTargetList.begin();
- l_iter != l_memBufTargetList.end();
- ++l_iter)
- {
- // make a local copy of the target for ease of use
- const TARGETING::Target* l_pCentaur = *l_iter;
+ // write HUID of target
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "target HUID %.8X", TARGETING::get_huid(l_pCentaur));
- // write HUID of target
- TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
- "target HUID %.8X", TARGETING::get_huid(l_pCentaur));
+ // cast OUR type of target to a FAPI type of target.
+ const fapi::Target l_fapi_pCentaur( TARGET_TYPE_MEMBUF_CHIP,
+ (const_cast<TARGETING::Target*>(l_pCentaur)) );
- // cast OUR type of target to a FAPI type of target.
- const fapi::Target l_fapi_pCentaur( TARGET_TYPE_MEMBUF_CHIP,
- (const_cast<TARGETING::Target*>(l_pCentaur)) );
+ // Current run on target
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Running call_mss_thermal_init HWP on "
+ "target HUID %.8X", TARGETING::get_huid(l_pCentaur));
- // call the HWP with each fapi::Target
- FAPI_INVOKE_HWP( l_errl, mss_thermal_init, l_fapi_pCentaur );
- if ( l_errl )
- {
- TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
- "ERROR 0x%.8X: mss_thermal_init HWP returns error",
- l_errl->reasonCode());
+ // call the HWP with each fapi::Target
+ FAPI_INVOKE_HWP( l_errl, mss_thermal_init, l_fapi_pCentaur );
- // capture the target data in the elog
- ErrlUserDetailsTarget(l_pCentaur).addToLog( l_errl );
+ if ( l_errl )
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR 0x%.8X: mss_thermal_init HWP returns error",
+ l_errl->reasonCode());
- // Create IStep error log and cross reference to error that occurred
- l_StepError.addErrorDetails( l_errl );
+ // capture the target data in the elog
+ ErrlUserDetailsTarget(l_pCentaur).addToLog( l_errl );
- // Commit Error
- errlCommit( l_errl, HWPF_COMP_ID );
+ // Create IStep error log and cross reference to error that occurred
+ l_StepError.addErrorDetails( l_errl );
+ // Commit Error
+ errlCommit( l_errl, HWPF_COMP_ID );
+
+ break;
+ }
+ else
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "SUCCESS : mss_thermal_init HWP( )" );
+ }
+ }
+ if (l_errl)
+ {
break;
}
- }
+ // Run proc throttle sync
+ // Get all functional proc chip targets
+ TARGETING::TargetHandleList l_cpuTargetList;
+ getAllChips(l_cpuTargetList, TYPE_PROC);
+
+ for (TARGETING::TargetHandleList::const_iterator
+ l_cpuIter = l_cpuTargetList.begin();
+ l_cpuIter != l_cpuTargetList.end();
+ ++l_cpuIter)
+ {
+ const TARGETING::Target* l_pTarget = *l_cpuIter;
+ fapi::Target l_fapiproc_target( TARGET_TYPE_PROC_CHIP,
+ (const_cast<TARGETING::Target*>(l_pTarget)));
+
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Running proc_throttle_sync HWP on "
+ "target HUID %.8X", TARGETING::get_huid(l_pTarget));
+
+ // Call proc_throttle_sync
+ FAPI_INVOKE_HWP( l_errl, proc_throttle_sync, l_fapiproc_target );
+
+ if (l_errl)
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR 0x%.8X: proc_throttle_sync HWP returns error",
+ l_errl->reasonCode());
+
+ // Capture the target data in the elog
+ ErrlUserDetailsTarget(l_pTarget).addToLog(l_errl);
+
+ // Create IStep error log and cross reference to error that occurred
+ l_StepError.addErrorDetails( l_errl );
+
+ // Commit Error
+ errlCommit( l_errl, HWPF_COMP_ID );
+
+ break;
+ }
+ else
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "SUCCESS : proc_throttle_sync HWP( )" );
+ }
+ }
+
+ } while (0);
+
if(l_StepError.isNull())
{
@@ -302,15 +362,10 @@ void* call_mss_thermal_init( void *io_pArgs )
"SUCCESS : call_mss_thermal_init" );
}
-
- TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "call_mss_thermal_init exit" );
-
// end task, returning any errorlogs to IStepDisp
return l_StepError.getErrorHandle();
}
-
//
// Wrapper function to call proc_pcie_config
//
diff --git a/src/usr/hwpf/hwp/dram_initialization/makefile b/src/usr/hwpf/hwp/dram_initialization/makefile
index e796a8c23..d1d4fe57c 100644
--- a/src/usr/hwpf/hwp/dram_initialization/makefile
+++ b/src/usr/hwpf/hwp/dram_initialization/makefile
@@ -5,7 +5,7 @@
#
# IBM CONFIDENTIAL
#
-# COPYRIGHT International Business Machines Corp. 2012,2013
+# COPYRIGHT International Business Machines Corp. 2012,2014
#
# p1
#
@@ -53,7 +53,7 @@ EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/dram_initialization/mss_thermal_init
EXTRAINCDIR += ${ROOTPATH}/src/include/usr/hwpf/hwp/dram_initialization/mss_memdiag
EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/mc_config/mss_eff_config/
EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/dram_initialization/mss_power_cleanup
-
+EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/dram_initialization/proc_throttle_sync
## NOTE: add new object files when you add a new HWP
OBJS = dram_initialization.o \
@@ -66,7 +66,8 @@ OBJS = dram_initialization.o \
proc_mpipl_ex_cleanup.o \
proc_mpipl_chip_cleanup.o \
mss_thermal_init.o \
- mss_power_cleanup.o
+ mss_power_cleanup.o \
+ proc_throttle_sync.o
## NOTE: add a new directory onto the vpaths when you add a new HWP
@@ -80,7 +81,7 @@ VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/dram_initialization/proc_pcie_config
VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/dram_initialization/host_mpipl_service
VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/dram_initialization/mss_thermal_init
VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/dram_initialization/mss_power_cleanup
-
+VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/dram_initialization/proc_throttle_sync
include ${ROOTPATH}/config.mk
diff --git a/src/usr/hwpf/hwp/dram_initialization/proc_throttle_sync/proc_throttle_sync.C b/src/usr/hwpf/hwp/dram_initialization/proc_throttle_sync/proc_throttle_sync.C
new file mode 100755
index 000000000..e25330ce7
--- /dev/null
+++ b/src/usr/hwpf/hwp/dram_initialization/proc_throttle_sync/proc_throttle_sync.C
@@ -0,0 +1,259 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/hwpf/hwp/dram_initialization/proc_throttle_sync/proc_throttle_sync.C $ */
+/* */
+/* IBM CONFIDENTIAL */
+/* */
+/* COPYRIGHT International Business Machines Corp. 2013,2014 */
+/* */
+/* p1 */
+/* */
+/* Object Code Only (OCO) source materials */
+/* Licensed Internal Code Source Materials */
+/* IBM HostBoot Licensed Internal Code */
+/* */
+/* The source code for this program is not published or otherwise */
+/* divested of its trade secrets, irrespective of what has been */
+/* deposited with the U.S. Copyright Office. */
+/* */
+/* Origin: 30 */
+/* */
+/* IBM_PROLOG_END_TAG */
+// $Id: proc_throttle_sync.C,v 1.5 2013/12/13 18:55:31 bellows Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_throttle_sync.C,v $
+//------------------------------------------------------------------------------
+// *! (C) Copyright International Business Machines Corp. 2013
+// *! All Rights Reserved -- Property of IBM
+// *! *** IBM Confidential ***
+// *! Licensed material - Program property of IBM
+// *! Refer to copyright instructions form no. G120-2083
+// *! Created on Tue Nov 12 2013 at 13:42:15
+//------------------------------------------------------------------------------
+// *! TITLE : proc_throttle_sync
+// *! DESCRIPTION : see additional comments below
+// *! OWNER NAME : Bellows Mark D.Email: bellows@us.ibm.com
+// *! BACKUP NAME : Email: ______@us.ibm.com
+
+// *! ADDITIONAL COMMENTS :
+//
+//------------------------------------------------------------------------------
+// Don't forget to create CVS comments when you check in your changes!
+//------------------------------------------------------------------------------
+// CHANGE HISTORY:
+//------------------------------------------------------------------------------
+// Version:| Author: | Date: | Comment:
+//---------|----------|---------|-----------------------------------------------
+// 1.5 | bellows |13-DEC-13| One missed firmware review comment
+// 1.4 | bellows |13-DEC-13| Firmware review updates
+// 1.3 | bellows |06-DEC-13| Handle the MCS functional but no centaur case
+// 1.2 | bellows |25-NOV-13| Functional Debug Performed
+// 1.1 | bellows |12-NOV-13| Created.
+#include <fapi.H>
+#include <proc_throttle_sync.H>
+#include <p8_scom_addresses.H>
+
+extern "C" {
+
+ using namespace fapi;
+
+ const uint32_t MAX_SYNC_RETRIES = 1000;
+// run on one processor
+ ReturnCode proc_throttle_sync(fapi::Target & i_target_proc) {
+
+ ReturnCode rc;
+ ecmdDataBufferBase mask_buffer_64(64);
+ ecmdDataBufferBase data_buffer_64(64);
+ uint8_t l_attr_cen_ec_throttle_sync_possible;
+ uint32_t rc_ecmd;
+ uint8_t l_proc_attached_centaurs=0;
+ uint8_t l_summary_sync_possible=true;
+ uint32_t i=0;
+ std::vector<fapi::Target> l_target_attached_mcs;
+ fapi::Target cen_target;
+
+ do {
+ // determine how far into the IPL we have gone
+ rc = fapiGetChildChiplets( i_target_proc, TARGET_TYPE_MCS_CHIPLET, l_target_attached_mcs );
+ if (rc)
+ {
+ FAPI_ERR("Failed to find attached mcs\n");
+ break;
+ }
+
+// find the one mcs
+// also form the centaur vector
+ uint8_t theonemcs=0xff; // index into the MCS vector for the one MCS
+ uint8_t l_functional;
+ uint8_t unit_num[8];
+ uint8_t pos_attr_data;
+
+ for(i=0; i<8; i++) unit_num[i]=0xff;
+ for(i=0; i < l_target_attached_mcs.size(); i++) {
+ FAPI_INF("working on mcs %s\n", l_target_attached_mcs[i].toEcmdString());
+
+ rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_target_attached_mcs[i], pos_attr_data);
+ if(rc) {
+ FAPI_ERR("ERROR: Unable to get ATTR_CHIP_UNIT_POS\n");
+ break;
+ }
+
+
+ rc = fapiGetOtherSideOfMemChannel( l_target_attached_mcs[i], cen_target );
+ if (rc)
+ {
+ FAPI_INF("--> this mcs does not have an attached centaur!\n");
+ rc=fapi::FAPI_RC_SUCCESS;
+ }
+ else {
+ unit_num[pos_attr_data] = i; // save in index back into the uint_num array
+
+ cen_target.setType(TARGET_TYPE_MEMBUF_CHIP);
+
+ // find out if this centaur can do a sync. They should all be the same. Give up if any aren't
+ // capable
+ rc = FAPI_ATTR_GET(ATTR_CEN_EC_THROTTLE_SYNC_POSSIBLE, &cen_target, l_attr_cen_ec_throttle_sync_possible);
+ if(rc) break;
+
+ if( ! l_attr_cen_ec_throttle_sync_possible) { // one or more are not DD2
+ FAPI_INF("--> the attached centaur is not capable of this type of sync\n");
+ l_summary_sync_possible=false;
+ }
+
+ // all functional centaurs form a vector to do a sync on
+ rc = FAPI_ATTR_GET(ATTR_FUNCTIONAL, &cen_target, l_functional);
+ if(rc) {
+ FAPI_ERR("Could not get ATTR_FUNCTIONAL");
+ break;
+ }
+ if(l_functional) {
+ l_proc_attached_centaurs |= ( 0x80 >> pos_attr_data );
+ }
+ }
+
+ }
+
+
+
+ if(l_summary_sync_possible) {
+ FAPI_INF("--> Because sync possible, running procedure\n");
+
+// SYNC PROCEDURE:
+// 1.) Determined the MCS to be the master
+// Choose MC2.MCS0, since its on both Murano and Venice.
+// However, if its deconfigured then the code will have to determine the next master per processor chip.
+// [ This is determined by the platform. The suggestion is to use MC2.MCS0, but if that is not available, pick a different one ]
+ // select the one
+ if(unit_num[4] != 0xFF) theonemcs=unit_num[4];
+ else if(unit_num[5] != 0xFF) theonemcs=unit_num[5];
+ else if(unit_num[6] != 0xFF) theonemcs=unit_num[6];
+ else if(unit_num[7] != 0xFF) theonemcs=unit_num[7];
+ else if(unit_num[0] != 0xFF) theonemcs=unit_num[0];
+ else if(unit_num[1] != 0xFF) theonemcs=unit_num[1];
+ else if(unit_num[2] != 0xFF) theonemcs=unit_num[2];
+ else if(unit_num[3] != 0xFF) theonemcs=unit_num[3];
+ else {
+ FAPI_IMP("Did not find a valid MCS on this processor %s\n", i_target_proc.toEcmdString());
+ break;
+ }
+
+ FAPI_INF("--> the one mcs is %s\n", l_target_attached_mcs[theonemcs].toEcmdString() );
+// 2.) Select which MCS to be the targets per processor. You'll want to select the configured MCS's with Centaur attached, but it might still work if you select all of them.
+// Bits 0:7 of MCSYNC Register (Scom addr 201180B) are the select bits. These bits should be set on the master only. They tell the master, which targets to send the sync commands.
+//
+// Here's the mapping, if you wish to select the configured MCS's only. The red MCS's below are only on Venice chips.
+// Bit 0: MC0.MCS0
+// Bit 1: MC0.MCS1
+// Bit 2: MC1.MCS0
+// Bit 3: MC1.MCS1
+// Bit 4: MC2.MCS0
+// Bit 5: MC2.MCS1
+// Bit 6: MC3.MCS0
+// Bit 7: MC3.MCS1
+ bool l_sync_complete=false;
+ uint32_t l_tries=0;
+ while ( l_sync_complete == false && l_tries < 1000 ) {
+ rc_ecmd = ECMD_DBUF_SUCCESS;
+ FAPI_INF("--> Doing the sync sequence try is %d\n", l_tries );
+ rc_ecmd |= data_buffer_64.clearBit(0,64);
+ rc_ecmd |= mask_buffer_64.clearBit(0,64);
+
+ FAPI_INF("--> the vector of attached centaurs is %02x\n", l_proc_attached_centaurs );
+ for(i=0; i<8; i++) {
+ if((l_proc_attached_centaurs>>(7-i)) & 0x1) {
+ rc_ecmd |= data_buffer_64.setBit(i);
+ }
+ rc_ecmd |= mask_buffer_64.setBit(i);
+ }
+
+// 3.) Setup the sync commands to issue to centaur on the master MCS
+// Bit 12 of MCSYNC Register is N/M Sync (Scom addr 201180B)
+// Bit 15 of MCSYNC Register is PC Sync (Scom addr 201180B)
+
+ rc_ecmd |= data_buffer_64.setBit(12);
+ rc_ecmd |= mask_buffer_64.setBit(12);
+ rc_ecmd |= data_buffer_64.setBit(15);
+ rc_ecmd |= mask_buffer_64.setBit(15);
+ if(rc_ecmd) {
+ rc.setEcmdError(rc_ecmd);
+ break;
+ }
+ rc = fapiPutScomUnderMask(l_target_attached_mcs[theonemcs], MCS_MCSYNC_0x0201180B, data_buffer_64, mask_buffer_64);
+ if(rc) break;
+
+// 4.) Generate the Sync Command to Centaur from the master MCS
+// Bit 0 of MCS Mode3 Register (Scom addr 201180A)
+// (This bit needs a reset before another set, it does not reset automatically)
+ rc_ecmd = ECMD_DBUF_SUCCESS;
+ rc_ecmd |= data_buffer_64.clearBit(0,64);
+ rc_ecmd |= data_buffer_64.setBit(0);
+ rc_ecmd |= mask_buffer_64.clearBit(0,64);
+ rc_ecmd |= mask_buffer_64.setBit(0);
+ if(rc_ecmd) {
+ rc.setEcmdError(rc_ecmd);
+ break;
+ }
+
+ rc = fapiPutScomUnderMask(l_target_attached_mcs[theonemcs], MCS_MODE3_REGISTER_0x0201180A, data_buffer_64, mask_buffer_64);
+ if(rc) break;
+
+ // this resets the before mentioned bit
+ rc_ecmd = data_buffer_64.clearBit(0);
+ if(rc_ecmd) {
+ rc.setEcmdError(rc_ecmd);
+ break;
+ }
+ rc = fapiPutScomUnderMask(l_target_attached_mcs[theonemcs], MCS_MODE3_REGISTER_0x0201180A, data_buffer_64, mask_buffer_64);
+ if(rc) break;
+
+// 5.) Read the SYNC status register on the master MCS
+// Bits 1:7 of MCS Mode3 Register (Scom addr 201180A)
+// If any status bit is set, this indicates that a replay has occurred on the DMI channel, repeat steps 3 and 4 above.
+// (actually to build the register back up, we go to step 2 to pick up the centaurs again)
+ rc = fapiGetScom(l_target_attached_mcs[theonemcs], MCS_MODE3_REGISTER_0x0201180A, data_buffer_64);
+ if(rc) break;
+
+ if(data_buffer_64.isBitClear(1,7) == true) {
+ l_sync_complete=true;
+ }
+ else {
+ l_tries++;
+ FAPI_INF("--> Not all ready, reissue the sync, tries are %d\n", l_tries );
+ l_sync_complete=false;
+ }
+ }
+ if(rc) break;
+ if (l_tries == MAX_SYNC_RETRIES) {
+ FAPI_ERR("This processor did not see a successful MCSYNC\n");
+ FAPI_SET_HWP_ERROR(rc, RC_PROC_MCSYNC_THERMAL_RETRY_EXCEEDED);
+ break;
+ }
+ FAPI_INF("--> Success in running the sync sequence tries were %d\n", l_tries );
+
+ }
+ } while(0);
+
+ return rc;
+ }
+
+} // extern "C"
diff --git a/src/usr/hwpf/hwp/dram_initialization/proc_throttle_sync/proc_throttle_sync.H b/src/usr/hwpf/hwp/dram_initialization/proc_throttle_sync/proc_throttle_sync.H
new file mode 100755
index 000000000..c2ac20894
--- /dev/null
+++ b/src/usr/hwpf/hwp/dram_initialization/proc_throttle_sync/proc_throttle_sync.H
@@ -0,0 +1,72 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/hwpf/hwp/dram_initialization/proc_throttle_sync/proc_throttle_sync.H $ */
+/* */
+/* IBM CONFIDENTIAL */
+/* */
+/* COPYRIGHT International Business Machines Corp. 2013,2014 */
+/* */
+/* p1 */
+/* */
+/* Object Code Only (OCO) source materials */
+/* Licensed Internal Code Source Materials */
+/* IBM HostBoot Licensed Internal Code */
+/* */
+/* The source code for this program is not published or otherwise */
+/* divested of its trade secrets, irrespective of what has been */
+/* deposited with the U.S. Copyright Office. */
+/* */
+/* Origin: 30 */
+/* */
+/* IBM_PROLOG_END_TAG */
+// $Id: proc_throttle_sync.H,v 1.2 2013/11/25 21:13:13 bellows Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_throttle_sync.H,v $
+//------------------------------------------------------------------------------
+// *! (C) Copyright International Business Machines Corp. 2013
+// *! All Rights Reserved -- Property of IBM
+// *! *** IBM Confidential ***
+// *! Licensed material - Program property of IBM
+// *! Refer to copyright instructions form no. G120-2083
+// *! Created on Tue Nov 12 2013 at 13:42:15
+//------------------------------------------------------------------------------
+// *! TITLE : proc_throttle_sync
+// *! DESCRIPTION : see additional comments below
+// *! OWNER NAME : Bellows Mark D.Email: bellows@us.ibm.com
+// *! BACKUP NAME : Email: ______@us.ibm.com
+
+// *! ADDITIONAL COMMENTS :
+//
+//------------------------------------------------------------------------------
+// Don't forget to create CVS comments when you check in your changes!
+//------------------------------------------------------------------------------
+// CHANGE HISTORY:
+//------------------------------------------------------------------------------
+// Version:| Author: | Date: | Comment:
+//---------|----------|---------|-----------------------------------------------
+// 1.2 | bellows |25-NOV-13| Updated call to procedure
+// 1.1 | bellows |12-NOV-13| Created.
+#ifndef __PROC_THROTTLE_SYNC_H
+#define __PROC_THROTTLE_SYNC_H
+
+#include <fapi.H>
+#include <p8_scom_addresses.H>
+
+typedef fapi::ReturnCode (*proc_throttle_sync_FP_t)(fapi::Target & i_target_proc );
+
+extern "C"
+{
+ using namespace fapi;
+
+/**
+ * @brief proc_throttle_sync procedure. Sync all MBA below this processor when changing thermal parameters
+ *
+ * @param[in] fapi::Target i_target_proc, // Platform runs this on each processor *
+ * @return ReturnCode
+ */
+
+ ReturnCode proc_throttle_sync(fapi::Target & i_target_proc );
+
+} // extern "C"
+
+#endif
diff --git a/src/usr/hwpf/hwp/dram_initialization/proc_throttle_sync/proc_throttle_sync_errors.xml b/src/usr/hwpf/hwp/dram_initialization/proc_throttle_sync/proc_throttle_sync_errors.xml
new file mode 100644
index 000000000..983b2cb88
--- /dev/null
+++ b/src/usr/hwpf/hwp/dram_initialization/proc_throttle_sync/proc_throttle_sync_errors.xml
@@ -0,0 +1,32 @@
+<!-- IBM_PROLOG_BEGIN_TAG -->
+<!-- This is an automatically generated prolog. -->
+<!-- -->
+<!-- $Source: src/usr/hwpf/hwp/dram_initialization/proc_throttle_sync/proc_throttle_sync_errors.xml $ -->
+<!-- -->
+<!-- IBM CONFIDENTIAL -->
+<!-- -->
+<!-- COPYRIGHT International Business Machines Corp. 2013,2014 -->
+<!-- -->
+<!-- p1 -->
+<!-- -->
+<!-- Object Code Only (OCO) source materials -->
+<!-- Licensed Internal Code Source Materials -->
+<!-- IBM HostBoot Licensed Internal Code -->
+<!-- -->
+<!-- The source code for this program is not published or otherwise -->
+<!-- divested of its trade secrets, irrespective of what has been -->
+<!-- deposited with the U.S. Copyright Office. -->
+<!-- -->
+<!-- Origin: 30 -->
+<!-- -->
+<!-- IBM_PROLOG_END_TAG -->
+<!-- $Id: proc_throttle_sync_errors.xml,v 1.2 2013/11/25 21:13:20 bellows Exp $ -->
+<!-- Error definitions for proc_enable_reconfig procedure -->
+
+<hwpErrors>
+ <!-- *********************************************************************** -->
+ <hwpError>
+ <rc>RC_PROC_MCSYNC_THERMAL_RETRY_EXCEEDED</rc>
+ <description>The DMI lost the sync operation too many times</description>
+ </hwpError>
+</hwpErrors>
diff --git a/src/usr/hwpf/hwp/dram_training/dram_training.C b/src/usr/hwpf/hwp/dram_training/dram_training.C
index c111cea30..0e16fd7d9 100644
--- a/src/usr/hwpf/hwp/dram_training/dram_training.C
+++ b/src/usr/hwpf/hwp/dram_training/dram_training.C
@@ -5,7 +5,7 @@
/* */
/* IBM CONFIDENTIAL */
/* */
-/* COPYRIGHT International Business Machines Corp. 2012,2013 */
+/* COPYRIGHT International Business Machines Corp. 2012,2014 */
/* */
/* p1 */
/* */
@@ -76,6 +76,7 @@ const uint8_t VPO_NUM_OF_MEMBUF_TO_RUN = UNLIMITED_RUN;
#include "mss_draminit_trainadv/mss_draminit_training_advanced.H"
#include "mss_draminit_mc/mss_draminit_mc.H"
#include "mss_dimm_power_test/mss_dimm_power_test.H"
+#include "proc_throttle_sync.H"
namespace DRAM_TRAINING
{
@@ -405,53 +406,106 @@ void* call_mss_scominit( void *io_pArgs )
TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_mss_scominit entry" );
- // Get all Centaur targets
- TARGETING::TargetHandleList l_membufTargetList;
- getAllChips(l_membufTargetList, TYPE_MEMBUF);
-
- for (TargetHandleList::const_iterator
- l_membuf_iter = l_membufTargetList.begin();
- l_membuf_iter != l_membufTargetList.end();
- ++l_membuf_iter)
+ do
{
- // make a local copy of the target for ease of use
- const TARGETING::Target* l_pCentaur = *l_membuf_iter;
+ // Get all Centaur targets
+ TARGETING::TargetHandleList l_membufTargetList;
+ getAllChips(l_membufTargetList, TYPE_MEMBUF);
+
+ for (TargetHandleList::const_iterator
+ l_membuf_iter = l_membufTargetList.begin();
+ l_membuf_iter != l_membufTargetList.end();
+ ++l_membuf_iter)
+ {
+ // make a local copy of the target for ease of use
+ const TARGETING::Target* l_pCentaur = *l_membuf_iter;
- // Dump current run on target
- TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "Running mss_scominit HWP on "
- "target HUID %.8X", TARGETING::get_huid(l_pCentaur));
+ // Dump current run on target
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Running mss_scominit HWP on "
+ "target HUID %.8X", TARGETING::get_huid(l_pCentaur));
- // Cast to a FAPI type of target.
- const fapi::Target l_fapi_centaur( TARGET_TYPE_MEMBUF_CHIP,
- (const_cast<TARGETING::Target*>(l_pCentaur)) );
+ // Cast to a FAPI type of target.
+ const fapi::Target l_fapi_centaur( TARGET_TYPE_MEMBUF_CHIP,
+ (const_cast<TARGETING::Target*>(l_pCentaur)) );
- // call the HWP with each fapi::Target
- FAPI_INVOKE_HWP(l_err, mss_scominit, l_fapi_centaur);
+ // call the HWP with each fapi::Target
+ FAPI_INVOKE_HWP(l_err, mss_scominit, l_fapi_centaur);
- if (l_err)
- {
- TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
- "ERROR 0x%.8X: mss_scominit HWP returns error",
- l_err->reasonCode());
+ if (l_err)
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR 0x%.8X: mss_scominit HWP returns error",
+ l_err->reasonCode());
- // capture the target data in the elog
- ErrlUserDetailsTarget(l_pCentaur).addToLog(l_err);
+ // capture the target data in the elog
+ ErrlUserDetailsTarget(l_pCentaur).addToLog(l_err);
- // Create IStep error log and cross reference to error that occurred
- l_stepError.addErrorDetails( l_err );
+ // Create IStep error log and cross reference to error that occurred
+ l_stepError.addErrorDetails( l_err );
- // Commit Error
- errlCommit( l_err, HWPF_COMP_ID );
+ // Commit Error
+ errlCommit( l_err, HWPF_COMP_ID );
+ break;
+ }
+ else
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "SUCCESS : mss_scominit HWP( )" );
+ }
+ }
+ if (l_err)
+ {
break;
}
- else
+
+ // Run proc throttle sync
+ // Get all functional proc chip targets
+ TARGETING::TargetHandleList l_cpuTargetList;
+ getAllChips(l_cpuTargetList, TYPE_PROC);
+
+ for (TARGETING::TargetHandleList::const_iterator
+ l_cpuIter = l_cpuTargetList.begin();
+ l_cpuIter != l_cpuTargetList.end();
+ ++l_cpuIter)
{
+ const TARGETING::Target* l_pTarget = *l_cpuIter;
+ fapi::Target l_fapiproc_target( TARGET_TYPE_PROC_CHIP,
+ (const_cast<TARGETING::Target*>(l_pTarget)));
+
TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "SUCCESS : mss_scominit HWP( )" );
+ "Running proc_throttle_sync HWP on "
+ "target HUID %.8X", TARGETING::get_huid(l_pTarget));
+
+ // Call proc_throttle_sync
+ FAPI_INVOKE_HWP( l_err, proc_throttle_sync, l_fapiproc_target );
+
+ if (l_err)
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR 0x%.8X: proc_throttle_sync HWP returns error",
+ l_err->reasonCode());
+
+ // Capture the target data in the elog
+ ErrlUserDetailsTarget(l_pTarget).addToLog(l_err);
+
+ // Create IStep error log and cross reference to error that occurred
+ l_stepError.addErrorDetails( l_err );
+
+ // Commit Error
+ errlCommit( l_err, HWPF_COMP_ID );
+
+ break;
+ }
+ else
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "SUCCESS : proc_throttle_sync HWP( )" );
+ }
}
- }
+
+ } while (0);
TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_mss_scominit exit" );
diff --git a/src/usr/hwpf/hwp/dram_training/makefile b/src/usr/hwpf/hwp/dram_training/makefile
index a64f000c8..e13d5ac22 100644
--- a/src/usr/hwpf/hwp/dram_training/makefile
+++ b/src/usr/hwpf/hwp/dram_training/makefile
@@ -5,7 +5,7 @@
#
# IBM CONFIDENTIAL
#
-# COPYRIGHT International Business Machines Corp. 2012,2013
+# COPYRIGHT International Business Machines Corp. 2012,2014
#
# p1
#
@@ -52,6 +52,7 @@ EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build
EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/dram_training/mss_dimm_power_test
EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/dram_training/mss_lrdimm_funcs
EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/dram_training/cen_stopclocks
+EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/dram_initialization/proc_throttle_sync
## NOTE: add new object files when you add a new HWP
OBJS = dram_training.o \
diff --git a/src/usr/hwpf/hwp/proc_chip_ec_feature.xml b/src/usr/hwpf/hwp/proc_chip_ec_feature.xml
index 1e8f68c2f..6635139e1 100644
--- a/src/usr/hwpf/hwp/proc_chip_ec_feature.xml
+++ b/src/usr/hwpf/hwp/proc_chip_ec_feature.xml
@@ -5,7 +5,7 @@
<!-- -->
<!-- IBM CONFIDENTIAL -->
<!-- -->
-<!-- COPYRIGHT International Business Machines Corp. 2013 -->
+<!-- COPYRIGHT International Business Machines Corp. 2013,2014 -->
<!-- -->
<!-- p1 -->
<!-- -->
@@ -20,8 +20,10 @@
<!-- Origin: 30 -->
<!-- -->
<!-- IBM_PROLOG_END_TAG -->
-<!-- $Id: proc_chip_ec_feature.xml,v 1.42 2013/11/14 17:02:12 stillgs Exp $ -->
+<!-- $Id: proc_chip_ec_feature.xml,v 1.43 2013/11/20 18:52:33 bellows Exp $ -->
<!-- Defines the attributes that are based on EC level -->
+
+
<attributes>
<attribute>
<id>ATTR_CHIP_EC_FEATURE_VENICE_SPECIFIC</id>
@@ -898,8 +900,8 @@
</chipEcFeature>
</attribute>
<attribute>
- <id>ATTR_PROC_EC_THROTTLE_SYNC_POSSIBLE</id>
- <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+ <id>ATTR_CEN_EC_THROTTLE_SYNC_POSSIBLE</id>
+ <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
<description>
</description>
<chipEcFeature>
diff --git a/src/usr/hwpf/makefile b/src/usr/hwpf/makefile
index b8e748ee5..83a42e544 100644
--- a/src/usr/hwpf/makefile
+++ b/src/usr/hwpf/makefile
@@ -131,7 +131,8 @@ HWP_ERROR_XML_FILES = hwp/fapiHwpErrorInfo.xml \
hwp/dram_training/mem_startclocks/cen_mem_startclocks_errors.xml \
hwp/dram_training/mem_pll_setup/cen_mem_pll_initf_errors.xml \
hwp/dram_training/mem_pll_setup/cen_mem_pll_setup_errors.xml \
- hwp/core_activate/proc_check_slw_done/proc_check_slw_done_errors.xml
+ hwp/core_activate/proc_check_slw_done/proc_check_slw_done_errors.xml \
+ hwp/dram_initialization/proc_throttle_sync/proc_throttle_sync_errors.xml
## these get generated into obj/genfiles/AttributeIds.H
HWP_ATTR_XML_FILES = hwp/memory_attributes.xml \
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