PON - HW procedures update - Set #2

RTC: 59154
Change-Id: I0c54a26265b9e9ea55fca591c8cbf3dbb7985527
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2748
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

9 files changed, 1382 insertions, 313 deletions

diff --git a/src/usr/hwpf/hwp/build_winkle_images/makefile b/src/usr/hwpf/hwp/build_winkle_images/makefile
index 6f94ad7cf..6b62cfa79 100644
--- a/src/usr/hwpf/hwp/build_winkle_images/makefile
+++ b/src/usr/hwpf/hwp/build_winkle_images/makefile
@@ -61,7 +61,9 @@ OBJS =  build_winkle_images.o   \
         p8_set_pore_bar.o       \
         p8_slw_build.o          \
         p8_xip_customize.o      \
-        p8_ring_identification.o 
+        p8_ring_identification.o  \
+        p8_slw_build.o          \
+        p8_pfet_init.o
 
 ##  NOTE: add a new directory onto the vpaths when you add a new HWP
 ##  EXAMPLE:
@@ -70,7 +72,6 @@ VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build
 VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar
 
 ##  Point to the PORE image in PNOR
-#BINARY_FILES = $(IMGDIR)/procpore.dat:d177d9a2a28f80fc282f09b145d790fa56719ba2
 BINARY_FILES = $(IMGDIR)/procpore.dat:8886974065a94f3ea83d98be88716e063bcba57e
 
 include ${ROOTPATH}/config.mk
diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pfet_control.H b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pfet_control.H
new file mode 100644
index 000000000..1c5ce25ad
--- /dev/null
+++ b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pfet_control.H
@@ -0,0 +1,126 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pfet_control.H $ */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* COPYRIGHT International Business Machines Corp. 2012                   */
+/*                                                                        */
+/* p1                                                                     */
+/*                                                                        */
+/* Object Code Only (OCO) source materials                                */
+/* Licensed Internal Code Source Materials                                */
+/* IBM HostBoot Licensed Internal Code                                    */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* Origin: 30                                                             */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+// $Id: p8_pfet_control.H,v 1.2 2012/12/12 04:28:30 stillgs Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pfet_control.H,v $
+//------------------------------------------------------------------------------
+// *|
+// *! (C) Copyright International Business Machines Corp. 2011
+// *! All Rights Reserved -- Property of IBM
+// *! *** IBM Confidential ***
+// *|
+// *! TITLE       : p8_pfet_control.H
+// *! DESCRIPTION : General routines for controlling EX chiplet PFET headers
+// *!
+// *! OWNER NAME  : Ralf Maier    Email: ralf.maier@de.ibm.com
+// *! BACKUP NAME : Greg Still    Email: stillgs@us.ibm.com
+// *!
+//------------------------------------------------------------------------------
+
+#ifndef _P8_PFETCTL_H_
+#define _P8_PFETCTL_H_
+
+
+extern "C" {
+
+#include "p8_pfet_types.H"
+
+// Overrides
+extern const uint32_t NO_ORVAL_PARM; 
+extern const uint32_t NO_ORSEL_PARM;
+extern const uint32_t OR_DISABLE;
+extern uint32_t or_val; 
+extern uint32_t or_sel; 
+
+// Domains
+extern pfet_dom_t domain;
+
+// Force operation
+extern pfet_force_t force_op;
+
+// Vret and voff selectors
+extern const int32_t FIRST_STAGE;
+extern const int32_t LAST_STAGE;
+extern const int32_t NO_SEL_PARM;
+extern int32_t vret_sel;
+extern int32_t voff_sel; 
+
+// stage_value string
+extern char * stage_values_str;
+// powup_delay_values_str
+extern char * powup_delay_values_str;
+// powdn_delay_values_str
+extern char * powdn_delay_values_str;
+
+// \todo  Define the read structure for programmatic data return
+
+//------------------------------------------------------------------------------
+// Includes
+//------------------------------------------------------------------------------
+
+
+// function pointer typedef definition for HWP call support
+typedef fapi::ReturnCode (*p8_pfet_control_FP_t) (const fapi::Target&,
+                                                uint8_t, 
+                                                pfet_dom_t,
+                                                pfet_force_t
+                                               );
+                                               
+typedef fapi::ReturnCode (*p8_pfet_read_FP_t)   (const fapi::Target&);
+
+//------------------------------------------------------------------------------
+// Constant definitions
+//------------------------------------------------------------------------------
+// Macros for easier handling of parms
+#define PFET_FORCE(target_mac, ex_mac, domain_mac, op_mac) \
+  p8_pfet_control(target_mac, ex_mac, domain_mac, op_mac);
+
+//------------------------------------------------------------------------------
+// Parameter structure definitions
+//------------------------------------------------------------------------------
+
+
+//------------------------------------------------------------------------------
+// Function prototype
+//------------------------------------------------------------------------------
+/// \param[in] i_target     Chip target
+/// \param[in] domain       Domain: BOTH, ECO, CORE
+
+/// \retval ECMD_SUCCESS if something good happens,
+/// \retval BAD_RETURN_CODE otherwise
+fapi::ReturnCode 
+p8_pfet_control(    const fapi::Target& i_target, 
+                    uint8_t             i_ex_number,
+                    pfet_dom_t          domain,
+                    pfet_force_t        op
+                 );
+
+
+fapi::ReturnCode 
+p8_pfet_read(   const fapi::Target& i_target);
+
+
+uint8_t convert_delay_to_value (uint32_t i_delay, uint32_t i_attr_proc_nest_frequency);
+
+} // extern "C"
+
+#endif // _P8_PFETCTL_H_
diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pfet_init.C b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pfet_init.C
new file mode 100644
index 000000000..a879ffc18
--- /dev/null
+++ b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pfet_init.C
@@ -0,0 +1,702 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pfet_init.C $ */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* COPYRIGHT International Business Machines Corp. 2012                   */
+/*                                                                        */
+/* p1                                                                     */
+/*                                                                        */
+/* Object Code Only (OCO) source materials                                */
+/* Licensed Internal Code Source Materials                                */
+/* IBM HostBoot Licensed Internal Code                                    */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* Origin: 30                                                             */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+// $Id: p8_pfet_init.C,v 1.1_Thi_hack 2012/12/07 20:12:27 stillgs Exp $
+// Search for @thi to see HACK of minor issues in order to compile
+// RTC 60779 is opened to make sure a revised version is worked on by Greg Stills
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pfet_init.C,v $
+//------------------------------------------------------------------------------
+// *! (C) Copyright International Business Machines Corp. 2011
+// *! All Rights Reserved -- Property of IBM
+// *! *** IBM Confidential ***
+//------------------------------------------------------------------------------
+// *! OWNER NAME: Greg Still         Email: stillgs@us.ibm.com
+// *!
+/// \file p8_pfet_init.C
+/// \brief Configure and initialize the EX PFET controllers based on
+///     attribute information and removes the override function.
+///
+/// High-level procedure flow:
+/// \verbatim
+///
+///     Check for valid parameters
+///     if PM_CONFIG {
+///         Nop (all the work is done in PM_INIT as this procedure is not run
+///         for the PM Reset path (eg, only done at IPL)
+///     else if PM_INIT {
+///         Get the delay setting held in platform attributes
+///         Convert these to hardware values
+///         for each EX chiplet {
+///             Store the Core VDD delay and VRET/VOFF values
+///             Store the Core VCS delay and VRET/VOFF values
+///             Store the ECO VDD delay and VRET/VOFF values
+///             Store the ECO VCS delay and VRET/VOFF values
+///         }
+///     } else if PM_RESET {
+///         for each EX chiplet {
+///             Restore the Core VDD delay and VRET/VOFF values
+///             Restore the Core VCS delay and VRET/VOFF values
+///             Restore the ECO VDD delay and VRET/VOFF values
+///             Restore the ECO VCS delay and VRET/VOFF values
+///     }
+///
+///  Procedure Prereq:
+///     - System clocks are running
+/// \endverbatim
+///
+//------------------------------------------------------------------------------
+
+
+// ----------------------------------------------------------------------
+// Includes
+// ----------------------------------------------------------------------
+#include "p8_pm.H"
+#include "p8_pfet_init.H"
+#include "p8_pfet_control.H"
+
+//#ifdef FAPIECMD
+extern "C" {
+//#endif
+
+
+using namespace fapi;
+
+// ----------------------------------------------------------------------
+// Constant definitions
+// ----------------------------------------------------------------------
+
+// ----------------------------------------------------------------------
+// Global variables
+// ----------------------------------------------------------------------
+
+// ----------------------------------------------------------------------
+// Function prototypes
+// ----------------------------------------------------------------------
+
+fapi::ReturnCode pfet_init(const Target& i_target);
+fapi::ReturnCode pfet_config(const Target& i_target);
+fapi::ReturnCode pfet_set_delay( const fapi::Target& i_target,
+                                 const uint64_t      i_address,
+                                 const uint8_t       i_delay0,
+                                 const uint8_t       i_delay1,
+                                 const uint32_t      i_select);
+
+// ----------------------------------------------------------------------
+// Function definitions
+// ----------------------------------------------------------------------
+
+
+/// \param[in] i_target EX target
+/// \param[in] mode     Control mode for the procedure
+///                     (PM_CONFIG, PM_INIT, PM_RESET,
+///                      PM_OVERRIDE)
+/// \param[in] domain
+/// \param[in] opcontrol
+
+/// \retval FAPI_RC_SUCCESS
+/// \retval ERROR defined in xml
+
+fapi::ReturnCode
+p8_pfet_init(const Target& i_target, uint32_t mode)
+{
+    fapi::ReturnCode      l_rc;
+
+    FAPI_INF("Executing p8_pfet_init in mode %x ....", mode);
+
+    /// -------------------------------
+    /// Configuration:  perform translation of any Platform Attributes
+    /// into Feature Attributes that are applied during Initalization
+    if (mode == PM_CONFIG)
+    {
+        FAPI_INF("PFET config...");
+        FAPI_INF("---> None is defined...");
+    }
+
+    /// -------------------------------
+    /// Initialization:  perform order or dynamic operations to initialize
+    /// the SLW using necessary Platform or Feature attributes.
+    else if (mode == PM_INIT)
+    {
+        FAPI_INF("PFET init...");
+        l_rc = pfet_init(i_target);
+    }
+
+    /// -------------------------------
+    /// Reset:  perform reset of PFETs so that it can reconfigured and
+    /// reinitialized
+    else if (mode == PM_RESET)
+    {
+        FAPI_INF("PFET reset...");
+        FAPI_INF("---> None is defined...");
+    }
+
+    /// -------------------------------
+    /// Unsupported Mode
+    else
+    {
+
+        FAPI_ERR("Unknown mode passed to p8_pfet_init. Mode %x ....", mode);
+        FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PFET_CODE_BAD_MODE);
+
+    }
+
+    return l_rc;
+}
+
+//------------------------------------------------------------------------------
+// PFET Configuration Function
+//------------------------------------------------------------------------------
+fapi::ReturnCode
+pfet_init(const Target& i_target)
+{
+    fapi::ReturnCode            l_rc;
+    uint32_t                    e_rc = 0;
+    ecmdDataBufferBase          data(64);
+
+    std::vector<fapi::Target>   l_exChiplets;
+    uint8_t                     l_functional = 0;
+    uint8_t                     l_ex_number = 0;
+    bool                        error_flag = false;
+
+    uint64_t                    address;
+
+    uint8_t                     core_vret_voff_value;
+    uint8_t                     eco_vret_voff_value;
+
+    uint32_t                    attr_proc_refclk_frequency;
+
+    uint32_t                    attr_pm_pfet_powerup_core_delay0;
+    uint32_t                    attr_pm_pfet_powerup_core_delay1;
+    uint32_t                    attr_pm_pfet_powerdown_core_delay0;
+    uint32_t                    attr_pm_pfet_powerdown_core_delay1;
+    uint32_t                    attr_pm_pfet_powerup_eco_delay0;
+    uint32_t                    attr_pm_pfet_powerup_eco_delay1;
+    uint32_t                    attr_pm_pfet_powerdown_eco_delay0;
+    uint32_t                    attr_pm_pfet_powerdown_eco_delay1;
+
+    uint8_t                     attr_pm_pfet_powerup_core_delay0_value;
+    uint8_t                     attr_pm_pfet_powerup_core_delay1_value;
+    uint32_t                    attr_pm_pfet_powerup_core_sequence_delay_select;
+    uint8_t                     attr_pm_pfet_powerdown_core_delay0_value;
+    uint8_t                     attr_pm_pfet_powerdown_core_delay1_value;
+    uint32_t                    attr_pm_pfet_powerdown_core_sequence_delay_select;
+    uint8_t                     attr_pm_pfet_powerup_eco_delay0_value;
+    uint8_t                     attr_pm_pfet_powerup_eco_delay1_value;
+    uint32_t                    attr_pm_pfet_powerup_eco_sequence_delay_select;
+    uint8_t                     attr_pm_pfet_powerdown_eco_delay0_value;
+    uint8_t                     attr_pm_pfet_powerdown_eco_delay1_value;
+    uint32_t                    attr_pm_pfet_powerdown_eco_sequence_delay_select;
+
+    /// PFET Sequencing Delays
+    ///      convert_pfet_delays() - Convert the following delays from platform
+    ///         attributes (binary in nano/ seconds) to PFET delay value feature
+    //          attributes.  The conversion uses ATTR_PROC_NEST_FREQUENCY.
+    ///       Input platform attributes
+    ///            ATTR_PM_PFET_POWERUP_CORE_DELAY0
+    ///            ATTR_PM_PFET_POWERUP_CORE_DELAY1
+    ///            ATTR_PM_PFET_POWERUP_ECO_DELAY0
+    ///            ATTR_PM_PFET_POWERUP_ECO_DELAY1
+    ///            ATTR_PM_PFET_POWERDOWN_CORE_DELAY0
+    ///            ATTR_PM_PFET_POWERDOWN_CORE_DELAY1
+    ///            ATTR_PM_PFET_POWERDOWN_ECO_DELAY0
+    ///            ATTR_PM_PFET_POWERDOWN_ECO_DELAY1
+    ///       Output feature attributes
+    ///            ATTR_PM_PFET_POWERUP_CORE_DELAY0_VALUE
+    ///            ATTR_PM_PFET_POWERUP_CORE_DELAY1_VALUE
+    ///            ATTR_PM_PFET_POWERUP_CORE_SEQUENCE_DELAY_SELECT
+    ///            ATTR_PM_PFET_POWERUP_ECO_DELAY0_VALUE
+    ///            ATTR_PM_PFET_POWERUP_ECO_DELAY1_VALUE
+    ///            ATTR_PM_PFET_POWERUP_ECO_SEQUENCE_DELAY_SELECT
+    ///            ATTR_PM_PFET_POWERDOWN_CORE_DELAY0_VALUE
+    ///            ATTR_PM_PFET_POWERDOWN_CORE_DELAY1_VALUE
+    ///            ATTR_PM_PFET_POWERDOWN_CORE_SEQUENCE_DELAY_SELECT
+    ///            ATTR_PM_PFET_POWERDOWN_ECO_DELAY0_VALUE
+    ///            ATTR_PM_PFET_POWERDOWN_ECO_DELAY1_VALUE
+    ///            ATTR_PM_PFET_POWERDOWN_ECO_SEQUENCE_DELAY_SELECT
+
+    do
+    {
+
+        FAPI_INF("Executing pfet_config...");
+
+        // Harcoded defaults that don't come via attribute
+        // Vret (not supported) = "off" (stage 0 = 0xB) for bits 0:3
+        // Voff                 = "off" (stage 01 = 0xB) for bits 4:7
+        // \todo  The scan0 values are zeros which indicate that the
+        // power won't go off.  Double check the setting below!!!
+        core_vret_voff_value = 0xBB;
+        eco_vret_voff_value = 0xBB;
+
+        //  ******************************************************************
+        //  Get Attributes for pFET Delay
+        //  ******************************************************************
+
+        // Hardcoded values (if needed)
+        //  attr_pm_pfet_powerup_core_delay0            = 100;
+        //  attr_pm_pfet_powerup_core_delay1            = 100;
+        //  attr_pm_pfet_powerdown_core_delay0          = 100;
+        //  attr_pm_pfet_powerdown_core_delay1          = 100;
+        //  attr_pm_pfet_powerup_eco_delay0             = 100;
+        //  attr_pm_pfet_powerup_eco_delay1             = 100;
+        //  attr_pm_pfet_powerdown_eco_delay0           = 100;
+        //  attr_pm_pfet_powerdown_eco_delay1           = 100;
+
+
+        /// ----------------------------------------------------------
+        l_rc = FAPI_ATTR_GET(   ATTR_FREQ_PROC_REFCLOCK,
+                                NULL,       //@thi - wrong target &i_target,
+                                attr_proc_refclk_frequency);
+        if (l_rc)
+        {
+            FAPI_ERR("fapiGetAttribute ATTR_FREQ_PROC_REFCLOCK");
+            FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PFET_GET_ATTR);
+            break;
+        }
+
+        /// ----------------------------------------------------------
+        l_rc = FAPI_ATTR_GET(   ATTR_PM_PFET_POWERUP_CORE_DELAY0,
+                                &i_target,
+                                attr_pm_pfet_powerup_core_delay0);
+        if (l_rc)
+        {
+            FAPI_ERR("fapiGetAttribute ATTR_PM_PFET_POWERUP_CORE_DELAY0");
+            FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PFET_GET_ATTR);
+            break;
+        }
+
+        /// ----------------------------------------------------------
+        l_rc = FAPI_ATTR_GET(   ATTR_PM_PFET_POWERUP_CORE_DELAY1,
+                                &i_target,
+                                attr_pm_pfet_powerup_core_delay1);
+        if (l_rc)
+        {
+            FAPI_ERR("fapiGetAttribute ATTR_PM_PFET_POWERUP_CORE_DELAY1");
+            FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PFET_GET_ATTR);
+            break;
+        }
+
+        /// ----------------------------------------------------------
+        l_rc = FAPI_ATTR_GET(   ATTR_PM_PFET_POWERDOWN_CORE_DELAY0,
+                                &i_target,
+                                attr_pm_pfet_powerdown_core_delay0);
+        if (l_rc)
+        {
+            FAPI_ERR("fapiGetAttribute ATTR_PM_PFET_POWERDOWN_CORE_DELAY0");
+            FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PFET_GET_ATTR);
+            break;
+        }
+
+        /// ----------------------------------------------------------
+        l_rc = FAPI_ATTR_GET(   ATTR_PM_PFET_POWERDOWN_CORE_DELAY1,
+                                &i_target,
+                                attr_pm_pfet_powerdown_core_delay1);
+        if (l_rc)
+        {
+            FAPI_ERR("fapiGetAttribute ATTR_PM_PFET_POWERDOWN_CORE_DELAY1");
+            FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PFET_GET_ATTR);
+            break;
+        }
+
+        /// ----------------------------------------------------------
+        l_rc = FAPI_ATTR_GET(   ATTR_PM_PFET_POWERUP_ECO_DELAY0,
+                                &i_target,
+                                attr_pm_pfet_powerup_eco_delay0);
+        if (l_rc)
+        {
+            FAPI_ERR("fapiGetAttribute ATTR_PM_PFET_POWERUP_ECO_DELAY0");
+            FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PFET_GET_ATTR);
+            break;
+        }
+
+
+        /// ----------------------------------------------------------
+        l_rc = FAPI_ATTR_GET(   ATTR_PM_PFET_POWERUP_ECO_DELAY1,
+                                &i_target,
+                                attr_pm_pfet_powerup_eco_delay1);
+        if (l_rc)
+        {
+            FAPI_ERR("fapiGetAttribute ATTR_PM_PFET_POWERUP_ECO_DELAY1");
+            FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PFET_GET_ATTR);
+            break;
+        }
+
+        /// ----------------------------------------------------------
+        l_rc = FAPI_ATTR_GET(   ATTR_PM_PFET_POWERDOWN_ECO_DELAY0,
+        &i_target, attr_pm_pfet_powerdown_eco_delay0);
+        if (l_rc)
+        {
+            FAPI_ERR("fapiGetAttribute ATTR_PM_PFET_POWERDOWN_ECO_DELAY0");
+            FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PFET_GET_ATTR);
+            break;
+        }
+
+        /// ----------------------------------------------------------
+        l_rc = FAPI_ATTR_GET(   ATTR_PM_PFET_POWERDOWN_ECO_DELAY1,
+                                &i_target,
+                                attr_pm_pfet_powerdown_eco_delay1);
+        if (l_rc)
+        {
+            FAPI_ERR("fapiGetAttribute ATTR_PM_PFET_POWERDOWN_ECO_DELAY1");
+            FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PFET_GET_ATTR);
+            break;
+        }
+
+
+        //  ******************************************************************
+        //  Calculate Delay values out of pFET Delays
+        //  ******************************************************************
+        FAPI_DBG("*************************************");
+        FAPI_DBG("Calculates Delay values out of pFET Delays");
+        FAPI_DBG("*************************************");
+        FAPI_DBG("Calculate:");
+        FAPI_DBG("        ATTR_PM_PFET_POWERUP_CORE_DELAY0_VALUE");
+        FAPI_DBG("        ATTR_PM_PFET_POWERUP_CORE_DELAY1_VALUE");
+        FAPI_DBG("        ATTR_PM_PFET_POWERUP_ECO_DELAY0_VALUE");
+        FAPI_DBG("        ATTR_PM_PFET_POWERUP_ECO_DELAY1_VALUE");
+        FAPI_DBG("        ATTR_PM_PFET_POWERDOWN_CORE_DELAY0_VALUE");
+        FAPI_DBG("        ATTR_PM_PFET_POWERDOWN_CORE_DELAY1_VALUE");
+        FAPI_DBG("        ATTR_PM_PFET_POWERDOWN_ECO_DELAY0_VALUE");
+        FAPI_DBG("        ATTR_PM_PFET_POWERDOWN_ECO_DELAY1_VALUE");
+        FAPI_DBG("using:");
+        FAPI_DBG("        ATTR_PM_PFET_POWERUP_CORE_DELAY0");
+        FAPI_DBG("        ATTR_PM_PFET_POWERUP_CORE_DELAY1");
+        FAPI_DBG("        ATTR_PM_PFET_POWERUP_ECO_DELAY0");
+        FAPI_DBG("        ATTR_PM_PFET_POWERUP_ECO_DELAY1");
+        FAPI_DBG("        ATTR_PM_PFET_POWERDOWN_CORE_DELAY0");
+        FAPI_DBG("        ATTR_PM_PFET_POWERDOWN_CORE_DELAY1");
+        FAPI_DBG("        ATTR_PM_PFET_POWERDOWN_ECO_DELAY0");
+        FAPI_DBG("        ATTR_PM_PFET_POWERDOWN_ECO_DELAY1");
+        FAPI_DBG("**************************************************************************");
+        FAPI_DBG("        Set  ATTR_PM_PFET_POWERUP_CORE_SEQUENCE_DELAY_SELECT    to 0 (choosing always pfetdelay0 )");
+        FAPI_DBG("        Set  ATTR_PM_PFET_POWERDOWN_CORE_SEQUENCE_DELAY_SELECT  to 0 (choosing always pfetdelay0 )");
+        FAPI_DBG("        Set  ATTR_PM_PFET_POWERUP_ECO_SEQUENCE_DELAY_SELECT     to 0 (choosing always pfetdelay0 )");
+        FAPI_DBG("        Set  ATTR_PM_PFET_POWERDOWN_ECO_SEQUENCE_DELAY_SELECT   to 0 (choosing always pfetdelay0 )");
+        FAPI_DBG("**************************************************************************");
+
+        //value = 15 - log2(delay * refclk);
+        attr_pm_pfet_powerup_core_delay0_value          =
+                convert_delay_to_value( attr_pm_pfet_powerup_core_delay0,
+                                        attr_proc_refclk_frequency);
+
+        attr_pm_pfet_powerup_core_delay1_value          =
+                convert_delay_to_value( attr_pm_pfet_powerup_core_delay1,
+                                        attr_proc_refclk_frequency);
+
+        attr_pm_pfet_powerdown_core_delay0_value        =
+                convert_delay_to_value( attr_pm_pfet_powerdown_core_delay0 ,
+                                        attr_proc_refclk_frequency);
+
+        attr_pm_pfet_powerdown_core_delay1_value        =
+                convert_delay_to_value( attr_pm_pfet_powerdown_core_delay1 ,
+                                        attr_proc_refclk_frequency);
+
+        attr_pm_pfet_powerup_eco_delay0_value           =
+                convert_delay_to_value( attr_pm_pfet_powerup_eco_delay0 ,
+                                        attr_proc_refclk_frequency);
+
+        attr_pm_pfet_powerup_eco_delay1_value           =
+                convert_delay_to_value( attr_pm_pfet_powerup_eco_delay1 ,
+                                        attr_proc_refclk_frequency);
+
+        attr_pm_pfet_powerdown_eco_delay0_value         =
+                convert_delay_to_value( attr_pm_pfet_powerdown_eco_delay0 ,
+                                        attr_proc_refclk_frequency);
+
+        attr_pm_pfet_powerdown_eco_delay1_value         =
+                convert_delay_to_value( attr_pm_pfet_powerdown_eco_delay1 ,
+                                        attr_proc_refclk_frequency);
+
+        // Choosing always delay0
+        attr_pm_pfet_powerup_core_sequence_delay_select         = 0;
+        attr_pm_pfet_powerdown_core_sequence_delay_select       = 0;
+        attr_pm_pfet_powerup_eco_sequence_delay_select          = 0;
+        attr_pm_pfet_powerdown_eco_sequence_delay_select        = 0;
+
+        FAPI_DBG("*************************************");
+        FAPI_DBG("attr_pm_pfet_powerup_core_delay0_value           :  %X", attr_pm_pfet_powerup_core_delay0_value);
+        FAPI_DBG("attr_pm_pfet_powerup_core_delay1_value           :  %X", attr_pm_pfet_powerup_core_delay1_value);
+        FAPI_DBG("attr_pm_pfet_powerup_core_sequence_delay_select  :  %X", attr_pm_pfet_powerup_core_sequence_delay_select);
+        FAPI_DBG("attr_pm_pfet_powerdown_core_delay0_value         :  %X", attr_pm_pfet_powerdown_core_delay0_value);
+        FAPI_DBG("attr_pm_pfet_powerdown_core_delay1_value         :  %X", attr_pm_pfet_powerdown_core_delay1_value);
+        FAPI_DBG("attr_pm_pfet_powerdown_core_sequence_delay_select:  %X", attr_pm_pfet_powerdown_core_sequence_delay_select);
+        FAPI_DBG("attr_pm_pfet_powerup_eco_delay0_value            :  %X", attr_pm_pfet_powerup_eco_delay0_value);
+        FAPI_DBG("attr_pm_pfet_powerup_eco_delay1_value            :  %X", attr_pm_pfet_powerup_eco_delay1_value);
+        FAPI_DBG("attr_pm_pfet_powerup_eco_sequence_delay_select   :  %X", attr_pm_pfet_powerup_eco_sequence_delay_select);
+        FAPI_DBG("attr_pm_pfet_powerdown_eco_delay0_value          :  %X", attr_pm_pfet_powerdown_eco_delay0_value);
+        FAPI_DBG("attr_pm_pfet_powerdown_eco_delay1_value          :  %X", attr_pm_pfet_powerdown_eco_delay1_value);
+        FAPI_DBG("attr_pm_pfet_powerdown_eco_sequence_delay_select :  %X", attr_pm_pfet_powerdown_eco_sequence_delay_select);
+        FAPI_DBG("*************************************");
+
+        //  ******************************************************************
+        //  Install in the hardware
+        //      Loop through all the functional chiplets
+        //  ******************************************************************
+
+        l_rc = fapiGetChildChiplets(i_target,
+                                    TARGET_TYPE_EX_CHIPLET,
+                                    l_exChiplets,
+                                    TARGET_STATE_PRESENT);
+	    if (l_rc)
+	    {
+	        FAPI_ERR("Error from fapiGetChildChiplets!");
+	        break;
+	    }
+
+	    FAPI_DBG("\tChiplet vector size  => %u ", l_exChiplets.size());
+
+        // Iterate through the returned chiplets
+	    for (uint8_t j=0; j < l_exChiplets.size(); j++)
+	    {
+            // Determine if it's functional
+            l_rc = FAPI_ATTR_GET(ATTR_FUNCTIONAL, &l_exChiplets[j], l_functional);
+            if (l_rc)
+            {
+                FAPI_ERR("fapiGetAttribute of ATTR_FUNCTIONAL error");
+                error_flag = true;
+                break;
+            }
+            else if ( l_functional )
+            {
+                // Get the core number
+                l_rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_exChiplets[j], l_ex_number);
+                if (l_rc)
+                {
+                    FAPI_ERR("fapiGetAttribute of ATTR_CHIP_UNIT_POS error");
+                    error_flag = true;
+                    break;
+                }
+
+                FAPI_DBG("\tGP0(0) from core %x (@ %08llx) => 0x%16llx",
+                                l_ex_number,
+                                EX_GP3_0x100F0012+(l_ex_number*0x01000000),
+                                data.getDoubleWord(0));
+
+
+                FAPI_INF("\tSet the PFET attribute values into the appropriate registers");
+
+                // -------------------------------------------------------------
+                FAPI_DBG("\tSetting Core Power up Delays");
+                address = EX_CorePFPUDly_REG_0x100F012C + (0x01000000 * l_ex_number);
+                l_rc=pfet_set_delay(i_target,
+                                    address,
+                                    attr_pm_pfet_powerup_core_delay0_value,
+                                    attr_pm_pfet_powerup_core_delay1_value,
+                                    attr_pm_pfet_powerup_core_sequence_delay_select
+                                   );
+                if (l_rc)
+                {
+                    FAPI_ERR("pfet_step_delay error 0x%08llu", address);
+                    break;
+                }
+
+                // -------------------------------------------------------------
+                FAPI_DBG("\tSetting Core Power down Delays");
+                address = EX_CorePFPDDly_REG_0x100F012D + (0x01000000 * l_ex_number);
+                l_rc=pfet_set_delay(i_target,
+                                    address,
+                                    attr_pm_pfet_powerup_core_delay0_value,
+                                    attr_pm_pfet_powerup_core_delay1_value,
+                                    attr_pm_pfet_powerup_core_sequence_delay_select
+                                   );
+                if (l_rc)
+                {
+                    FAPI_ERR("pfet_step_delay error 0x%08llu", address);
+                    break;
+                }
+
+
+                // -------------------------------------------------------------
+                FAPI_DBG("\tSetting Core Voff Settings");
+                e_rc |= data.setBitLength(64);
+	            e_rc |= data.insertFromRight(core_vret_voff_value, 0, 8);
+                if (e_rc)
+                {
+                    FAPI_ERR("Error (0x%x) setting up  ecmdDataBufferBase", e_rc);
+                    l_rc.setEcmdError(e_rc);
+                    break;
+                }
+
+                address = EX_CorePFVRET_REG_0x100F0130 + (0x01000000 * l_ex_number);
+                l_rc=fapiPutScom(i_target, address, data );
+                if (l_rc)
+                {
+                    FAPI_ERR("pfet_step_delay error 0x%08llu", address);
+                    break;
+                }
+
+                // -------------------------------------------------------------
+                FAPI_DBG("\tSetting ECO Power up Delays");
+                address = EX_ECOPFPUDly_REG_0x100F014C + (0x01000000 * l_ex_number);
+                l_rc=pfet_set_delay(i_target,
+                                    address,
+                                    attr_pm_pfet_powerup_core_delay0_value,
+                                    attr_pm_pfet_powerup_core_delay1_value,
+                                    attr_pm_pfet_powerup_core_sequence_delay_select
+                                   );
+                if (l_rc)
+                {
+                    FAPI_ERR("pfet_step_delay error 0x%08llu", address);
+                    break;
+                }
+
+                // -------------------------------------------------------------
+                FAPI_DBG("\tSetting ECO Power down Delays");
+                address = EX_ECOPFPDDly_REG_0x100F014D + (0x01000000 * l_ex_number);
+                l_rc=pfet_set_delay(i_target,
+                                    address,
+                                    attr_pm_pfet_powerup_core_delay0_value,
+                                    attr_pm_pfet_powerup_core_delay1_value,
+                                    attr_pm_pfet_powerup_core_sequence_delay_select
+                                   );
+                if (l_rc)
+                {
+                    FAPI_ERR("pfet_step_delay error 0x%08llu", address);
+                    break;
+                }
+
+
+                // -------------------------------------------------------------
+                FAPI_DBG("\tSetting ECO Voff Settings");
+                e_rc |= data.setBitLength(64);
+	            e_rc |= data.insertFromRight(eco_vret_voff_value, 0, 8);
+                if (e_rc)
+                {
+                    FAPI_ERR("Error (0x%x) setting up  ecmdDataBufferBase", e_rc);
+                    l_rc.setEcmdError(e_rc);
+                    break;
+                }
+
+                address = EX_ECOPFVRET_REG_0x100F0150 + (0x01000000 * l_ex_number);
+                l_rc=fapiPutScom(i_target, address, data );
+                if (l_rc)
+                {
+                    FAPI_ERR("pfet_step_delay error 0x%08llu", address);
+                    break;
+                }
+
+            }
+            // Not Functional - disable the PFETs
+            else
+            {
+                // Do nothing
+            }
+        } // chiplet loop
+    } while(0);
+
+    return l_rc;
+}
+
+
+
+//------------------------------------------------------------------------------
+// pfet_set_delay
+//  Helper function to set delay registers
+//------------------------------------------------------------------------------
+fapi::ReturnCode
+pfet_set_delay( const fapi::Target& i_target,
+                const uint64_t      i_address,
+                const uint8_t       i_delay0,
+                const uint8_t       i_delay1,
+                const uint32_t      i_select)
+{
+    fapi::ReturnCode            l_rc;
+    uint32_t                    e_rc = 0;
+    ecmdDataBufferBase          data;
+
+    do
+    {
+
+        e_rc |= data.setBitLength(64);
+	    e_rc |= data.insertFromRight(i_delay0, 0, 4);   // bits 0:3
+	    e_rc |= data.insertFromRight(i_delay1, 4, 4);   // bits 4:7
+        e_rc |= data.insertFromRight(i_select, 8, 12);  // bits 8:19
+        if (e_rc)
+        {
+            FAPI_ERR("Error (0x%x) setting up  ecmdDataBufferBase", e_rc);
+            l_rc.setEcmdError(e_rc);
+            break;
+        }
+
+	    l_rc=fapiPutScom(i_target, i_address, data );
+        if (l_rc)
+        {
+            FAPI_ERR("PutScom error 0x%08llu", i_address);
+            break;
+        }
+
+    } while(0);
+    return l_rc;
+}
+
+
+//------------------------------------------------------------------------------
+// convert_delay_to_value
+//  Helper function to convert time values (binary in ns)to hardware delays
+//------------------------------------------------------------------------------
+uint8_t
+convert_delay_to_value (uint32_t i_delay,
+                        uint32_t i_attr_proc_nest_frequency)
+{
+    uint8_t   pfet_delay_value;
+    float     dly;
+    //  attr_proc_nest_frequency [MHz]
+    //  delay [ns]
+    //  pfet_delay_value = 15 - log2( i_delay * i_attr_proc_nest_frequency/1000);
+    //  since log2 function is not available, this is done manual
+    //  pfet_delay_value = 15 - log2( dly );
+    dly = ( i_delay * i_attr_proc_nest_frequency/1000);
+
+    if                          ( dly <= 1.4 )    {pfet_delay_value = 15 - 0 ;}
+    else if (( 1.4   < dly ) && ( dly <= 2.8 )  ) {pfet_delay_value = 15 - 1 ;}
+    else if (( 2.8   < dly ) && ( dly <= 5.6 )  ) {pfet_delay_value = 15 - 2 ;}
+    else if (( 5.6   < dly ) && ( dly <= 11.5 ) ) {pfet_delay_value = 15 - 3 ;}
+    else if (( 11.5  < dly ) && ( dly <= 23 )   ) {pfet_delay_value = 15 - 4 ;}
+    else if (( 23    < dly ) && ( dly <= 46 )   ) {pfet_delay_value = 15 - 5 ;}
+    else if (( 46    < dly ) && ( dly <= 92 )   ) {pfet_delay_value = 15 - 6 ;}
+    else if (( 92    < dly ) && ( dly <= 182 )  ) {pfet_delay_value = 15 - 7 ;}
+    else if (( 182   < dly ) && ( dly <= 364 )  ) {pfet_delay_value = 15 - 8 ;}
+    else if (( 364   < dly ) && ( dly <= 728 )  ) {pfet_delay_value = 15 - 9 ;}
+    else if (( 728   < dly ) && ( dly <= 1456 ) ) {pfet_delay_value = 15 - 10;}
+    else if (( 1456  < dly ) && ( dly <= 2912 ) ) {pfet_delay_value = 15 - 11;}
+    else if (( 2912  < dly ) && ( dly <= 5824 ) ) {pfet_delay_value = 15 - 12;}
+    else if (( 5824  < dly ) && ( dly <= 11648 )) {pfet_delay_value = 15 - 13;}
+    else if (( 11648 < dly ) && ( dly <= 23296 )) {pfet_delay_value = 15 - 14;}
+    else if  ( 23296 < dly )                      {pfet_delay_value = 15 - 15;}
+    else                                          {pfet_delay_value = 15 - 15;}
+
+    return (pfet_delay_value);
+}
+
+
+
+/*
+*************** Do not edit this area ***************
+This section is automatically updated by CVS when you check in this file.
+Be sure to create CVS comments when you commit so that they can be included here.
+
+
+*/
+
+
+
+} //end extern
+
diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pfet_init.H b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pfet_init.H
new file mode 100644
index 000000000..df08edc16
--- /dev/null
+++ b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pfet_init.H
@@ -0,0 +1,76 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pfet_init.H $ */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* COPYRIGHT International Business Machines Corp. 2012                   */
+/*                                                                        */
+/* p1                                                                     */
+/*                                                                        */
+/* Object Code Only (OCO) source materials                                */
+/* Licensed Internal Code Source Materials                                */
+/* IBM HostBoot Licensed Internal Code                                    */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* Origin: 30                                                             */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+// $Id: p8_pfet_init.H,v 1.1 2012/12/07 20:12:30 stillgs Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pfet_init.H,v $
+//------------------------------------------------------------------------------
+// *|
+// *! (C) Copyright International Business Machines Corp. 2011
+// *! All Rights Reserved -- Property of IBM
+// *! *** IBM Confidential ***
+// *|
+// *! TITLE       : p8_pfet_init.H
+// *! DESCRIPTION : Initialization and reset the EX chiplet PFET controller
+// *!
+// *! OWNER NAME  : Ralf Maier    Email: ralf.maier@de.ibm.com
+// *! BACKUP NAME : Greg Still    Email: stillgs@us.ibm.com
+// *!
+//------------------------------------------------------------------------------
+
+#ifndef _P8_PFET_INIT_H_
+#define _P8_PFET_INIT_H_
+
+//------------------------------------------------------------------------------
+// Includes
+//------------------------------------------------------------------------------
+
+
+// function pointer typedef definition for HWP call support
+typedef fapi::ReturnCode (*p8_pfet_init_FP_t) (const fapi::Target&, uint32_t);
+
+extern "C" {
+
+
+//------------------------------------------------------------------------------
+// Constant definitions
+//------------------------------------------------------------------------------
+
+
+//------------------------------------------------------------------------------
+// Parameter structure definitions
+//------------------------------------------------------------------------------
+
+
+//------------------------------------------------------------------------------
+// Function prototype
+//------------------------------------------------------------------------------
+/// \param[in] i_target  Chip target
+/// \param[in] mode      Control mode (PM_CONFIG, PM_INIT, PM_RESET)
+
+/// \retval FAPI_RC_SUCCESS if something good happens,
+/// \retval RC per p8_pfet_init_errors.xml otherwise
+fapi::ReturnCode 
+p8_pfet_init(const fapi::Target& i_target, uint32_t mode);
+
+} // extern "C"
+
+#endif // _P8_PFET_INIT_H_
diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pfet_init_errors.xml b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pfet_init_errors.xml
new file mode 100644
index 000000000..dc91f492c
--- /dev/null
+++ b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pfet_init_errors.xml
@@ -0,0 +1,36 @@
+<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
+<!-- This is an automatically generated prolog.                             -->
+<!--                                                                        -->
+<!-- $Source: src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pfet_init_errors.xml $ -->
+<!--                                                                        -->
+<!-- IBM CONFIDENTIAL                                                       -->
+<!--                                                                        -->
+<!-- COPYRIGHT International Business Machines Corp. 2012                   -->
+<!--                                                                        -->
+<!-- p1                                                                     -->
+<!--                                                                        -->
+<!-- Object Code Only (OCO) source materials                                -->
+<!-- Licensed Internal Code Source Materials                                -->
+<!-- IBM HostBoot Licensed Internal Code                                    -->
+<!--                                                                        -->
+<!-- The source code for this program is not published or otherwise         -->
+<!-- divested of its trade secrets, irrespective of what has been           -->
+<!-- deposited with the U.S. Copyright Office.                              -->
+<!--                                                                        -->
+<!-- Origin: 30                                                             -->
+<!--                                                                        -->
+<!-- IBM_PROLOG_END_TAG                                                     -->
+<!-- Error definitions for p8_pfet_init procedure -->
+<hwpErrors>
+  <!-- *********************************************************************** -->
+  <hwpError>
+    <rc>RC_PROCPM_PFET_CODE_BAD_MODE</rc>
+    <description>Unknown mode passed to p8_pfet_init</description>
+  </hwpError>
+  <!-- *********************************************************************** -->
+  <hwpError>
+    <rc>RC_PROCPM_PFET_GET_ATTR</rc>
+    <description>p8_pfet_init could not get an attribute.</description>   
+  </hwpError>
+  <!-- *********************************************************************** -->
+</hwpErrors>
diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pfet_types.H b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pfet_types.H
new file mode 100644
index 000000000..7b3f0c3d2
--- /dev/null
+++ b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pfet_types.H
@@ -0,0 +1,67 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pfet_types.H $ */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* COPYRIGHT International Business Machines Corp. 2012                   */
+/*                                                                        */
+/* p1                                                                     */
+/*                                                                        */
+/* Object Code Only (OCO) source materials                                */
+/* Licensed Internal Code Source Materials                                */
+/* IBM HostBoot Licensed Internal Code                                    */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* Origin: 30                                                             */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+// $Id: p8_pfet_types.H,v 1.1 2012/12/12 04:29:27 stillgs Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pfet_types.H,v $
+//------------------------------------------------------------------------------
+// *|
+// *! (C) Copyright International Business Machines Corp. 2011
+// *! All Rights Reserved -- Property of IBM
+// *! *** IBM Confidential ***
+// *|
+// *! TITLE       : p8_pfet_types.H
+// *! DESCRIPTION : General routines for controlling EX chiplet PFET headers
+// *!
+// *! OWNER NAME  : Ralf Maier    Email: ralf.maier@de.ibm.com
+// *! BACKUP NAME : Greg Still    Email: stillgs@us.ibm.com
+// *!
+//------------------------------------------------------------------------------
+
+#ifndef _P8_PFETTYPE_H_
+#define _P8_PFETTYPE_H_
+
+
+extern "C" {
+
+// valid domain options
+typedef enum  pfet_dom_type
+{
+  BOTH,         // write to both domains
+  ECO,          // eco only
+  CORE,         // core only
+} pfet_dom_t;
+
+
+// valid force options
+typedef enum  pfet_force_type
+{
+  NONE,         // no operation (00)
+  VOFF,         // voff (01)
+  VRET,         // Vret (10)... not supported
+  VON,          // von (11)
+  NO_FORCE_PARM // use this when not writing to reg.
+} pfet_force_t;
+
+
+} // extern "C"
+
+#endif // _P8_PFETTYPE_H_
diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_init.C b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_init.C
index 3c9a4f267..31230b01e 100644
--- a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_init.C
+++ b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_init.C
@@ -20,7 +20,9 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_poreslw_init.C,v 1.5 2012/10/24 02:32:07 stillgs Exp $
+// $Id: p8_poreslw_init.C,v 1.8_Thi_hack 2012/12/12 04:25:54 stillgs Exp $
+// Search for @thi to see HACK of minor issues in order to compile
+// RTC 60779 is opened to make sure a revised version is worked on by Greg
 // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_poreslw_init.C,v $
 //------------------------------------------------------------------------------
 // *! (C) Copyright International Business Machines Corp. 2011
@@ -43,7 +45,6 @@
 ///         Synchronize the PMC Deconfiguration Register
 ///         Activate the PMC Idle seequencer
 ///         For each functional EX chiplet
-///             Clear the OHA Idle State Override
 ///             Activate the PCBS-PM macro to enable idle operations
 ///             Clear the OCC Special Wake-up bit that is blocking idles until
 ///                 the SLW image is installed
@@ -64,6 +65,7 @@
 // ----------------------------------------------------------------------
 #include "p8_pm.H"
 #include "p8_poreslw_init.H"
+#include "p8_pfet_init.H"
 #include "p8_pmc_deconfig_setup.H"
 
 //#ifdef FAPIECMD
@@ -168,7 +170,7 @@ poreslw_init(const Target& i_target)
             break;
         }
 
-        // Activate the PMC Idle seequencer by making sure the Halt bit is clear
+        FAPI_DBG("Activate the PMC Idle seequencer by making sure the Halt bit is clear"); // @thi - Hack
         const uint32_t HALT_IDLE_STATE_MASTER_FSM = 14;
         l_rc = fapiGetScom(i_target, PMC_MODE_REG_0x00062000, data);
         if(!l_rc.ok())
@@ -192,6 +194,8 @@ poreslw_init(const Target& i_target)
             break;
         }
 
+        FAPI_DBG("Activate the PMC Idle seequencer by making sure the Halt bit is clear"); // @thi - Hack
+
         // Setup up each of the EX chiplets
         l_rc = poreslw_ex_setup(i_target);
         if(!l_rc.ok())
@@ -328,9 +332,10 @@ poreslw_ex_setup(const Target& i_target)
     std::vector<fapi::Target>       l_exChiplets;
     uint8_t                         l_functional = 0;
     uint8_t                         l_ex_number = 0;
+    uint64_t                        address;
     bool                            core_flag = false;
     bool                            error_flag = false;
-    
+
     uint8_t                         pm_sleep_type;
     uint8_t                         pm_sleep_entry ;
     uint8_t                         pm_sleep_exit ;
@@ -345,323 +350,371 @@ poreslw_ex_setup(const Target& i_target)
     const uint32_t                  PM_SLEEP_POWER_OFF_SEL_BIT  = 2;
     const uint32_t                  PM_WINKLE_POWER_DOWN_EN_BIT = 3;
     const uint32_t                  PM_WINKLE_POWER_UP_EN_BIT   = 4;
-    const uint32_t                  PM_WINKLE_POWER_OFF_SEL_BIT = 5; 
-    
+    const uint32_t                  PM_WINKLE_POWER_OFF_SEL_BIT = 5;
+
+    // Warning: this need removal once mutli-core IPL function in SBE code is available
     const uint32_t IDLE_STATE_OVERRIDE_EN = 6;
     const uint32_t PM_DISABLE = 0;
 
     do
     {
 
-       FAPI_INF("Executing poreslw_ex_setup...");
+        FAPI_INF("Executing poreslw_ex_setup...");
 
-       l_rc = fapiGetChildChiplets (i_target, TARGET_TYPE_EX_CHIPLET, l_exChiplets, TARGET_STATE_PRESENT);
-	   if (l_rc)
-	   {
-	       FAPI_ERR("Error from fapiGetChildChiplets!");
-           error_flag = true;
-	       break;
-	   }
+        // --------------------------------------
+        // Initialize the PFET controllers
+        //   This HWP loops across the chiplet but uses chip level attributes so
+        //   it is invoked prior to the chiplet loop below.
+        FAPI_INF("\tInitialize the PFET controllers");
 
-	   FAPI_DBG("\tChiplet vector size  => %u ", l_exChiplets.size());
+        FAPI_EXEC_HWP(l_rc,  p8_pfet_init, i_target, PM_INIT);
+        if(l_rc)
+        {
+            FAPI_ERR("PFET Controller Setup error");
+            break;
+        }
 
+        // --------------------------------------
+        // Walk the configured chiplets
+        l_rc = fapiGetChildChiplets (   i_target,
+                                        TARGET_TYPE_EX_CHIPLET,
+                                        l_exChiplets,
+                                        TARGET_STATE_PRESENT);
+	    if (l_rc)
+	    {
+	        FAPI_ERR("Error from fapiGetChildChiplets!");
+            error_flag = true;
+	        break;
+	    }
+
+	    FAPI_DBG("\tChiplet vector size  => %u ", l_exChiplets.size());
+
+
+        // Iterate through the returned chiplets
+	    for (uint8_t j=0; j < l_exChiplets.size(); j++)
+	    {
+
+            // Determine if it's functional
+            l_rc = FAPI_ATTR_GET(       ATTR_FUNCTIONAL,
+                                        &l_exChiplets[j],
+                                        l_functional);
+            if (l_rc)
+            {
+                FAPI_ERR("fapiGetAttribute of ATTR_FUNCTIONAL error");
+                break;
+            }
+            else if ( l_functional )
+            {
 
-       // Iterate through the returned chiplets
-	   for (uint8_t j=0; j < l_exChiplets.size(); j++)
-	   {
+                // Get the core number
+                l_rc = FAPI_ATTR_GET(  ATTR_CHIP_UNIT_POS,
+                                       &l_exChiplets[j],
+                                       l_ex_number);
+                if(!l_rc.ok())
+                {
+                    FAPI_ERR("fapiGetAttribute of ATTR_CHIP_UNIT_POS error");
+                    break;
+                }
 
-           // Determine if it's functional
-           l_rc = FAPI_ATTR_GET(ATTR_FUNCTIONAL, &l_exChiplets[j], l_functional);
-           if (l_rc)
-           {
-               FAPI_ERR("fapiGetAttribute of ATTR_FUNCTIONAL error");
-               break;
-           }
-           else
-           {
-                if ( l_functional )
+                address = EX_GP3_0x100F0012 + (l_ex_number * 0x01000000);
+                l_rc=fapiGetScom(i_target, address, data);
+                if(l_rc)
                 {
+                    FAPI_ERR("GetScom error");
+                    break;
+                }
+
+                // Check if chiplet enable bit is set (configured).  If so, process
+                if ( data.isBitSet(0) )
+                {
+                    FAPI_INF("\tSetting up Core %X ", l_ex_number);
+
+                    // --------------------------------------
+                    //  Based on Attributes, set the idle handling controls
+
+        //          e_rc = FAPI_ATTR_GET(ATTR_PM_SLEEP_TYPE,   &i_target, pm_sleep_type);
+        //          if (e_rc)
+        //          {
+        //              FAPI_ERR("fapiGetAttribute of ATTR_PM_SLEEP_TYPE with e_rc = 0x%x", (uint32_t)e_rc);
+        //              break;
+        //          }
+        //
+        //          e_rc = FAPI_ATTR_GET(ATTR_PM_SLEEP_ENTRY,  &i_target, pm_sleep_entry);
+        //          if (e_rc)
+        //              FAPI_ERR("fapiGetAttribute of ATTR_PM_SLEEP_ENTRY with e_rc = 0x%x", (uint32_t)e_rc);
+        //              break;
+        //          }
+        //
+        //          e_rc = FAPI_ATTR_GET(ATTR_PM_SLEEP_EXIT,   &i_target, pm_sleep_exit);
+        //          if (e_rc)
+        //          {
+        //              FAPI_ERR("fapiGetAttribute of ATTR_PM_SLEEP_EXIT with e_rc = 0x%x", (uint32_t)e_rc);
+        //              break;
+        //          }
+        //
+        //          e_rc = FAPI_ATTR_GET(ATTR_PM_WINKLE_TYPE,  &i_target, pm_winkle_type);
+        //          if (e_rc)
+        //          {
+        //              FAPI_ERR("fapiGetAttribute of ATTR_PM_WINKLE_TYPE with e_rc = 0x%x", (uint32_t)e_rc);
+        //              break;
+        //          }
+        // \todo missing attributes
+        //          e_rc = FAPI_ATTR_GET("ATTR_PM_WINKLE_ENTRY", &i_target,(unit8_t) pm_winkle_entry);
+        //          if (e_rc)
+        //          {
+        //              FAPI_ERR("fapiGetAttribute of ATTR_PM_WINKLE_ENTRY with e_rc = 0x%x", (uint32_t)e_rc);
+        //              break;
+        //          }
+        //
+        //          e_rc = FAPI_ATTR_GET("ATTR_PM_WINKLE_EXIT",  &i_target,(unit8_t) pm_winkle_exit);
+        //          if (e_rc)
+        //          {
+        //              FAPI_ERR("fapiGetAttribute of ATTR_PM_WINKLE_EXIT with e_rc = 0x%x", (uint32_t)e_rc);
+        //              break;
+        //          }
+
+                    // \todo Hardcoded values until platform control of attributes is in place.
+                    FAPI_INF("\tWARNING:  !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!");
+                    FAPI_INF("\tWARNING:  Hardcoded idle config values set until platform support of attributes available");
+                    FAPI_INF("\tWARNING:  !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!");
+
+
+                    pm_sleep_entry      = 1;   // 0=HW, 1=assisted
+                    pm_sleep_exit       = 1;   // 0=HW, 1=assisted
+                    pm_sleep_type       = 1;   // 0=fast, 1=deep
+
+                    pm_winkle_entry     = 1;   // 0=HW, 1=assisted
+                    pm_winkle_exit      = 1;   // 0=HW, 1=assisted
+                    pm_winkle_type      = 1;   // 0=fast, 1=deep
+
+
+                    //  ******************************************************************
+                    //  Set PMGP1_REG
+                    //  ******************************************************************
+
+                    FAPI_DBG("\t-----------------------------------------------------");
+                    FAPI_DBG("\tPMGP1_REG Configuration                  ");
+                    FAPI_DBG("\t-----------------------------------------------------");
+                    FAPI_DBG("\t  pm_sleep_entry          => %d ", pm_sleep_entry );
+                    FAPI_DBG("\t  pm_sleep_exit           => %d ", pm_sleep_exit  );
+                    FAPI_DBG("\t  pm_sleep_type           => %d ", pm_sleep_type  );
+                    FAPI_DBG("\t  pm_winkle_entry         => %d ", pm_winkle_entry  );
+                    FAPI_DBG("\t  pm_winkle_exit          => %d ", pm_winkle_exit  );
+                    FAPI_DBG("\t  pm_winkle_type          => %d ", pm_winkle_type  );
+                    FAPI_DBG("\t-----------------------------------------------------");
+
+
+                    FAPI_DBG("\t*************************************");
+                    FAPI_INF("\tSetup PMGP1_REG for EX %x", l_ex_number);
+                    FAPI_DBG("\t*************************************");
+
+                    // Initialize the set and clear vectors
+                    e_rc |= clear_data.flushTo1();  // Set to 1s to be used for WAND
+                    e_rc |= set_data.flushTo0();    // Set to 0s to be used for WOR
+
+                    // If   sleep entry = 1 (assisted), sleep power down enable = 0
+                    // else sleep entry = 0 (hardware), sleep power down enable = 1
+                    if (pm_sleep_entry)
+                    {
+                        e_rc |= clear_data.clearBit(PM_SLEEP_POWER_DOWN_EN_BIT);
+
+                    }
+                    else
+                    {
+                        e_rc |= set_data.setBit(PM_SLEEP_POWER_DOWN_EN_BIT);
+                    }
+
+                    // If   sleep exit  = 1 (assisted), sleep power up enable = 0
+                    // else sleep exit  = 0 (hardware), sleep power up enable = 1
+                    if (pm_sleep_exit)
+                    {
+                        e_rc |= clear_data.clearBit(PM_SLEEP_POWER_UP_EN_BIT);
+
+                    }
+                    else
+                    {
+                        e_rc |= set_data.setBit(PM_SLEEP_POWER_UP_EN_BIT);
+                    }
 
-                    // Get the core number
-                    l_rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_exChiplets[j], l_ex_number);
+                    // If   sleep type  = 1 (deep), sleep power up sel = 1
+                    // else sleep type  = 0 (fast), sleep power up sel = 0
+                    if (pm_sleep_type)
+                    {
+                        e_rc |= set_data.setBit(PM_SLEEP_POWER_OFF_SEL_BIT);
+
+                    }
+                    else
+                    {
+                        e_rc |= clear_data.clearBit(PM_SLEEP_POWER_OFF_SEL_BIT);
+                    }
+
+                    // If   winkle entry = 1 (assisted), winkle power down enable = 0
+                    // else winkle entry = 0 (hardware), winkle power down enable = 1
+                    if (pm_winkle_entry)
+                    {
+                        e_rc |= clear_data.clearBit(PM_WINKLE_POWER_DOWN_EN_BIT);
+
+                    }
+                    else
+                    {
+                        e_rc |= set_data.setBit(PM_WINKLE_POWER_DOWN_EN_BIT);
+                    }
+
+                    // If   winkle exit  = 1 (assisted), winkle power up enable = 0
+                    // else winkle exit  = 0 (hardware), winkle power up enable = 1
+                    if (pm_winkle_exit)
+                    {
+                        e_rc |= clear_data.clearBit(PM_WINKLE_POWER_UP_EN_BIT);
+
+                    }
+                    else
+                    {
+                        e_rc |= set_data.setBit(PM_WINKLE_POWER_UP_EN_BIT);
+                    }
+
+                    // If   winkle type  = 1 (deep), winkle power up sel = 1
+                    // else winkle type  = 0 (fast), winkle power up sel = 0
+                    if (pm_winkle_type)
+                    {
+                        e_rc |= set_data.setBit(PM_WINKLE_POWER_OFF_SEL_BIT);
+
+                    }
+                    else
+                    {
+                        e_rc |= clear_data.clearBit(PM_WINKLE_POWER_OFF_SEL_BIT);
+                    }
+
+                    // Check for any errors from set/clear ops into the buffers
+                    if (e_rc)
+                    {
+                        FAPI_ERR("eCmdDataBuffer operation failed. rc = 0x%x", (uint32_t)e_rc);
+                        l_rc.setEcmdError(e_rc);
+                        break;
+                    }
+
+                    // The set and clear vectors are built.  Write them to
+                    // the respective addresses.
+                    FAPI_DBG("\tEX_PMGP1_WOR  0x%16llx" , set_data.getDoubleWord(0));
+                    address = EX_PMGP1_REG_0_WORx100F0105 + (l_ex_number * 0x01000000);
+                    l_rc=fapiPutScom(i_target, address, set_data);
+                    if (l_rc)
+                    {
+                        FAPI_ERR("fapiPutScom(EX_PMGP1_REG_0_WORx100F0105) failed. l_rc = 0x%x", (uint32_t)l_rc);
+                        break;
+                    }
+
+                    FAPI_DBG("\tEX_PMGP1_WAND 0x%16llx" , clear_data.getDoubleWord(0));
+                    address = EX_PMGP1_REG_0_WANDx100F0104 + (l_ex_number * 0x01000000);
+                    l_rc=fapiPutScom(i_target, address, clear_data);
+                    if (l_rc)
+                    {
+                        FAPI_ERR("fapiPutScom(EX_PMGP1_REG_0_WORx100F0105) failed. l_rc = 0x%x", (uint32_t)l_rc);
+                        break;
+                    }
+
+                    FAPI_INF("\tDisable the PCBS Heartbeat EX %x", l_ex_number);
+                    address = EX_SLAVE_CONFIG_0x100F001E + (l_ex_number * 0x01000000);
+                    l_rc = fapiGetScom(l_exChiplets[j], EX_OHA_MODE_REG_RWx1002000D, data);
+                    if(!l_rc.ok())
+                    {
+                        FAPI_ERR("Scom error reading PCBS Slave Config");
+                        break;
+                    }
+
+                    e_rc |= data.setBit(4);
+                    if (e_rc)
+                    {
+                        FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc);
+                        l_rc.setEcmdError(e_rc);
+                        break;
+                    }
+
+                    l_rc=fapiPutScom(i_target, address, data);
                     if(!l_rc.ok())
                     {
-                        FAPI_ERR("fapiGetAttribute of ATTR_CHIP_UNIT_POS error");
+                        FAPI_ERR("Scom error writing PCBS Slave Config");
                         break;
                     }
 
-                    l_rc=fapiGetScom(i_target, (EX_GP3_0x100F0012+(l_ex_number*0x01000000)), data);
-                    if(l_rc)
+                    // >>>> Start: Move to SBE/SLW code with multi-core winkle function (proc_sbe_ex_scominit.S)
+                    // --------------------------------------
+                    // Clear the OHA Idle State Override
+                    FAPI_INF("\tClear the OHA Idle State Override for EX %x", l_ex_number);
+
+                    l_rc = fapiGetScom(l_exChiplets[j], EX_OHA_MODE_REG_RWx1002000D, data);
+                    if(!l_rc.ok())
+                    {
+                        FAPI_ERR("Scom error reading OHA_MODE");
+                        break;
+                    }
+
+                    e_rc |= data.clearBit(IDLE_STATE_OVERRIDE_EN);
+                    if (e_rc)
                     {
-                        FAPI_ERR("GetScom error");
+                        FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc);
+                        l_rc.setEcmdError(e_rc);
                         break;
                     }
 
-                    // Check if chiplet enable bit is set (configured).  If so, process
-                    if ( data.isBitSet(0) )
+                    l_rc = fapiPutScom(l_exChiplets[j], EX_OHA_MODE_REG_RWx1002000D, data);
+                    if(!l_rc.ok())
                     {
-                        FAPI_INF("\tSetting up Core %X ", l_ex_number);
-                        
-                        // --------------------------------------                                           
-                        //  Based on Attributes, set the idle handling controls
-
-            //          e_rc = FAPI_ATTR_GET(ATTR_PM_SLEEP_TYPE,   &i_target, pm_sleep_type);
-            //          if (e_rc)
-            //          {
-            //              FAPI_ERR("fapiGetAttribute of ATTR_PM_SLEEP_TYPE with e_rc = 0x%x", (uint32_t)e_rc);
-            //              break;
-            //          }
-            //
-            //          e_rc = FAPI_ATTR_GET(ATTR_PM_SLEEP_ENTRY,  &i_target, pm_sleep_entry);
-            //          if (e_rc)
-            //          {
-            //              FAPI_ERR("fapiGetAttribute of ATTR_PM_SLEEP_ENTRY with e_rc = 0x%x", (uint32_t)e_rc);
-            //              break;
-            //          }
-            //
-            //          e_rc = FAPI_ATTR_GET(ATTR_PM_SLEEP_EXIT,   &i_target, pm_sleep_exit);
-            //          if (e_rc)
-            //          {
-            //              FAPI_ERR("fapiGetAttribute of ATTR_PM_SLEEP_EXIT with e_rc = 0x%x", (uint32_t)e_rc);
-            //              break;
-            //          }
-            //
-            //          e_rc = FAPI_ATTR_GET(ATTR_PM_WINKLE_TYPE,  &i_target, pm_winkle_type);
-            //          if (e_rc)
-            //          {
-            //              FAPI_ERR("fapiGetAttribute of ATTR_PM_WINKLE_TYPE with e_rc = 0x%x", (uint32_t)e_rc);
-            //              break;
-            //          }
-            // \todo missing attributes
-            //          e_rc = FAPI_ATTR_GET("ATTR_PM_WINKLE_ENTRY", &i_target,(unit8_t) pm_winkle_entry);
-            //          if (e_rc)
-            //          {
-            //              FAPI_ERR("fapiGetAttribute of ATTR_PM_WINKLE_ENTRY with e_rc = 0x%x", (uint32_t)e_rc);
-            //              break;
-            //          }
-            //
-            //          e_rc = FAPI_ATTR_GET("ATTR_PM_WINKLE_EXIT",  &i_target,(unit8_t) pm_winkle_exit);
-            //          if (e_rc) 
-            //          { 
-            //              FAPI_ERR("fapiGetAttribute of ATTR_PM_WINKLE_EXIT with e_rc = 0x%x", (uint32_t)e_rc);  
-            //              break;
-            //          }
-
-                        // \todo Hardcoded values until platform control of attributes is in place.
-                        FAPI_INF("\tWARNING:  !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!");
-                        FAPI_INF("\tWARNING:  Hardcoded idle config values set until platform support of attributes available");
-                        FAPI_INF("\tWARNING:  !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!");
-                        
-                        
-                        pm_sleep_entry      = 1;   // 0=HW, 1=assisted
-                        pm_sleep_exit       = 1;   // 0=HW, 1=assisted
-                        pm_sleep_type       = 1;   // 0=fast, 1=deep
-
-                        pm_winkle_entry     = 1;   // 0=HW, 1=assisted
-                        pm_winkle_exit      = 1;   // 0=HW, 1=assisted
-                        pm_winkle_type      = 1;   // 0=fast, 1=deep
-
-
-                        //  ******************************************************************
-                        //  Set PMGP1_REG
-                        //  ******************************************************************
-
-                        FAPI_DBG("\t-----------------------------------------------------");
-                        FAPI_DBG("\tPMGP1_REG Configuration                  ");
-                        FAPI_DBG("\t-----------------------------------------------------");
-                        FAPI_DBG("\t  pm_sleep_entry          => %d ", pm_sleep_entry );
-                        FAPI_DBG("\t  pm_sleep_exit           => %d ", pm_sleep_exit  );
-                        FAPI_DBG("\t  pm_sleep_type           => %d ", pm_sleep_type  );
-                        FAPI_DBG("\t  pm_winkle_entry         => %d ", pm_winkle_entry  );
-                        FAPI_DBG("\t  pm_winkle_exit          => %d ", pm_winkle_exit  );
-                        FAPI_DBG("\t  pm_winkle_type          => %d ", pm_winkle_type  );
-                        FAPI_DBG("\t-----------------------------------------------------");
-                        
-                       
-                        FAPI_DBG("\t*************************************");
-                        FAPI_INF("\tSetup PMGP1_REG for EX %x", l_ex_number);
-                        FAPI_DBG("\t*************************************");
-
-                        //  rc = fapiGetScom(i_target, EX_PMGP1_REG_0_RWXx100F0103 + (l_ex_number * 0x01000000) , data); 
-                        //  if (l_rc) 
-                        //      break;
-                        //  FAPI_DBG(" Pre write content of EX_PMGP1_REG_0_RWXx1*0F0103 , Loop: %d :  %016llX", c, data.getDoubleWord(0) );
-
-                        // Initialize the set and clear vectors
-                        e_rc |= clear_data.flushTo1();  // Set to 1s to be used for WAND
-                        e_rc |= set_data.flushTo0();    // Set to 0s to be used for WOR
-
-                        // If   sleep entry = 1 (assisted), sleep power down enable = 0
-                        // else sleep entry = 0 (hardware), sleep power down enable = 1
-                        if (pm_sleep_entry)
-                        {
-                            e_rc |= clear_data.clearBit(PM_SLEEP_POWER_DOWN_EN_BIT);
-                            
-                        }
-                        else
-                        {
-                            e_rc |= set_data.setBit(PM_SLEEP_POWER_DOWN_EN_BIT);                           
-                        }
-
-                        // If   sleep exit  = 1 (assisted), sleep power up enable = 0
-                        // else sleep exit  = 0 (hardware), sleep power up enable = 1
-                        if (pm_sleep_exit)
-                        {
-                            e_rc |= clear_data.clearBit(PM_SLEEP_POWER_UP_EN_BIT);
-                            
-                        }
-                        else
-                        {
-                            e_rc |= set_data.setBit(PM_SLEEP_POWER_UP_EN_BIT);                           
-                        }
-                        
-                        // If   sleep type  = 1 (deep), sleep power up sel = 1
-                        // else sleep type  = 0 (fast), sleep power up sel = 0
-                        if (pm_sleep_type)
-                        {
-                            e_rc |= set_data.setBit(PM_SLEEP_POWER_OFF_SEL_BIT);
-                            
-                        }
-                        else
-                        {
-                            e_rc |= clear_data.clearBit(PM_SLEEP_POWER_OFF_SEL_BIT);                           
-                        }
-
-                        // If   winkle entry = 1 (assisted), winkle power down enable = 0
-                        // else winkle entry = 0 (hardware), winkle power down enable = 1
-                        if (pm_winkle_entry)
-                        {
-                            e_rc |= clear_data.clearBit(PM_WINKLE_POWER_DOWN_EN_BIT);
-                            
-                        }
-                        else
-                        {
-                            e_rc |= set_data.setBit(PM_WINKLE_POWER_DOWN_EN_BIT);                           
-                        }
-
-                        // If   winkle exit  = 1 (assisted), winkle power up enable = 0
-                        // else winkle exit  = 0 (hardware), winkle power up enable = 1
-                        if (pm_winkle_exit)
-                        {
-                            e_rc |= clear_data.clearBit(PM_WINKLE_POWER_UP_EN_BIT);
-                            
-                        }
-                        else
-                        {
-                            e_rc |= set_data.setBit(PM_WINKLE_POWER_UP_EN_BIT);                           
-                        }
-                        
-                        // If   winkle type  = 1 (deep), winkle power up sel = 1
-                        // else winkle type  = 0 (fast), winkle power up sel = 0
-                        if (pm_winkle_type)
-                        {
-                            e_rc |= set_data.setBit(PM_WINKLE_POWER_OFF_SEL_BIT);
-                            
-                        }
-                        else
-                        {
-                            e_rc |= clear_data.clearBit(PM_WINKLE_POWER_OFF_SEL_BIT);                           
-                        }
-
-                        // Check for any errors from set/clear ops into the buffers
-                        if (e_rc) 
-                        {
-                            FAPI_ERR("eCmdDataBuffer operation failed. rc = 0x%x", (uint32_t)e_rc);  
-                            l_rc.setEcmdError(e_rc); 
-                            break;
-                        }
-                      
-                        // The set and clear vectors are built.  Write them to 
-                        // the respective addresses.
-                        FAPI_DBG("\tEX_PMGP1_WOR  0x%16llx" , set_data.getDoubleWord(0));
-                        l_rc = fapiPutScom(i_target, EX_PMGP1_REG_0_WORx100F0105+ (l_ex_number * 0x01000000), set_data);
-                        if (l_rc) 
-                        {
-                            FAPI_ERR("fapiPutScom(EX_PMGP1_REG_0_WORx100F0105) failed. l_rc = 0x%x", (uint32_t)l_rc);  
-                            break;
-                        }
-                        
-                        FAPI_DBG("\tEX_PMGP1_WAND 0x%16llx" , clear_data.getDoubleWord(0));
-                        l_rc = fapiPutScom(i_target, EX_PMGP1_REG_0_WANDx100F0104 + (l_ex_number * 0x01000000) , clear_data);
-                        if (l_rc) 
-                        { 
-                            FAPI_ERR("fapiPutScom(EX_PMGP1_REG_0_WORx100F0105) failed. l_rc = 0x%x", (uint32_t)l_rc);
-                            break;
-                        }
-
-                        // --------------------------------------
-                        // Clear the OHA Idle State Override
-                        FAPI_INF("\tClear the OHA Idle State Override for EX %x", l_ex_number);
-
-                        l_rc = fapiGetScom(l_exChiplets[j], EX_OHA_MODE_REG_RWx1002000D, data);
-                        if(!l_rc.ok())
-                        {
-                            FAPI_ERR("Scom error reading OHA_MODE");
-                            break;
-                        }
-
-                        e_rc |= data.clearBit(IDLE_STATE_OVERRIDE_EN);
-                        if (e_rc)
-                        {
-                            FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc);
-                            l_rc.setEcmdError(e_rc);
-                            break;
-                        }
-
-                        l_rc = fapiPutScom(l_exChiplets[j], EX_OHA_MODE_REG_RWx1002000D, data);
-                        if(!l_rc.ok())
-                        {
-                            FAPI_ERR("Scom error writing OHA_MODE");
-                            break;
-                        }
-
-                        // --------------------------------------
-                        // Activate the PCBS-PM macro by clearing the PM_DISABLE bit
-                        FAPI_INF("\tActivate the PCBS-PM for EX %x", l_ex_number);
-
-                        e_rc |= data.flushTo1();
-                        e_rc |= data.clearBit(PM_DISABLE);
-                        if (e_rc)
-                        {
-                            FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc);
-                            l_rc.setEcmdError(e_rc);
-                            break;
-                        }
-
-                        l_rc = fapiPutScom(i_target, EX_PMGP0_AND_0x100F0101+(l_ex_number*0x01000000), data);
-                        if(!l_rc.ok())
-                        {
-                            FAPI_ERR("Scom error writing EX_PMGP0_OR");
-                            break;
-                        }
-
-                        // --------------------------------------
-                        // Clear OCC Special Wake-up bit - only 1 bit in the register
-                        FAPI_INF("\tClear OCC Special Wake-up for EX %x", l_ex_number);
-                        e_rc |= data.flushTo0();
-                        if (e_rc)
-                        {
-                            FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc);
-                            l_rc.setEcmdError(e_rc);
-                            break;
-                        }
-
-                        l_rc = fapiPutScom(i_target, EX_PMSpcWkupOCC_REG_0x100F010C+(l_ex_number*0x01000000), data);
-                        if(!l_rc.ok())
-                        {
-                            FAPI_ERR("Scom error clearing EX_OCC_SPWKUP");
-                            break;
-                        }
-
-                        core_flag =  true;
-                    }  // Chiplet Enabled
-               }
-               else  // Not Functional so skip it
-               {
-                   // Do nothing
-               }
-           }
-	   }  // chiplet loop
+                        FAPI_ERR("Scom error writing OHA_MODE");
+                        break;
+                    }
+
+                    // >>>> End: Move to SBE/SLW code with multi-core winkle function (proc_sbe_ex_scominit.S)
+
+                    // >>>> Start: Move to proc_sbe_
+                    // --------------------------------------
+                    // Activate the PCBS-PM macro by clearing the PM_DISABLE bit
+                    FAPI_INF("\tActivate the PCBS-PM for EX %x", l_ex_number);
+
+                    e_rc |= data.flushTo1();
+                    e_rc |= data.clearBit(PM_DISABLE);
+                    if (e_rc)
+                    {
+                        FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc);
+                        l_rc.setEcmdError(e_rc);
+                        break;
+                    }
+
+                    address = EX_PMGP0_AND_0x100F0101 + (l_ex_number * 0x01000000);
+                    l_rc=fapiPutScom(i_target, address, data);
+                    if(!l_rc.ok())
+                    {
+                        FAPI_ERR("Scom error writing EX_PMGP0_OR");
+                        break;
+                    }
+
+                    // --------------------------------------
+                    // Clear OCC Special Wake-up bit - only 1 bit in the register
+                    FAPI_INF("\tClear OCC Special Wake-up for EX %x", l_ex_number);
+                    e_rc |= data.flushTo0();
+                    if (e_rc)
+                    {
+                        FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc);
+                        l_rc.setEcmdError(e_rc);
+                        break;
+                    }
+
+                    address = EX_PMSpcWkupOCC_REG_0x100F010C + (l_ex_number * 0x01000000);
+                    l_rc=fapiPutScom(i_target, address, data);
+                    if(!l_rc.ok())
+                    {
+                        FAPI_ERR("Scom error clearing EX_OCC_SPWKUP");
+                        break;
+                    }
+                    // >>>> End: Move to proc_sbe_
+
+                    core_flag =  true;
+                }  // Chiplet Enabled
+                else  // Not Functional so skip it
+                {
+                    // Do nothing
+                }
+            }
+	    }  // chiplet loop
 
     } while(0);
 
diff --git a/src/usr/hwpf/hwp/include/p8_scom_addresses.H b/src/usr/hwpf/hwp/include/p8_scom_addresses.H
index 47870de06..86cc62df9 100644
--- a/src/usr/hwpf/hwp/include/p8_scom_addresses.H
+++ b/src/usr/hwpf/hwp/include/p8_scom_addresses.H
@@ -20,7 +20,7 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_scom_addresses.H,v 1.124 2012/12/07 21:32:13 stillgs Exp $
+// $Id: p8_scom_addresses.H,v 1.125 2012/12/12 04:55:22 stillgs Exp $
 // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/p8_scom_addresses.H,v $
 //------------------------------------------------------------------------------
 // *! (C) Copyright International Business Machines Corp. 2011
@@ -1602,6 +1602,19 @@ CONST_UINT64_T( EX_GP3_0x100F0012                     , ULL(0x100F0012) );
 CONST_UINT64_T( EX_GP3_AND_0x100F0013                 , ULL(0x100F0013) );
 CONST_UINT64_T( EX_GP3_OR_0x100F0014                  , ULL(0x100F0014) );
 
+//Slave Configuration Register
+CONST_UINT64_T( EX_SLAVE_CONFIG_0x100F001E            , ULL(0x100F001E) );
+
+//Hang counter registers
+CONST_UINT64_T( EX_HANG_P0_0x100F0020                 , ULL(0x100F0020) );
+CONST_UINT64_T( EX_HANG_P1_0x100F0021                 , ULL(0x100F0021) );
+CONST_UINT64_T( EX_HANG_P2_0x100F0022                 , ULL(0x100F0022) );
+CONST_UINT64_T( EX_HANG_P3_0x100F0023                 , ULL(0x100F0023) );
+CONST_UINT64_T( EX_HANG_P4_0x100F0024                 , ULL(0x100F0024) );
+CONST_UINT64_T( EX_HANG_P5_0x100F0025                 , ULL(0x100F0025) );
+CONST_UINT64_T( EX_HANG_P6_0x100F0026                 , ULL(0x100F0026) );
+CONST_UINT64_T( EX_HANG_PRE_0x100F0028                , ULL(0x100F0028) );
+
 // Atomic Lock
 CONST_UINT64_T( EX_ATOMIC_LOCK_0x100F03FF             , ULL(0x100F03FF) );
 
@@ -1674,15 +1687,7 @@ CONST_UINT64_T( EX15_GP3_OR_0x1F0F0014                , ULL(0x1F0F0014) );
 //      EX PCB SLAVE PM
 //------------------------------------------------------------------------------
 //Generic names (need to add in (cuTarget.chipUnitNum * 0x01000000)) when being used
-//Hang counter registers
-CONST_UINT64_T( EX_HANG_P0_0x100F0020                 , ULL(0x100F0020) );
-CONST_UINT64_T( EX_HANG_P1_0x100F0021                 , ULL(0x100F0021) );
-CONST_UINT64_T( EX_HANG_P2_0x100F0022                 , ULL(0x100F0022) );
-CONST_UINT64_T( EX_HANG_P3_0x100F0023                 , ULL(0x100F0023) );
-CONST_UINT64_T( EX_HANG_P4_0x100F0024                 , ULL(0x100F0024) );
-CONST_UINT64_T( EX_HANG_P5_0x100F0025                 , ULL(0x100F0025) );
-CONST_UINT64_T( EX_HANG_P6_0x100F0026                 , ULL(0x100F0026) );
-CONST_UINT64_T( EX_HANG_PRE_0x100F0028                , ULL(0x100F0028) );
+
 //PMGP0 Register
 CONST_UINT64_T( EX_PMGP0_0x100F0100                   , ULL(0x100F0100) );
 CONST_UINT64_T( EX_PMGP0_AND_0x100F0101               , ULL(0x100F0101) );
@@ -1786,6 +1791,9 @@ This section is automatically updated by CVS when you check in this file.
 Be sure to create CVS comments when you commit so that they can be included here.
 
 $Log: p8_scom_addresses.H,v $
+Revision 1.125  2012/12/12 04:55:22  stillgs
+Added EX PCBS Slave Configuration register
+
 Revision 1.124  2012/12/07 21:32:13  stillgs
 Fix ECO PFET Delay register name problem
 
diff --git a/src/usr/hwpf/makefile b/src/usr/hwpf/makefile
index e9e705e37..48cb151de 100644
--- a/src/usr/hwpf/makefile
+++ b/src/usr/hwpf/makefile
@@ -73,9 +73,9 @@ HWP_ERROR_XML_FILES = hwp/fapiHwpErrorInfo.xml   \
     hwp/runtime_errors/proc_cpu_special_wakeup_errors.xml \
     hwp/runtime_errors/p8_poregpe_errors.xml \
     hwp/runtime_errors/p8_pba_init_errors.xml \
-    hwp/dram_initialization/host_mpipl_service/proc_mpipl_chip_cleanup_errors.xml
-
-
+    hwp/dram_initialization/host_mpipl_service/proc_mpipl_chip_cleanup_errors.xml \
+    hwp/build_winkle_images/p8_set_pore_bar/p8_pfet_init_errors.xml
+    
 ## these get generated into obj/genfiles/AttributeIds.H
 HWP_ATTR_XML_FILES = hwp/memory_attributes.xml \
                      hwp/L2_L3_attributes.xml \