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authorThi Tran <thi@us.ibm.com>2011-11-11 11:01:41 -0600
committerThi N. Tran <thi@us.ibm.com>2011-11-11 12:13:28 -0600
commit1595ed5f5602346579dba1f8714d3092f50e928f (patch)
tree2d58a72a8936ff6eb87eab8e3418b76a536f9b32 /src/usr/hwpf/test/hwpftest.H
parentc4c52d57c809bc9b6c8a94a8d9fb66489f246a18 (diff)
downloadtalos-hostboot-1595ed5f5602346579dba1f8714d3092f50e928f.tar.gz
talos-hostboot-1595ed5f5602346579dba1f8714d3092f50e928f.zip
Modifications to run Sprint 6 code on VBU
Change-Id: I28b4c114bdfb00a8f252bc4ce12a725f292c266b Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/495 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr/hwpf/test/hwpftest.H')
-rw-r--r--src/usr/hwpf/test/hwpftest.H38
1 files changed, 23 insertions, 15 deletions
diff --git a/src/usr/hwpf/test/hwpftest.H b/src/usr/hwpf/test/hwpftest.H
index ef497c0cc..42fdbccbf 100644
--- a/src/usr/hwpf/test/hwpftest.H
+++ b/src/usr/hwpf/test/hwpftest.H
@@ -175,21 +175,29 @@ public:
{0x000000000006002c, 0, 0x0000000000000183},
{0x000000000006800b, 0, 0},
{0x000000000006800c, 0, 0x8000000000000000 >> 0x17},
- {0x0000000013010002, 0, 0x0000000000000181},
- {0x0000000013013283, 0, 0x3c90000000000000 |
- 0x8000000000000000 >> 0x0c |
- 0x8000000000000000 >> 0x0d |
- 0x0306400412000000 >> 0x0e},
- {0x0000000013013284, 0, 0x3c90000000000000},
- {0x0000000013013285, 0, 0x8000000000000000 >> 0x0f |
- 0x8000000000000000 >> 0x10 |
- 0x8000000000000000 >> 0x13 |
- 0x0306400412000000 >> 0x15 },
- {0x0000000013013286, 0, 0},
- {0x0000000013013287, 0, 0x0000000000000182},
- {0x0000000013013288, 0, 0x0000000000000192},
- {0x0000000013013289, 0, 0x8000000000000000 >> 0x17},
- {0x0000000013030007, 0, 0x0000000000000182}
+ {0x0000000013010002, 0, 0xAABBC00000000000},
+ {0x0000000013030007, 0, 0x00000CDE00000000},
+ /*
+ * @todo
+ * @VBU workaround
+ * All SCR reg addresses below are only supported from chip release 052 and beyond.
+ * Release 051, which is used by current VBU model, contain different addresses for
+ * these registers.
+ * Disable them for now, needs to re-enable them when VBU upgrade to use chip release 052
+ {0x0000000013013283, 0, 0x3c90000000000000 |
+ 0x8000000000000000 >> 0x0c |
+ 0x8000000000000000 >> 0x0d |
+ 0x0306400412000000 >> 0x0e},
+ {0x0000000013013284, 0, 0x3c90000000000000},
+ {0x0000000013013285, 0, 0x8000000000000000 >> 0x0f |
+ 0x8000000000000000 >> 0x10 |
+ 0x8000000000000000 >> 0x13 |
+ 0x0306400412000000 >> 0x15 },
+ {0x0000000013013286, 0, 0},
+ {0x0000000013013287, 0, 0x0000000000000182},
+ {0x0000000013013288, 0, 0x0000000000000192},
+ {0x0000000013013289, 0, 0x8000000000000000 >> 0x17}
+ */
};
fapi::ReturnCode l_rc = fapi::FAPI_RC_SUCCESS;
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