INITPROC: Hostboot SW246743 insecure/GP0 iovalids fix

Change-Id: Iae575f89828de19d82c3d7b88f09d475d700666c
CQ:SW246743
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/9041
Tested-by: Jenkins Server
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

3 files changed, 384 insertions, 238 deletions

diff --git a/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_iovalid.C b/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_iovalid.C
index b10ef2970..56edb9229 100644
--- a/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_iovalid.C
+++ b/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_iovalid.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* IBM CONFIDENTIAL                                                       */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2012,2013              */
+/* COPYRIGHT International Business Machines Corp. 2012,2014              */
 /*                                                                        */
 /* p1                                                                     */
 /*                                                                        */
@@ -20,7 +20,7 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: proc_fab_iovalid.C,v 1.14 2013/12/13 16:03:40 jmcgill Exp $
+// $Id: proc_fab_iovalid.C,v 1.15 2014/02/12 18:55:11 jmcgill Exp $
 // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_fab_iovalid.C,v $
 //------------------------------------------------------------------------------
 // *|
@@ -220,72 +220,66 @@ fapi::ReturnCode proc_fab_iovalid_manage_a_links(
 
     do
     {
-        // do not attempt to drop secure iovalid
-        // running on FSP (stopclocks), this code will be unable to adjust this register
-        // clearing the GP0 settings should be sufficient to drop the downstream iovalids
-        if (i_set_not_clear)
+        // query secure iovalid attribute, used to qualify iovalid set only
+        rc = FAPI_ATTR_GET(ATTR_CHIP_EC_FEATURE_SECURE_IOVALID_PRESENT,
+                           &(i_proc_chip.this_chip),
+                           secure_iovalid_present_attr);
+        if (!rc.ok())
         {
-            // query secure iovalid attribute
-            rc = FAPI_ATTR_GET(ATTR_CHIP_EC_FEATURE_SECURE_IOVALID_PRESENT,
-                               &(i_proc_chip.this_chip),
-                               secure_iovalid_present_attr);
-            if (!rc.ok())
-            {
-                FAPI_ERR("proc_fab_iovalid_manage_a_links: Error querying ATTR_CHIP_EC_FEATURE_SECURE_IOVALID_PRESENT");
-                break;
-            }
+            FAPI_ERR("proc_fab_iovalid_manage_a_links: Error querying ATTR_CHIP_EC_FEATURE_SECURE_IOVALID_PRESENT");
+            break;
+        }
             
-            if (i_proc_chip.a0)
+        if (i_proc_chip.a0)
+        {
+            FAPI_DBG("proc_fab_iovalid_manage_a_links: Adding link A0 to active link mask");
+            rc_ecmd |= gp0_iovalid_active.setBit(A_GP0_A0_IOVALID_BIT);
+            if (secure_iovalid_present_attr && i_set_not_clear)
             {
-                FAPI_DBG("proc_fab_iovalid_manage_a_links: Adding link A0 to active link mask");
-                rc_ecmd |= gp0_iovalid_active.setBit(A_GP0_A0_IOVALID_BIT);
-                if (secure_iovalid_present_attr)
+                FAPI_DBG("proc_fab_iovalid_manage_a_links: Adding link A0 to active link mask (secure)");
+                if (i_set_not_clear)
                 {
-                    FAPI_DBG("proc_fab_iovalid_manage_a_links: Adding link A0 to active link mask (secure)");
-                    if (i_set_not_clear)
-                    {
-                        rc_ecmd |= secure_iovalid_data.setBit(ADU_IOS_LINK_EN_A0_IOVALID_BIT);
-                    }
-                    rc_ecmd |= secure_iovalid_mask.setBit(ADU_IOS_LINK_EN_A0_IOVALID_BIT);
+                    rc_ecmd |= secure_iovalid_data.setBit(ADU_IOS_LINK_EN_A0_IOVALID_BIT);
                 }
+                rc_ecmd |= secure_iovalid_mask.setBit(ADU_IOS_LINK_EN_A0_IOVALID_BIT);
             }
-            if (i_proc_chip.a1)
+        }
+        if (i_proc_chip.a1)
+        {
+            FAPI_DBG("proc_fab_iovalid_manage_a_links: Adding link A1 to active link mask");
+            rc_ecmd |= gp0_iovalid_active.setBit(A_GP0_A1_IOVALID_BIT);
+            if (secure_iovalid_present_attr && i_set_not_clear)
             {
-                FAPI_DBG("proc_fab_iovalid_manage_a_links: Adding link A1 to active link mask");
-                rc_ecmd |= gp0_iovalid_active.setBit(A_GP0_A1_IOVALID_BIT);
-                if (secure_iovalid_present_attr)
+                FAPI_DBG("proc_fab_iovalid_manage_a_links: Adding link A1 to active link mask (secure)");
+                if (i_set_not_clear)
                 {
-                    FAPI_DBG("proc_fab_iovalid_manage_a_links: Adding link A1 to active link mask (secure)");
-                    if (i_set_not_clear)
-                    {
-                        rc_ecmd |= secure_iovalid_data.setBit(ADU_IOS_LINK_EN_A1_IOVALID_BIT);
-                    }
-                    rc_ecmd |= secure_iovalid_mask.setBit(ADU_IOS_LINK_EN_A1_IOVALID_BIT);
+                    rc_ecmd |= secure_iovalid_data.setBit(ADU_IOS_LINK_EN_A1_IOVALID_BIT);
                 }
+                rc_ecmd |= secure_iovalid_mask.setBit(ADU_IOS_LINK_EN_A1_IOVALID_BIT);
             }
-            if (i_proc_chip.a2)
+        }
+        if (i_proc_chip.a2)
+        {
+            FAPI_DBG("proc_fab_iovalid_manage_a_links: Adding link A2 to active link mask");
+            rc_ecmd |= gp0_iovalid_active.setBit(A_GP0_A2_IOVALID_BIT);
+            if (secure_iovalid_present_attr && i_set_not_clear)
             {
-                FAPI_DBG("proc_fab_iovalid_manage_a_links: Adding link A2 to active link mask");
-                rc_ecmd |= gp0_iovalid_active.setBit(A_GP0_A2_IOVALID_BIT);
-                if (secure_iovalid_present_attr)
+                FAPI_DBG("proc_fab_iovalid_manage_a_links: Adding link A2 to active link mask (secure)");
+                if (i_set_not_clear)
                 {
-                    FAPI_DBG("proc_fab_iovalid_manage_a_links: Adding link A2 to active link mask (secure)");
-                    if (i_set_not_clear)
-                    {
-                        rc_ecmd |= secure_iovalid_data.setBit(ADU_IOS_LINK_EN_A2_IOVALID_BIT);
-                    }
-                    rc_ecmd |= secure_iovalid_mask.setBit(ADU_IOS_LINK_EN_A2_IOVALID_BIT);
+                    rc_ecmd |= secure_iovalid_data.setBit(ADU_IOS_LINK_EN_A2_IOVALID_BIT);
                 }
+                rc_ecmd |= secure_iovalid_mask.setBit(ADU_IOS_LINK_EN_A2_IOVALID_BIT);
             }
-            
-            // check aggregate return code from buffer manipulation operations
-            if (rc_ecmd)
-            {
-                FAPI_ERR("proc_fab_iovalid_manage_a_links: Error 0x%x setting up active link mask data buffersa",
-                         rc_ecmd);
-                rc.setEcmdError(rc_ecmd);
-                break;
-            }
+        }
+        
+        // check aggregate return code from buffer manipulation operations
+        if (rc_ecmd)
+        {
+            FAPI_ERR("proc_fab_iovalid_manage_a_links: Error 0x%x setting up active link mask data buffersa",
+                     rc_ecmd);
+            rc.setEcmdError(rc_ecmd);
+            break;
         }
 
         // write appropriate GP0 mask register to perform desired operation
@@ -300,7 +294,10 @@ fapi::ReturnCode proc_fab_iovalid_manage_a_links(
             break;
         }
 
-        // adjust secure iovalids if present
+        // manage secure iovalids if present
+        // do not attempt to drop secure iovalid
+        // running on FSP (stopclocks), this code will be unable to adjust this register
+        // clearing the GP0 settings should be sufficient to drop the downstream iovalids
         if (secure_iovalid_present_attr && i_set_not_clear)
         {
             rc = fapiPutScomUnderMask(i_proc_chip.this_chip,
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pba_init.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pba_init.C
index 02d37404d..e2a699900 100644
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pba_init.C
+++ b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pba_init.C
@@ -20,8 +20,8 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_pba_init.C,v 1.14 2013/11/23 04:20:49 stillgs Exp $
-// $Source: /archive/shadow/ekb/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pba_init.C,v $
+// $Id: p8_pba_init.C,v 1.16 2014/02/17 02:36:40 stillgs Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pba_init.C,v $
 //------------------------------------------------------------------------------
 // *! (C) Copyright International Business Machines Corp. 2011
 // *! All Rights Reserved -- Property of IBM
@@ -143,7 +143,7 @@ pba_init_reset(const Target& i_target)
 {
 
     fapi::ReturnCode    rc;
-    uint32_t            l_rc;
+    uint32_t            l_rc = 0;
     ecmdDataBufferBase  data(64);
     uint64_t            address;
 
@@ -154,23 +154,23 @@ pba_init_reset(const Target& i_target)
         PBA_MODE_0x00064000            ,
         PBA_BCDE_STAT_0x00064012       ,
         PBA_BCDE_PBADR_0x00064013      ,
-        PBA_BCDE_OCIBAR_0x00064014     ,        
+        PBA_BCDE_OCIBAR_0x00064014     ,
         PBA_BCUE_CTL_0x00064015        ,
         PBA_BCUE_SET_0x00064016        ,
         PBA_BCUE_STAT_0x00064017       ,
-        PBA_BCUE_PBADR_0x00064018      ,      
+        PBA_BCUE_PBADR_0x00064018      ,
         PBA_BCUE_OCIBAR_0x00064019     ,
         PBAXSHBR0_00064026             ,
         PBAXSHCS0_00064027             ,
-        PBAXSHBR1_0006402A             ,        
+        PBAXSHBR1_0006402A             ,
         PBAXSHBR1_0006402B             ,
         PBA_SLVCTL0_0x00064004         ,
         PBA_SLVCTL1_0x00064005         ,
 //      PBA_SLVCTL2_0x00064006         ,  // this is only touched by SLW init
-        PBA_SLVCTL3_0x00064007         ,        
+        PBA_SLVCTL3_0x00064007         ,
         PBA_FIR_0x02010840             ,
         PBA_CONFIG_0x0201084B          ,
-        PBA_ERR_RPT0_0x0201084C        
+        PBA_ERR_RPT0_0x0201084C
 //      PBAXCFG_00064021                  // Takes more than write of 0
                                             // and should be done last of
                                             // after err_rpt clearing
@@ -179,6 +179,52 @@ pba_init_reset(const Target& i_target)
     FAPI_INF("pba_init_reset start ...");
     do
     {
+        // Stop the  BCDE and BCUE
+        address = PBA_BCDE_CTL_0x00064010;
+
+        l_rc |= data.flushTo0();
+        l_rc |= data.setBit(0);      // Bit 0: BCDE_CTL_STOP
+        if (l_rc)
+        {
+            rc.setEcmdError(l_rc);
+            break;
+        }
+        FAPI_INF("\tStopping BCDE addr=0x%08llX, value=0x%16llX, Target = %s",
+                            address,
+                            data.getDoubleWord(0),
+                            i_target.toEcmdString());
+        rc = fapiPutScom(i_target, address, data);
+        if (!rc.ok())
+        {
+            FAPI_ERR("fapiPutScom(addr=0x%08llX) failed, Target = %s",
+                            address,
+                            i_target.toEcmdString());
+            break;
+        }
+
+        address = PBA_BCUE_CTL_0x00064015;
+
+        l_rc |= data.flushTo0();
+        l_rc |= data.setBit(0);      // Bit 0: BCUE_CTL_STOP
+        if (l_rc)
+        {
+            rc.setEcmdError(l_rc);
+            break;
+        }
+        FAPI_INF("\tStopping BCUE addr=0x%08llX, value=0x%16llX, Target = %s",
+                            address,
+                            data.getDoubleWord(0),
+                            i_target.toEcmdString());
+        rc = fapiPutScom(i_target, address, data);
+        if (!rc.ok())
+        {
+            FAPI_ERR("fapiPutScom(addr=0x%08llX) failed, Target = %s",
+                            address,
+                            i_target.toEcmdString());
+            break;
+        }
+
+
         // Reset each slave and wait for completion.
         rc =  pba_slave_reset(i_target);
         if (rc)
@@ -258,9 +304,9 @@ pba_init_init(const Target& i_target)
 {
 
     fapi::ReturnCode    rc;
-    uint32_t            l_rc; 
+    uint32_t            l_rc = 0;
     ecmdDataBufferBase  data(64);
-    
+
 
     // PBAX defaults
     uint8_t ATTR_PM_PBAX_RCV_RESERV_TIMEOUT_value = 0 ;
@@ -283,10 +329,8 @@ pba_init_init(const Target& i_target)
             break;
         }
 
-        // For reset, this register should be written with the value from figtree to restore the
-        // initial hardware state.
-        // For init, needs detailing for performance and/or CHSW enable/disable TODO
-        // init case
+        // This register is cleared as there are no chicken switches that need
+        // to be disabled.  All other bits are set by OCC Firmware.
         FAPI_INF("flushing PBA_CONFIG register ");
 
         rc = fapiPutScom(i_target, PBA_CONFIG_0x0201084B  , data);
@@ -324,8 +368,8 @@ pba_init_init(const Target& i_target)
         // PBA_PBOCR4_0x00064024
         // PBA_PBOCR5_0x0006402
 
-        // The PBA BARs and their associated Masks are done outside of this FAPI 
-        // set.  Thus, during a reset, the BARS/MASKS are retained. This applies 
+        // The PBA BARs and their associated Masks are done outside of this FAPI
+        // set.  Thus, during a reset, the BARS/MASKS are retained. This applies
         // to:
         // PBA_BAR0_0x02013F00
         // PBA_BARMSK0_0x02013F04
@@ -441,179 +485,227 @@ pba_init_config(const Target& i_target)
 /// resources.
 ///
 /// \bug Need to disable slave prefetch for now for all shared buffers until a
-/// mode bit gets added too the PBA logic.
+/// mode bit gets added too the PBA logic.  Dealt with using
+/// ATTR_PROC_EC_PBA_PREFETCH_ENABLE.
 ///
 /// \bug The dis_slvmatch_order bit is going away
 
 fapi::ReturnCode
 pba_slave_setup_init(const Target& i_target)
 {
-    pba_mode_t pm;
-    pba_slvctln_t ps;
-    fapi::ReturnCode rc;
-    uint32_t l_rc;              // local returncode
-    ecmdDataBufferBase data(64);
-
-    // Set the PBA_MODECTL register. It's not yet clear how PBA BCE
-    // transaction size will affect performance - for now we go with the
-    // largest size.  The HTM marker space is enabled and configured. Slave
-    // fairness is enabled. The setting 'dis_slvmatch_order' ensures that PBA
-    // will correctly flush write data before allowing a read of the same
-    // address from a different master on a different slave.  The second write
-    // buffer is enabled.
-    // prepare the value to be set:
-    pm.value = 0;
-    pm.fields.pba_region = PBA_OCI_REGION;
-    pm.fields.bcde_ocitrans = PBA_BCE_OCI_TRANSACTION_64_BYTES;
-    pm.fields.bcue_ocitrans = PBA_BCE_OCI_TRANSACTION_64_BYTES;
-    pm.fields.en_marker_ack = 1;
-    pm.fields.oci_marker_space = (PBA_OCI_MARKER_BASE >> 16) & 0x7;
-    pm.fields.en_slave_fairness = 1;
-    pm.fields.dis_slvmatch_order = 1;
-    pm.fields.en_second_wrbuf = 1;
-
-    l_rc = data.setDoubleWord(0, pm.value);
-    if (l_rc)
-    {
-       rc.setEcmdError(l_rc);
-       return rc;
-    }
+    pba_mode_t          pm;
+    pba_slvctln_t       ps;
+    fapi::ReturnCode    rc;
+    uint32_t            l_rc = 0;
+    ecmdDataBufferBase  data(64);
+    
+    uint8_t             ec_allows_pba_prefetch_enable;
 
-    // write the prepared value
-    rc = fapiPutScom(i_target, PBA_MODE_0x00064000 , data);
-    if (rc)
-    {
-       FAPI_ERR("fapiPutScom( PBA_MODE_0x00064000 ) failed. With rc = 0x%x", (uint32_t)rc);
-       return rc;
-    }
+    do
+    {       
+        rc = FAPI_ATTR_GET(ATTR_PROC_EC_PBA_PREFETCH_ENABLE,
+                                   &i_target,
+                                   ec_allows_pba_prefetch_enable);
+        if(rc)
+        {
+     	    FAPI_ERR("Error querying Chip EC feature: "
+                     "ATTR_PROC_EC_PBA_PREFETCH_ENABLE");
+            break;
+        }
 
-    // Slave 0 (PORE-GPE).  This is a read/write slave. We only do 'static'
-    // setup here. Dynamic setup will be done by each GPE program that needs
-    // to access mainstore, before issuing any trasactions targeting the PBA
-    // bridge.
-
-    //   pba_slave_reset(PBA_SLAVE_PORE_GPE);
-    ps.value = 0;
-    ps.fields.enable = 1;
-    ps.fields.mid_match_value = OCI_MASTER_ID_PORE_GPE;
-    ps.fields.mid_care_mask = 0x7;
-    ps.fields.buf_alloc_a = 1;
-    ps.fields.buf_alloc_b = 1;
-    ps.fields.buf_alloc_c = 1;
-    ps.fields.buf_alloc_w = 1;
-    l_rc = data.setDoubleWord(0, ps.value);
-    if (l_rc)
-    {
-       FAPI_ERR("data.setDoubleWord ( ) failed. With rc = 0x%x", (uint32_t)l_rc);   rc.setEcmdError(l_rc);
-       return rc;
-    } // end if
+        FAPI_INF("PBA prefetch is %sallowed",
+                 (ec_allows_pba_prefetch_enable ? "" : "NOT "));
+
+        // Set the PBA_MODECTL register. It's not yet clear how PBA BCE
+        // transaction size will affect performance - for now we go with the
+        // largest size.  The HTM marker space is enabled and configured. Slave
+        // fairness is enabled. The setting 'dis_slvmatch_order' ensures that PBA
+        // will correctly flush write data before allowing a read of the same
+        // address from a different master on a different slave.  The second write
+        // buffer is enabled.
+        // prepare the value to be set:
+        pm.value = 0;
+        pm.fields.pba_region = PBA_OCI_REGION;
+        pm.fields.bcde_ocitrans = PBA_BCE_OCI_TRANSACTION_64_BYTES;
+        pm.fields.bcue_ocitrans = PBA_BCE_OCI_TRANSACTION_64_BYTES;
+        pm.fields.en_marker_ack = 1;
+        pm.fields.oci_marker_space = (PBA_OCI_MARKER_BASE >> 16) & 0x7;
+        pm.fields.en_slave_fairness = 1;
+        pm.fields.dis_slvmatch_order = 1;
+        pm.fields.en_second_wrbuf = 1;
+
+        l_rc = data.setDoubleWord(0, pm.value);
+        if (l_rc)
+        {
+           rc.setEcmdError(l_rc);
+           return rc;
+        }
 
-    rc = fapiPutScom(i_target, PBA_SLVCTL0_0x00064004 , data);
-    if (rc)
-    {
-       FAPI_ERR("fapiPutScom( PBA_SLVCTL0_0x00064004 ) failed. With rc = 0x%x", (uint32_t)rc);
-       return rc;
-    }
+        // write the prepared value
+        rc = fapiPutScom(i_target, PBA_MODE_0x00064000 , data);
+        if (rc)
+        {
+           FAPI_ERR("fapiPutScom( PBA_MODE_0x00064000 ) failed. With rc = 0x%x", (uint32_t)rc);
+           break;
+        }
 
-    // Slave 1 (405 ICU/DCU).  This is a read/write slave.  Write gethering is
-    // allowed, but with the shortest possible timeout. This slave is
-    // effectively disabled soon after IPL.
-
-    //    pba_slave_reset(PBA_SLAVE_OCC);
-    ps.value = 0;
-    ps.fields.enable = 1;
-    ps.fields.mid_match_value = OCI_MASTER_ID_OCC_ICU & OCI_MASTER_ID_OCC_DCU;
-    ps.fields.mid_care_mask = OCI_MASTER_ID_OCC_ICU & OCI_MASTER_ID_OCC_DCU;
-    ps.fields.read_ttype = PBA_READ_TTYPE_CL_RD_NC;
-    ps.fields.read_prefetch_ctl = PBA_READ_PREFETCH_NONE;
-    ps.fields.write_ttype = PBA_WRITE_TTYPE_DMA_PR_WR;
-    ps.fields.wr_gather_timeout = PBA_WRITE_GATHER_TIMEOUT_2_PULSES;
-    ps.fields.buf_alloc_a = 1;
-    ps.fields.buf_alloc_b = 1;
-    ps.fields.buf_alloc_c = 1;
-    ps.fields.buf_alloc_w = 1;
-
-    l_rc = data.setDoubleWord(0, ps.value);
-    if (l_rc)
-    {
-       FAPI_ERR("data.setDoubleWord ( ) failed. With rc = 0x%x", (uint32_t)l_rc);
-       rc.setEcmdError(l_rc);
-       return rc;
-    } // end if
+        // Slave 0 (PORE-GPE).  This is a read/write slave. We only do 'static'
+        // setup here. Dynamic setup will be done by each GPE program that needs
+        // to access mainstore, before issuing any trasactions targeting the PBA
+        // bridge.
+
+        //   pba_slave_reset(PBA_SLAVE_PORE_GPE);
+        ps.value = 0;
+        ps.fields.enable = 1;
+        ps.fields.mid_match_value = OCI_MASTER_ID_PORE_GPE;
+        ps.fields.mid_care_mask = 0x7;
+        ps.fields.buf_alloc_a = 1;
+        ps.fields.buf_alloc_b = 1;
+        ps.fields.buf_alloc_c = 1;
+        ps.fields.buf_alloc_w = 1;
+
+        // Turn off buffer sharing for EC that don't allow prefetch
+        // GPEs only use buffer A
+        if (!ec_allows_pba_prefetch_enable)
+        {
+            ps.fields.buf_alloc_b = 0;
+            ps.fields.buf_alloc_c = 0;
+        }
 
-    rc = fapiPutScom(i_target, PBA_SLVCTL1_0x00064005 , data);
-    if (rc)
-    {
-       FAPI_ERR("fapiPutScom( PBA_SLVCTL1_0x00064005 ) failed. With rc = 0x%x", (uint32_t)rc);
-       return rc;
-    }
+        l_rc = data.setDoubleWord(0, ps.value);
+        if (l_rc)
+        {
+           FAPI_ERR("data.setDoubleWord ( ) failed. With rc = 0x%x", (uint32_t)l_rc);   
+           rc.setEcmdError(l_rc);
+           break;
+        } // end if
 
-/*  Removed as this is done by p8_set_port_bar.C for the SLW-used path
-    through the PBA
-
-    // Slave 2 (PORE-SLW).  This is a read/write slave. Write gathering is
-    // allowed, but with the shortest possible timeout.  The slave is set up
-    // to allow normal reads and writes at initialization.  The 24x7 code may
-    // reprogram this slave for IMA writes using special code sequences that
-    // restore normal DMA writes after each IMA sequence.
-
-    //   pba_slave_reset(PBA_SLAVE_PORE_SLW);
-    ps.value = 0;
-    ps.fields.enable = 1;
-    ps.fields.mid_match_value = OCI_MASTER_ID_PORE_SLW;
-    ps.fields.mid_care_mask = 0x7;
-    ps.fields.read_ttype = PBA_READ_TTYPE_CL_RD_NC;
-    ps.fields.read_prefetch_ctl = PBA_READ_PREFETCH_NONE;
-    ps.fields.write_ttype = PBA_WRITE_TTYPE_DMA_PR_WR;
-    ps.fields.wr_gather_timeout = PBA_WRITE_GATHER_TIMEOUT_2_PULSES;
-    ps.fields.buf_alloc_a = 1;
-    ps.fields.buf_alloc_b = 1;
-    ps.fields.buf_alloc_c = 1;
-    ps.fields.buf_alloc_w = 1;
-    l_rc = data.setDoubleWord(0, ps.value);
-    if (l_rc)
-    {
-       FAPI_ERR("data.setDoubleWord ( ) failed. With rc = 0x%x", (uint32_t)l_rc);
-       rc.setEcmdError(l_rc);
-       return rc;
-    } // end if
+        rc = fapiPutScom(i_target, PBA_SLVCTL0_0x00064004 , data);
+        if (rc)
+        {
+           FAPI_ERR("fapiPutScom( PBA_SLVCTL0_0x00064004 ) failed. With rc = 0x%x", (uint32_t)rc);
+           break;
+        }
 
-    rc = fapiPutScom(i_target, PBA_SLVCTL2_0x00064006 , data);
-    if (rc)
-    {
-       FAPI_ERR("fapiPutScom( PBA_SLVCTL2_0x00064006 ) failed. With rc = 0x%x", (uint32_t)rc);
-       return rc;
-    }
-*/
-
-    // Slave 3 (OCB).  This is a read/write slave. Write gathering is
-    // allowed, but with the shortest possible timeout.
-
-    //   pba_slave_reset(PBA_SLAVE_OCB);
-    ps.value = 0;
-    ps.fields.enable = 1;
-    ps.fields.mid_match_value = OCI_MASTER_ID_OCB;
-    ps.fields.mid_care_mask = 0x7;
-    ps.fields.read_ttype = PBA_READ_TTYPE_CL_RD_NC;
-    ps.fields.read_prefetch_ctl = PBA_READ_PREFETCH_NONE;
-    ps.fields.write_ttype = PBA_WRITE_TTYPE_DMA_PR_WR;
-    ps.fields.wr_gather_timeout = PBA_WRITE_GATHER_TIMEOUT_2_PULSES;
-    ps.fields.buf_alloc_a = 1;
-    ps.fields.buf_alloc_b = 1;
-    ps.fields.buf_alloc_c = 1;
-    ps.fields.buf_alloc_w = 1;
-
-    l_rc = data.setDoubleWord(0, ps.value);
-    if (l_rc)
-    {
-       FAPI_ERR("data.setDoubleWord ( ) failed. With rc = 0x%x", (uint32_t)l_rc);   rc.setEcmdError(l_rc); return rc;
-    } // end if
+        // Slave 1 (405 ICU/DCU).  This is a read/write slave.  Write gethering is
+        // allowed, but with the shortest possible timeout. This slave is
+        // effectively disabled soon after IPL.
+
+        //    pba_slave_reset(PBA_SLAVE_OCC);
+        ps.value = 0;
+        ps.fields.enable = 1;
+        ps.fields.mid_match_value = OCI_MASTER_ID_OCC_ICU & OCI_MASTER_ID_OCC_DCU;
+        ps.fields.mid_care_mask = OCI_MASTER_ID_OCC_ICU & OCI_MASTER_ID_OCC_DCU;
+        ps.fields.read_ttype = PBA_READ_TTYPE_CL_RD_NC;
+        ps.fields.read_prefetch_ctl = PBA_READ_PREFETCH_NONE;
+        ps.fields.write_ttype = PBA_WRITE_TTYPE_DMA_PR_WR;
+        ps.fields.wr_gather_timeout = PBA_WRITE_GATHER_TIMEOUT_2_PULSES;
+        ps.fields.buf_alloc_a = 1;
+        ps.fields.buf_alloc_b = 1;
+        ps.fields.buf_alloc_c = 1;
+        ps.fields.buf_alloc_w = 1;
+
+        // Turn off buffer sharing for EC that don't allow prefetch
+        // All non-GPEs can share buffer B
+        if (!ec_allows_pba_prefetch_enable)
+        {
+            ps.fields.buf_alloc_a = 0;
+            ps.fields.buf_alloc_c = 0;
+        }
 
-    rc = fapiPutScom(i_target, PBA_SLVCTL3_0x00064007 , data);
-    if (rc)
-    {
-       FAPI_ERR("fapiPutScom( PBA_SLVCTL3_0x00064007 ) failed. With rc = 0x%x", (uint32_t)rc); return rc;
-    }
+        l_rc = data.setDoubleWord(0, ps.value);
+        if (l_rc)
+        {
+           FAPI_ERR("data.setDoubleWord ( ) failed. With rc = 0x%x", (uint32_t)l_rc);
+           rc.setEcmdError(l_rc);
+           break;
+        } // end if
+
+        rc = fapiPutScom(i_target, PBA_SLVCTL1_0x00064005 , data);
+        if (rc)
+        {
+           FAPI_ERR("fapiPutScom( PBA_SLVCTL1_0x00064005 ) failed. With rc = 0x%x", (uint32_t)rc);
+           break;
+        }
+
+    /*  Removed as this is done by p8_set_port_bar.C for the SLW-used path
+        through the PBA
+
+        // Slave 2 (PORE-SLW).  This is a read/write slave. Write gathering is
+        // allowed, but with the shortest possible timeout.  The slave is set up
+        // to allow normal reads and writes at initialization.  The 24x7 code may
+        // reprogram this slave for IMA writes using special code sequences that
+        // restore normal DMA writes after each IMA sequence.
+
+        //   pba_slave_reset(PBA_SLAVE_PORE_SLW);
+        ps.value = 0;
+        ps.fields.enable = 1;
+        ps.fields.mid_match_value = OCI_MASTER_ID_PORE_SLW;
+        ps.fields.mid_care_mask = 0x7;
+        ps.fields.read_ttype = PBA_READ_TTYPE_CL_RD_NC;
+        ps.fields.read_prefetch_ctl = PBA_READ_PREFETCH_NONE;
+        ps.fields.write_ttype = PBA_WRITE_TTYPE_DMA_PR_WR;
+        ps.fields.wr_gather_timeout = PBA_WRITE_GATHER_TIMEOUT_2_PULSES;
+        ps.fields.buf_alloc_a = 1;
+        ps.fields.buf_alloc_b = 1;
+        ps.fields.buf_alloc_c = 1;
+        ps.fields.buf_alloc_w = 1;
+        l_rc = data.setDoubleWord(0, ps.value);
+        if (l_rc)
+        {
+           FAPI_ERR("data.setDoubleWord ( ) failed. With rc = 0x%x", (uint32_t)l_rc);
+           rc.setEcmdError(l_rc);
+           break;
+        } // end if
+
+        rc = fapiPutScom(i_target, PBA_SLVCTL2_0x00064006 , data);
+        if (rc)
+        {
+           FAPI_ERR("fapiPutScom( PBA_SLVCTL2_0x00064006 ) failed. With rc = 0x%x", (uint32_t)rc);
+           break;
+        }
+    */
+
+        // Slave 3 (OCB).  This is a read/write slave. Write gathering is
+        // allowed, but with the shortest possible timeout.
+
+        //   pba_slave_reset(PBA_SLAVE_OCB);
+        ps.value = 0;
+        ps.fields.enable = 1;
+        ps.fields.mid_match_value = OCI_MASTER_ID_OCB;
+        ps.fields.mid_care_mask = 0x7;
+        ps.fields.read_ttype = PBA_READ_TTYPE_CL_RD_NC;
+        ps.fields.read_prefetch_ctl = PBA_READ_PREFETCH_NONE;
+        ps.fields.write_ttype = PBA_WRITE_TTYPE_DMA_PR_WR;
+        ps.fields.wr_gather_timeout = PBA_WRITE_GATHER_TIMEOUT_2_PULSES;
+        ps.fields.buf_alloc_a = 1;
+        ps.fields.buf_alloc_b = 1;
+        ps.fields.buf_alloc_c = 1;
+        ps.fields.buf_alloc_w = 1;
+
+        // Turn off buffer sharing for EC that don't allow prefetch
+        // All non-GPEs can share buffer B
+        if (!ec_allows_pba_prefetch_enable)
+        {
+            ps.fields.buf_alloc_a = 0;
+            ps.fields.buf_alloc_c = 0;
+        }
+
+        l_rc = data.setDoubleWord(0, ps.value);
+        if (l_rc)
+        {
+           FAPI_ERR("data.setDoubleWord ( ) failed. With rc = 0x%x", (uint32_t)l_rc);   
+           rc.setEcmdError(l_rc); 
+           break;
+        } // end if
+
+        rc = fapiPutScom(i_target, PBA_SLVCTL3_0x00064007 , data);
+        if (rc)
+        {
+           FAPI_ERR("fapiPutScom( PBA_SLVCTL3_0x00064007 ) failed. With rc = 0x%x", (uint32_t)rc); 
+           break;
+        }
+    } while(0);
 
     return rc;
 }  // end pba_slave_setup_init
@@ -693,6 +785,7 @@ pba_slave_reset(const Target& i_target)
             if (poll_failure)
             {
                  FAPI_ERR("PBA Slave Reset Timout");
+                 const fapi::Target & CHIP = i_target;
                  const uint64_t& POLLCOUNT = (uint64_t)p;
                  const uint64_t& SLAVENUM  = (uint64_t)s;
                  const uint64_t& PBASLVREG = data.getDoubleWord(0);
@@ -704,6 +797,7 @@ pba_slave_reset(const Target& i_target)
             if (data.isBitSet(8+s))
             {
                 FAPI_ERR("Slave %x still busy after reset", s);
+                const fapi::Target & CHIP = i_target;
                 const uint64_t& POLLCOUNT = (uint64_t)p;
                 const uint64_t& SLAVENUM  = (uint64_t)s;
                 const uint64_t& PBASLVREG = data.getDoubleWord(0);
@@ -719,3 +813,4 @@ pba_slave_reset(const Target& i_target)
 
 
 } //end extern C
+
diff --git a/src/usr/hwpf/hwp/runtime_errors/p8_pba_init_errors.xml b/src/usr/hwpf/hwp/runtime_errors/p8_pba_init_errors.xml
index fb613df03..b414aa598 100644
--- a/src/usr/hwpf/hwp/runtime_errors/p8_pba_init_errors.xml
+++ b/src/usr/hwpf/hwp/runtime_errors/p8_pba_init_errors.xml
@@ -5,7 +5,7 @@
 <!--                                                                        -->
 <!-- IBM CONFIDENTIAL                                                       -->
 <!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2013              -->
+<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
 <!--                                                                        -->
 <!-- p1                                                                     -->
 <!--                                                                        -->
@@ -20,19 +20,57 @@
 <!-- Origin: 30                                                             -->
 <!--                                                                        -->
 <!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: p8_pba_init_errors.xml,v 1.4 2013/08/02 19:41:06 stillgs Exp $ -->
+<!-- $Id: p8_pba_init_errors.xml,v 1.5 2014/02/17 02:30:14 stillgs Exp $ -->
 <!-- Error definitions for p8_pba_init procedure -->
 <hwpErrors>
+  <registerFfdc>
+    <id>REG_FFDC_PROC_PBA_REGISTERS</id>
+    <scomRegister>PBA_MODE_0x00064000</scomRegister>
+    <scomRegister>PBA_CONFIG_0x0201084B</scomRegister>
+    <scomRegister>PBA_SLVCTL2_0x00064006</scomRegister>
+    <scomRegister>PBA_SLVCTL0_0x00064004</scomRegister>
+    <scomRegister>PBA_SLVCTL1_0x00064005</scomRegister>
+    <scomRegister>PBA_SLVCTL2_0x00064006</scomRegister>
+    <scomRegister>PBA_SLVCTL3_0x00064007</scomRegister>
+    <scomRegister>PBA_FIR_0x02010840</scomRegister>
+    <scomRegister>PBA_ERR_RPT0_0x0201084C</scomRegister>
+    <scomRegister>PBA_ERR_RPT1_0x0201084D</scomRegister>
+    <scomRegister>PBA_ERR_RPT2_0x0201084E</scomRegister>
+    <scomRegister>PBA_BCDE_CTL_0x00064010</scomRegister>
+    <scomRegister>PBA_BCDE_SET_0x00064011</scomRegister>
+    <scomRegister>PBA_BCDE_STAT_0x00064012</scomRegister>
+    <scomRegister>PBA_BCDE_PBADR_0x00064013</scomRegister>
+    <scomRegister>PBA_BCDE_OCIBAR_0x00064014</scomRegister>
+    <scomRegister>PBA_BCUE_CTL_0x00064015</scomRegister>
+    <scomRegister>PBA_BCUE_SET_0x00064016</scomRegister>
+    <scomRegister>PBA_BCUE_STAT_0x00064017</scomRegister>
+    <scomRegister>PBA_BCUE_PBADR_0x00064018</scomRegister>
+    <scomRegister>PBA_BCUE_OCIBAR_0x00064019</scomRegister>
+    <scomRegister>PBA_PBOCR0_0x00064020</scomRegister>
+    <scomRegister>PBA_PBOCR1_0x00064021</scomRegister>
+    <scomRegister>PBA_PBOCR2_0x00064022</scomRegister>
+    <scomRegister>PBA_PBOCR3_0x00064023</scomRegister>
+    <scomRegister>PBA_PBOCR4_0x00064024</scomRegister>
+    <scomRegister>PBA_PBOCR5_0x00064025</scomRegister>
+    <scomRegister>PBA_BAR0_0x02013F00</scomRegister>
+    <scomRegister>PBA_BARMSK0_0x02013F04</scomRegister>
+    <scomRegister>PBA_BAR1_0x02013F01</scomRegister>
+    <scomRegister>PBA_BARMSK1_0x02013F05</scomRegister>
+    <scomRegister>PBA_BAR2_0x02013F02</scomRegister>
+    <scomRegister>PBA_BARMSK2_0x02013F06</scomRegister>
+    <scomRegister>PBA_BAR3_0x02013F03</scomRegister>
+    <scomRegister>PBA_BARMSK3_0x02013F07</scomRegister>
+    <scomRegister>PBA_TRUSTMODE_0x02013F08</scomRegister>
+  </registerFfdc>
   <!-- *********************************************************************** -->
   <hwpError>
     <rc>RC_PMPROC_PBA_INIT_INCORRECT_MODE</rc>
     <description>pba init procedure incorrect mode by calling function</description>
     <ffdc>PM_MODE</ffdc>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PMPROC_PBA_INIT_PUTSCOM_FAILED</rc>
-    <description>pba init putscom failed .</description>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
   </hwpError>
   <!-- *********************************************************************** -->
   <hwpError>
@@ -41,6 +79,14 @@
     <ffdc>POLLCOUNT</ffdc>
     <ffdc>SLAVENUM</ffdc>
     <ffdc>PBASLVREG</ffdc>
+    <collectRegisterFfdc>
+      <id>REG_FFDC_PROC_PBA_REGISTERS</id>
+      <target>CHIP</target>
+    </collectRegisterFfdc>
+    <callout>
+      <target>CHIP</target>
+      <priority>HIGH</priority>
+    </callout>
   </hwpError>
   <!-- *********************************************************************** -->
   <hwpError>
@@ -49,6 +95,14 @@
     <ffdc>POLLCOUNT</ffdc>
     <ffdc>SLAVENUM</ffdc>
     <ffdc>PBASLVREG</ffdc>
+    <collectRegisterFfdc>
+      <id>REG_FFDC_PROC_PBA_REGISTERS</id>
+      <target>CHIP</target>
+    </collectRegisterFfdc>
+    <callout>
+      <target>CHIP</target>
+      <priority>HIGH</priority>
+    </callout>
   </hwpError>
-  <!-- *********************************************************************** -->  
+  <!-- *********************************************************************** -->
 </hwpErrors>