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| author | Prachi Gupta <pragupta@us.ibm.com> | 2015-03-30 09:32:32 -0500 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2015-04-02 09:24:21 -0500 |
| commit | aef4c7b28a69591d496b95795e47a601b5657e31 (patch) | |
| tree | feaf549e8e2e648b6a15e62ac174ad27508d501b /src/usr/hwpf/hwp | |
| parent | 0271c390defa65d68c9282b1d9c9fcc12bee513c (diff) | |
| download | talos-hostboot-aef4c7b28a69591d496b95795e47a601b5657e31.tar.gz talos-hostboot-aef4c7b28a69591d496b95795e47a601b5657e31.zip | |
SW295054: INITPROC: FSP&Hostboot - HWP updates for week of 2/9
CQ:SW295054
Change-Id: Ia5c72fbe2f9ae9980a40a22fb055bba9d0f07cef
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/16136
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: PRACHI GUPTA <pragupta@us.ibm.com>
Tested-by: PRACHI GUPTA <pragupta@us.ibm.com>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/16756
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/hwpf/hwp')
| -rw-r--r-- | src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_mmio_attributes.xml | 61 | ||||
| -rwxr-xr-x | src/usr/hwpf/hwp/fapiHwpErrorInfo.xml | 2 |
2 files changed, 61 insertions, 2 deletions
diff --git a/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_mmio_attributes.xml b/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_mmio_attributes.xml index 9a6516302..84d133591 100644 --- a/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_mmio_attributes.xml +++ b/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_mmio_attributes.xml @@ -22,7 +22,7 @@ <!-- permissions and limitations under the License. --> <!-- --> <!-- IBM_PROLOG_END_TAG --> -<!-- $Id: proc_setup_bars_mmio_attributes.xml,v 1.5 2014/11/18 17:44:22 jmcgill Exp $ --> +<!-- $Id: proc_setup_bars_mmio_attributes.xml,v 1.6 2015/02/02 18:57:33 jmcgill Exp $ --> <!-- proc_setup_bars_mmio_attributes.xml --> <attributes> <!-- ********************************************************************* --> @@ -263,6 +263,65 @@ </attribute> <!-- ********************************************************************* --> <attribute> + <id>ATTR_PROC_NPU_MMIO_BAR_ENABLE</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>NPU MMIO BAR enables + creator: platform + consumer: proc_setup_bars + firmware notes: + first dimension: unit number (0:3) + second dimension: BAR number (0:1) + </description> + <valueType>uint8</valueType> + <enum>DISABLE = 0x0, ENABLE = 0x1</enum> + <array>4,2</array> + <platInit/> + <persistRuntime/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_PROC_NPU_MMIO_BAR_BASE_ADDR</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>NPU MMIO BAR base address values + creator: platform + consumer: proc_setup_bars + firmware notes: + 64-bit address representing BAR RA + NOTE: BAR register covers RA 14:51 + first dimension: unit number (0:3) + second dimension: BAR number (0:1) + </description> + <valueType>uint64</valueType> + <array>4,2</array> + <platInit/> + <persistRuntime/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_PROC_NPU_MMIO_BAR_SIZE</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>NPU MMIO BAR size values + creator: platform + consumer: proc_setup_bars + firmware notes: none + first dimension: unit number (0:3) + second dimension: BAR number (0:1) + </description> + <valueType>uint64</valueType> + <enum> + 2_MB = 0x0000000000200000, + 1_MB = 0x0000000000100000, + 512_KB = 0x0000000000080000, + 256_KB = 0x0000000000040000, + 128_KB = 0x0000000000020000, + 64_KB = 0x0000000000010000 + </enum> + <array>4,2</array> + <platInit/> + <persistRuntime/> + </attribute> + <!-- ********************************************************************* --> + <attribute> <id>ATTR_PROC_PCIE_BAR_ENABLE</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description>PCIE BAR enable diff --git a/src/usr/hwpf/hwp/fapiHwpErrorInfo.xml b/src/usr/hwpf/hwp/fapiHwpErrorInfo.xml index c622508b3..3af8cb95b 100755 --- a/src/usr/hwpf/hwp/fapiHwpErrorInfo.xml +++ b/src/usr/hwpf/hwp/fapiHwpErrorInfo.xml @@ -22,7 +22,7 @@ <!-- permissions and limitations under the License. --> <!-- --> <!-- IBM_PROLOG_END_TAG --> -<!-- $Id: fapiHwpErrorInfo.xml,v 1.17 2015-02-02 18:40:42 dcrowell Exp $ --> +<!-- $Id: fapiHwpErrorInfo.xml,v 1.17 2015/02/02 18:40:42 dcrowell Exp $ --> <!-- XML file specifying Test HW Procedure generated errors. --> <hwpErrors> |
