INITPROC: Hostboot - SW230341 - Init updates

Change-Id: I08ec7dff56348c9aacf63b6c41439243ca3a0b93
CQ:SW230341
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/6874
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

6 files changed, 17 insertions, 21 deletions

diff --git a/src/usr/hwpf/hwp/activate_powerbus/proc_build_smp/proc_build_smp_fbc_cd.H b/src/usr/hwpf/hwp/activate_powerbus/proc_build_smp/proc_build_smp_fbc_cd.H
index 0b0eabf26..f157b2865 100644
--- a/src/usr/hwpf/hwp/activate_powerbus/proc_build_smp/proc_build_smp_fbc_cd.H
+++ b/src/usr/hwpf/hwp/activate_powerbus/proc_build_smp/proc_build_smp_fbc_cd.H
@@ -20,7 +20,7 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: proc_build_smp_fbc_cd.H,v 1.9 2013/07/29 20:15:05 jmcgill Exp $
+// $Id: proc_build_smp_fbc_cd.H,v 1.10 2013/08/29 20:41:09 jmcgill Exp $
 // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_build_smp_fbc_cd.H,v $
 //------------------------------------------------------------------------------
 // *|
@@ -335,7 +335,7 @@ const uint8_t  PB_SCONFIG_WE0_FP_I2C_HSHAKE = false;                   // off
 const bool     PB_SCONFIG_WE0_FP_I2C_SPARE_MODE = false;               // spare
 const uint8_t  PB_SCONFIG_WE0_FP_C2I_DONE_LAUNCH = 0x0;                // rc_p1
 const bool     PB_SCONFIG_WE0_FP_C2I_SPARE_MODE = false;               // spare
-const uint32_t PB_SCONFIG_WE0_CPU_RATIO_TABLE_FULL = 0x0D;             // 13
+const uint32_t PB_SCONFIG_WE0_CPU_RATIO_TABLE_FULL = 0x0E;             // 14
 const uint32_t PB_SCONFIG_WE0_CPU_RATIO_TABLE_NOM = 0x12;              // 18
 
 
diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_set_pore_bar.C b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_set_pore_bar.C
index e78029c68..0c78cf414 100644
--- a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_set_pore_bar.C
+++ b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_set_pore_bar.C
@@ -20,8 +20,7 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-
-// $Id: p8_set_pore_bar.C,v 1.5 2013/08/02 19:34:02 stillgs Exp $
+// $Id: p8_set_pore_bar.C,v 1.6 2013/09/04 14:53:16 dcrowell Exp $
 // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_set_pore_bar.C,v $
 //-------------------------------------------------------------------------------
 // *! (C) Copyright International Business Machines Corp. 2011
@@ -117,8 +116,8 @@ const uint32_t  SLW_PBA_SLAVE = 2;
 // Function prototypes
 // ------------------------------------------------------------------------------
 
-fapi::ReturnCode pba_slave_reset(   const fapi::Target& i_target,
-                                    uint32_t id);
+fapi::ReturnCode bar_pba_slave_reset( const fapi::Target& i_target,
+                                      uint32_t id );
 
 // ------------------------------------------------------------------------------
 // Function definitions
@@ -490,7 +489,7 @@ p8_set_pore_bar(      const fapi::Target& i_target,
             // reprogram this slave for IMA writes using special code sequences that
             // restore normal DMA writes after each IMA sequence.
 
-            rc = pba_slave_reset(i_target, SLW_PBA_SLAVE);
+            rc = bar_pba_slave_reset(i_target, SLW_PBA_SLAVE);
             if (rc)
             {
                 FAPI_ERR("PBA Slave Reset failed");
@@ -539,7 +538,7 @@ p8_set_pore_bar(      const fapi::Target& i_target,
 /// \param timeout A value of SsxInterval type.  The special value
 /// SSX_WAIT_FOREVER indicates no timeout.
 ///
-/// This form of pba_slave_reset() gives the caller control over timeouts and
+/// This form of bar_pba_slave_reset() gives the caller control over timeouts and
 /// error handling.
 ///
 /// \retval 0 Succes
@@ -548,7 +547,7 @@ p8_set_pore_bar(      const fapi::Target& i_target,
 /// to reset the slave.
 
 fapi::ReturnCode
-pba_slave_reset(const fapi::Target& i_target, uint32_t id)
+bar_pba_slave_reset(const fapi::Target& i_target, uint32_t id)
 {
 
     uint32_t            poll_count = 0;
diff --git a/src/usr/hwpf/hwp/initfiles/cen.dmi.custom.scom.initfile b/src/usr/hwpf/hwp/initfiles/cen.dmi.custom.scom.initfile
index fc6d657bf..a15860f49 100644
--- a/src/usr/hwpf/hwp/initfiles/cen.dmi.custom.scom.initfile
+++ b/src/usr/hwpf/hwp/initfiles/cen.dmi.custom.scom.initfile
@@ -1,8 +1,9 @@
-#-- $Id: cen.dmi.custom.scom.initfile,v 1.14 2013/09/17 22:29:16 jgrell Exp $
+#-- $Id: cen.dmi.custom.scom.initfile,v 1.15 2013/09/24 20:22:33 jgrell Exp $
 #-- CHANGE HISTORY:
 #--------------------------------------------------------------------------------
 #-- Version:|Author: | Date:  | Comment:
 #-- --------|--------|--------|--------------------------------------------------
+#--     1.15|jgrell  |09/24/13|Changed "1" expression to "any"
 #--     1.13|jgrell  |09/17/13|Added DD2 specific inits
 #--     1.11|jgrell  |09/12/13|Re-added "Override" scoms
 #--     1.10|jgrell  |08/21/13|Removed "Override" scoms
@@ -322,7 +323,6 @@ scom_data;
 
 scom 0x800.0b(rx_rc_step_cntl_pg)(rx_grp0)(lane_na).0x(cn_gcr_addr) {
 bits,                         	scom_data, 	expr;
-#@thi - fix compiler error
 rx_rc_enable_dfe_h1_cal,      	0b0,       	any;  #ATTR_CHIP_EC_FEATURE_RECAL_DFE_ENABLE==0 || ATTR_DMI_DFE_OVERRIDE==1;
 rx_rc_enable_ddc,		0b0,		any;  #ATTR_CHIP_EC_FEATURE_RECAL_DDC_ENABLE==0;
 rx_rc_enable_ctle_cal,		0b0,		any;  #ATTR_CHIP_EC_FEATURE_RECAL_CTLE_ENABLE==0;
diff --git a/src/usr/hwpf/hwp/initfiles/p8.abus.custom.scom.initfile b/src/usr/hwpf/hwp/initfiles/p8.abus.custom.scom.initfile
index 80ef4f1e1..d1eaecabd 100644
--- a/src/usr/hwpf/hwp/initfiles/p8.abus.custom.scom.initfile
+++ b/src/usr/hwpf/hwp/initfiles/p8.abus.custom.scom.initfile
@@ -1,8 +1,9 @@
-#-- $Id: p8.abus.custom.scom.initfile,v 1.7 2013/09/17 22:28:51 jgrell Exp $
+#-- $Id: p8.abus.custom.scom.initfile,v 1.8 2013/09/24 20:20:19 jgrell Exp $
 #-- CHANGE HISTORY:
 #--------------------------------------------------------------------------------
 #-- Version:|Author: | Date:  | Comment:
 #-- --------|--------|--------|--------------------------------------------------
+#--     1.8 |jgrell  |09/24/13|Changed "1" expression to "any"
 #--     1.6 |jgrell  |09/17/13|Added DD2 specific inits
 #--     1.4 |jgrell  |06/18/13|Added Venice specific PRBS tap IDs due to common initfile
 #--     1.3 |thomsen |04/30/13|Added TGT1. to ATTR_CHIP_EC* attribute instances to reference a chip target rather than a chiplet target
@@ -301,7 +302,6 @@ scom 0x800.0b(tx_mode_pg)(tx_grp0)(lane_na).0x(abus_gcr_addr) {
 
 scom 0x800.0b(rx_rc_step_cntl_pg)(rx_grp0)(lane_na).0x(abus_gcr_addr) {
 bits,                         	scom_data, 	expr;
-#@thi - fix compiler error
 rx_rc_enable_dfe_h1_cal,      	0b0,       	any; #temp for DD2 testing. Previously --> TGT1.ATTR_CHIP_EC_FEATURE_RECAL_DFE_ENABLE==0;
 rx_rc_enable_ddc,		0b0,		any; #temp for DD2 testing. Previously --> TGT1.ATTR_CHIP_EC_FEATURE_RECAL_DDC_ENABLE==0;
 rx_rc_enable_ctle_cal,		0b0,		any; #temp for DD2 testing. Previously --> TGT1.ATTR_CHIP_EC_FEATURE_RECAL_CTLE_ENABLE==0;
diff --git a/src/usr/hwpf/hwp/initfiles/p8.abus.scom.initfile b/src/usr/hwpf/hwp/initfiles/p8.abus.scom.initfile
index 5704c7c6e..36f75078a 100644
--- a/src/usr/hwpf/hwp/initfiles/p8.abus.scom.initfile
+++ b/src/usr/hwpf/hwp/initfiles/p8.abus.scom.initfile
@@ -1,4 +1,4 @@
-#-- $Id: p8.abus.scom.initfile,v 1.15 2013/08/21 18:35:16 jgrell Exp $ 
+#-- $Id: p8.abus.scom.initfile,v 1.16 2013/09/24 20:20:35 jgrell Exp $ 
 
 
 ####################################################################
@@ -7,13 +7,14 @@
 ##      Based on SETUP_ID_MODE A_BUS_TR_HW
 ##      from ../../logic/mesa_sim/fusion/run/IODUV_ABUS_WRAP.IODUV_ABUS_WRAP.figdb
 ##
-##   Created on Wed Aug 21 12:18:29 CDT 2013, by jgrell
+##   Created on Tue Sep 24 11:20:21 CDT 2013, by jgrell
 ####################################################################
 
 ## -- CHANGE HISTORY:
  ## --------------------------------------------------------------------------------
  ## -- VersionID: |Author:  | Date:  | Comment:
  ## -- -----------|---------|--------|-------------------------------------------------
+ ## -- jgr13092400| jgr     |09-24-13| Fixed tx_zcal inits scom address
  ## -- jgr13082100| jgr     |08-21-13| Added tx_zcal inits so they can be removed from scan
  ## -- jfg13072400| jfg     |07-24-13| HW253558: change pgooddly to MAX from lab feedback
  ## -- mbs13071200| mbs     |07-12-13| Updates for HW239870 and HW258990
@@ -65,16 +66,12 @@ define def_is_slave  = (prim_id > conn_id);
 
 
 #BUSCTL.BUS_CTL_REGS.TX_IMPCAL_P_4X_PB
-#@thi - hack
-#scom 0x800F1C6008010C3F { 
 scom 0x800F1C0008010C3F { 
 	bits, scom_data, expr;
 	tx_zcal_p_4x, 0b00100, any;
 }
 
 #BUSCTL.BUS_CTL_REGS.TX_IMPCAL_SWO2_PB
-#@thi - hack
-#scom 0x800F2C6008010C3F { 
 scom 0x800F2C0008010C3F { 
 	bits, scom_data, expr;
 	tx_zcal_sm_max_val, 0b1000110, any;
diff --git a/src/usr/hwpf/hwp/initfiles/p8.dmi.custom.scom.initfile b/src/usr/hwpf/hwp/initfiles/p8.dmi.custom.scom.initfile
index cb3b8aeeb..b4bf58914 100644
--- a/src/usr/hwpf/hwp/initfiles/p8.dmi.custom.scom.initfile
+++ b/src/usr/hwpf/hwp/initfiles/p8.dmi.custom.scom.initfile
@@ -1,8 +1,9 @@
-#-- $Id: p8.dmi.custom.scom.initfile,v 1.16 2013/09/17 22:28:51 jgrell Exp $
+#-- $Id: p8.dmi.custom.scom.initfile,v 1.17 2013/09/24 20:20:35 jgrell Exp $
 #-- CHANGE HISTORY:
 #--------------------------------------------------------------------------------
 #-- Version:|Author: | Date:  | Comment:
 #-- --------|--------|--------|--------------------------------------------------
+#--     1.17|jgrell  |09/24/13|Changed "1" expression to "any"
 #--     1.15|jgrell  |09/17/13|Added DD2 specific inits
 #--     1.13|jgrell  |09/12/13|Re-added "Override" settings
 #--     1.9 |thomsen |04/30/13|Added TGT1. to ATTR_CHIP_EC* attribute instances to reference a chip target rather than a chiplet target
@@ -265,7 +266,6 @@ scom 0x800.0b(tx_mode_pg)(tx_grp3)(lane_na).0x(dmi0_gcr_addr) {
 
 scom 0x800.0b(rx_rc_step_cntl_pg)(rx_grp3)(lane_na).0x(dmi0_gcr_addr) {
 bits,                         	scom_data, 	expr;
-#@thi - fix compiler error
 rx_rc_enable_dfe_h1_cal,      	0b0,       	any; #temp for DD2 testing. Previously -->  TGT1.ATTR_CHIP_EC_FEATURE_RECAL_DFE_ENABLE==0 || ATTR_DMI_DFE_OVERRIDE==1;
 rx_rc_enable_ddc,		0b0,		any; #temp for DD2 testing. Previously -->  TGT1.ATTR_CHIP_EC_FEATURE_RECAL_DDC_ENABLE==0;
 rx_rc_enable_ctle_cal,		0b0,		any; #temp for DD2 testing. Previously -->  TGT1.ATTR_CHIP_EC_FEATURE_RECAL_CTLE_ENABLE==0;