diff options
author | Dan Crowell <dcrowell@us.ibm.com> | 2014-04-09 16:15:10 -0500 |
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committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2014-04-11 12:35:50 -0500 |
commit | 8ed0bbc8fd84d620cded20918f84da795dc11c55 (patch) | |
tree | 6aab99ea8e682e51e0ccd7446a4d1f1f47298499 /src/usr/hwpf/hwp | |
parent | 2779d6434bc3cfd948a30c6018e518070edf44f5 (diff) | |
download | talos-hostboot-8ed0bbc8fd84d620cded20918f84da795dc11c55.tar.gz talos-hostboot-8ed0bbc8fd84d620cded20918f84da795dc11c55.zip |
SW256493: INITPROC: Hostboot - p8_pm_pmc_firinit.C v1.20
Change-Id: I3e9f64779dbfbe014c91bf3201101c45c81b3210
CQ:SW256493
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/10323
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/10324
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/hwpf/hwp')
-rw-r--r-- | src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pmc_firinit.C | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pmc_firinit.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pmc_firinit.C index 104cf720a..7f173ceee 100644 --- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pmc_firinit.C +++ b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pmc_firinit.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: p8_pm_pmc_firinit.C,v 1.19 2014/03/06 19:03:25 stillgs Exp $ +// $Id: p8_pm_pmc_firinit.C,v 1.20 2014/04/07 02:55:10 stillgs Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_pmc_firinit.C,v $ //------------------------------------------------------------------------------ // *! (C) Copyright International Business Machines Corp. 2011 @@ -363,11 +363,11 @@ p8_pm_pmc_firinit(const fapi::Target& i_target , uint32_t mode ) e_rc |= pmc_ocb_mask_hi.setBit(PSTATE_INTERCHIP_ERRORFRAME_ERR ); // 8 pstate_interchip_errorframe_err e_rc |= pmc_ocb_mask_hi.setBit(PSTATE_MS_FSM_ERR ); // 9 pstate_ms_fsm_err e_rc |= pmc_ocb_mask_hi.setBit(MS_COMP_PARITY_ERR ); // 10 ms_comp_parity_err - e_rc |= pmc_ocb_mask_hi.setBit(IDLE_PORESW_FATAL_ERR ); // 11 idle_poresw_fatal_err - e_rc |= pmc_ocb_mask_hi.setBit(IDLE_PORESW_STATUS_RC_ERR ); // 12 idle_poresw_status_rc_err - e_rc |= pmc_ocb_mask_hi.setBit(IDLE_PORESW_STATUS_VALUE_ERR ); // 13 idle_poresw_status_value_err - e_rc |= pmc_ocb_mask_hi.setBit(IDLE_PORESW_WRITE_WHILE_INACTIVE_ERR ); // 14 idle_poresw_write_while_inactive_err - e_rc |= pmc_ocb_mask_hi.setBit(IDLE_PORESW_TIMEOUT_ERR ); // 15 idle_poresw_timeout_err +// Left 0 (IDLE_PORESW_FATAL_ERR ); // 11 idle_poresw_fatal_err +// Left 0 (IDLE_PORESW_STATUS_RC_ERR ); // 12 idle_poresw_status_rc_err +// Left 0 (IDLE_PORESW_STATUS_VALUE_ERR ); // 13 idle_poresw_status_value_err +// Left 0 (IDLE_PORESW_WRITE_WHILE_INACTIVE_ERR ); // 14 idle_poresw_write_while_inactive_err +// Left 0 (IDLE_PORESW_TIMEOUT_ERR ); // 15 idle_poresw_timeout_err // Left 0 (IDLE_OCI_MASTER_WRITE_TIMEOUT_ERR ); // 16 idle_oci_master_write_timeout_err e_rc |= pmc_ocb_mask_hi.setBit(IDLE_INTERNAL_ERR ); // 17 idle_internal_err e_rc |= pmc_ocb_mask_hi.setBit(INT_COMP_PARITY_ERR ); // 18 int_comp_parity_err |