diff options
author | Dan Crowell <dcrowell@us.ibm.com> | 2013-01-07 13:34:27 -0600 |
---|---|---|
committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2013-02-08 16:51:17 -0600 |
commit | 0ace043e6f4df6ce20d32524923e732a185853bf (patch) | |
tree | 49abd153d81dc2aa204cc64fed49f6ae243f4487 /src/usr/hwpf/hwp | |
parent | caf328ccd931de4ce4e4d285d1a4e5ddd151abb5 (diff) | |
download | talos-hostboot-0ace043e6f4df6ce20d32524923e732a185853bf.tar.gz talos-hostboot-0ace043e6f4df6ce20d32524923e732a185853bf.zip |
Support for less than 8 threads per core
Modified anywhere that we enable non-master threads to only
touch the threads that we are told to update.
Change-Id: I5b764e51d85a5c663ac76164e9465831ef0c167c
RTC: 48808
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2877
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/hwpf/hwp')
-rw-r--r-- | src/usr/hwpf/hwp/build_winkle_images/build_winkle_images.C | 11 | ||||
-rw-r--r-- | src/usr/hwpf/hwp/core_activate/core_activate.C | 10 | ||||
-rw-r--r-- | src/usr/hwpf/hwp/thread_activate/thread_activate.C | 15 |
3 files changed, 31 insertions, 5 deletions
diff --git a/src/usr/hwpf/hwp/build_winkle_images/build_winkle_images.C b/src/usr/hwpf/hwp/build_winkle_images/build_winkle_images.C index f285bc248..bd63fe764 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/build_winkle_images.C +++ b/src/usr/hwpf/hwp/build_winkle_images/build_winkle_images.C @@ -202,6 +202,11 @@ errlHndl_t applyPoreGenCpuRegs( TARGETING::Target *i_cpuTarget, // and 23.7.3.5 - 6 in Murano Book 4 l_lpcrVal &= ~(0x0000000000002000) ; + TARGETING::Target* sys = NULL; + TARGETING::targetService().getTopLevelTarget(sys); + assert( sys != NULL ); + uint64_t en_threads = sys->getAttr<ATTR_ENABLED_THREADS>(); + uint64_t l_hrmorVal = cpu_spr_value(CPU_SPR_HRMOR); for (TargetHandleList::const_iterator l_coreIds_iter = l_coreIds.begin(); @@ -250,6 +255,12 @@ errlHndl_t applyPoreGenCpuRegs( TARGETING::Target *i_cpuTarget, // fill in lpcr for each thread for ( l_threadId=0; l_threadId < l_cpu_thread_count; l_threadId++ ) { + // Skip threads that we shouldn't be starting + if( !(en_threads & (0x8000000000000000>>l_threadId)) ) + { + continue; + } + TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "applyPoreGenCpuRegs: core=0x%x,thread=0x%x: ", l_coreId, l_threadId ); diff --git a/src/usr/hwpf/hwp/core_activate/core_activate.C b/src/usr/hwpf/hwp/core_activate/core_activate.C index f8ca1608c..6efce283e 100644 --- a/src/usr/hwpf/hwp/core_activate/core_activate.C +++ b/src/usr/hwpf/hwp/core_activate/core_activate.C @@ -265,9 +265,13 @@ void* call_host_activate_slave_cores( void *io_pArgs ) CHIP_UNIT_ATTR l_coreId = (*l_core)->getAttr<TARGETING::ATTR_CHIP_UNIT>(); FABRIC_NODE_ID_ATTR l_logicalNodeId = - l_processor->getAttr<TARGETING::ATTR_FABRIC_NODE_ID>(); + l_processor->getAttr<TARGETING::ATTR_FABRIC_NODE_ID>(); FABRIC_CHIP_ID_ATTR l_chipId = - l_processor->getAttr<TARGETING::ATTR_FABRIC_CHIP_ID>(); + l_processor->getAttr<TARGETING::ATTR_FABRIC_CHIP_ID>(); + TARGETING::Target* sys = NULL; + TARGETING::targetService().getTopLevelTarget(sys); + assert( sys != NULL ); + uint64_t en_threads = sys->getAttr<ATTR_ENABLED_THREADS>(); uint64_t pir = l_coreId << 3; pir |= l_chipId << 7; @@ -278,7 +282,7 @@ void* call_host_activate_slave_cores( void *io_pArgs ) TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_host_activate_slave_cores: Waking %x", pir); - int rc = cpu_start_core(pir); + int rc = cpu_start_core(pir,en_threads); // We purposefully only create one error log here. The only // failure from the kernel is a bad PIR, which means we have diff --git a/src/usr/hwpf/hwp/thread_activate/thread_activate.C b/src/usr/hwpf/hwp/thread_activate/thread_activate.C index 37096abc3..b8b3642e6 100644 --- a/src/usr/hwpf/hwp/thread_activate/thread_activate.C +++ b/src/usr/hwpf/hwp/thread_activate/thread_activate.C @@ -311,8 +311,13 @@ void activate_threads( errlHndl_t& io_rtaskRetErrl ) const fapi::Target l_fapiCore( fapi::TARGET_TYPE_EX_CHIPLET, (const_cast<TARGETING::Target*>(l_masterCore))); - // loop around threads 0-6, SBE starts thread 7 - const uint64_t max_threads = cpu_thread_count(); + // AVPs might enable a subset of the available threads + uint64_t max_threads = cpu_thread_count(); + TARGETING::Target* sys = NULL; + TARGETING::targetService().getTopLevelTarget(sys); + assert( sys != NULL ); + uint64_t en_threads = sys->getAttr<TARGETING::ATTR_ENABLED_THREADS>(); + for( uint64_t thread = 0; thread < max_threads; thread++ ) { // Skip the thread that we're running on @@ -321,6 +326,12 @@ void activate_threads( errlHndl_t& io_rtaskRetErrl ) continue; } + // Skip threads that we shouldn't be starting + if( !(en_threads & (0x8000000000000000>>thread)) ) + { + continue; + } + // send a magic instruction for PHYP Simics to work... MAGIC_INSTRUCTION(MAGIC_SIMICS_CORESTATESAVE); |