SW272038: HWCPLCL dump inject is still generating HWPROC

Change-Id: I2d25cc7539c6c6c6ac0fb066ac69f1282fc2e363
CQ:SW272038
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/12719
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Brian H. Horton <brianh@linux.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

1 files changed, 32 insertions, 1 deletions

diff --git a/src/usr/hwpf/hwp/start_payload/start_payload.C b/src/usr/hwpf/hwp/start_payload/start_payload.C
index 394e19885..9080628fa 100644
--- a/src/usr/hwpf/hwp/start_payload/start_payload.C
+++ b/src/usr/hwpf/hwp/start_payload/start_payload.C
@@ -603,6 +603,37 @@ errlHndl_t callShutdown ( uint64_t i_masterInstance,
 
     do
     {
+        if( i_isMaster == false )
+        {
+
+            // Revert back to standard runtime mode where core checkstops
+            // do not escalate to system checkstops
+            // Workaround for HW286670
+            TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+                    "calling enableCoreCheckstops() in node");
+
+            err = enableCoreCheckstops();
+
+            if ( err )
+            {
+                break;
+            }
+
+            if(is_phyp_load())
+            {
+                TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+                        "calling clearPoreBars() in node");
+
+                //If PHYP then clear out the PORE BARs
+                err = clearPoreBars();
+                if( err )
+                {
+                    break;
+                }
+            }
+
+        }
+
         // Phyp needs us to program all of the I2C masters with the bus
         // divisor
         TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
@@ -986,7 +1017,7 @@ errlHndl_t enableCoreCheckstops()
 
             // Write the runtime version of the Action1 reg
             // Core FIR Action1 Register value from Nick
-            uint64_t action1_reg =  0xFEFC17F7FF9C8A09;
+            uint64_t action1_reg = 0xFEFC17F7FF9C8A09;
             size_t opsize = sizeof(uint64_t);
             l_errl = deviceWrite( l_exTarget,
                         &action1_reg,