SW256701: Tuleta OCC mode changes are causing processor core fails

Change-Id: Ie1dda70c281f4725bb3f41049fe3e3da94865bf3
CQ:SW256701
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/10386
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Tested-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/10388
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

1 files changed, 7 insertions, 1 deletions

diff --git a/src/usr/hwpf/hwp/pstates/pstates/pstate_tables.c b/src/usr/hwpf/hwp/pstates/pstates/pstate_tables.c
index a624c9893..1c84c8319 100755
--- a/src/usr/hwpf/hwp/pstates/pstates/pstate_tables.c
+++ b/src/usr/hwpf/hwp/pstates/pstates/pstate_tables.c
@@ -20,7 +20,7 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: pstate_tables.c,v 1.16 2014/02/20 16:28:06 jimyac Exp $
+// $Id: pstate_tables.c,v 1.17 2014/04/10 21:10:42 stillgs Exp $
 
 /// \file pstate_tables.c
 /// \brief This file contains code used to generate Pstate tables from real or
@@ -574,6 +574,12 @@ gpst_create(GlobalPstateTable *gpst,
             gpst->pstate0_frequency_code[i] = revle16(fNom);
             gpst->dpll_fmax_bias[i] = 0;
         }
+        
+        // Hardcode the vrm delay settings for GA1
+        // This should be set by gpst_stepping_setup() in the future.
+        gpst->pstate_stepsize = pstate_stepsize;
+        gpst->vrm_stepdelay_range = 0x1;
+        gpst->vrm_stepdelay_value = 0xFF;
 
     } while (0);