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authoraalugore <aalugore@us.ibm.com>2015-10-16 15:54:09 -0500
committerA. Patrick Williams III <iawillia@us.ibm.com>2015-10-28 21:14:01 -0500
commit4a4ade353f2a665bc39e6032495f6ed9a9745236 (patch)
treef0c175642f8128c36083255812334031de2f8c15 /src/usr/hwpf/hwp/occ
parent3d02c5bf91e7bd6292c4648e1f58efbdffe8821c (diff)
downloadtalos-hostboot-4a4ade353f2a665bc39e6032495f6ed9a9745236.tar.gz
talos-hostboot-4a4ade353f2a665bc39e6032495f6ed9a9745236.zip
Changes to fix ipl-time checkstop FIR collection
-Fulfill OCC requirement to be aligned on 1MB boundary -Use temporary memory buffer to hold OCC lid -Small change to how Hostboot loads FIR data to SRAM Change-Id: I561ec89c8e04fe9e820e9e2448a2d5cb26423a3a Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21293 Reviewed-by: WILLIAM G. HOFFA <wghoffa@us.ibm.com> Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: Brian H. Horton <brianh@linux.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/hwpf/hwp/occ')
-rw-r--r--src/usr/hwpf/hwp/occ/occ.C15
-rw-r--r--src/usr/hwpf/hwp/occ/occ_common.C84
2 files changed, 73 insertions, 26 deletions
diff --git a/src/usr/hwpf/hwp/occ/occ.C b/src/usr/hwpf/hwp/occ/occ.C
index faa64b3cb..3b2db4596 100644
--- a/src/usr/hwpf/hwp/occ/occ.C
+++ b/src/usr/hwpf/hwp/occ/occ.C
@@ -37,6 +37,7 @@
#include <sys/mm.h>
#include <sys/mmio.h>
#include <vmmconst.h>
+#include <kernel/vmmmgr.H> // INITIAL_MEM_SIZE
// targeting support
#include <targeting/common/commontargeting.H>
@@ -258,9 +259,16 @@ namespace HBOCC
}
else
{
- // malloc space big enough for all of OCC
- homerVirtAddrBase = (void *)malloc(1 * MEGABYTE);
+ // Use page of memory previously set aside for OCC Bootloader
+ // see src/kernel/misc.C::expand_full_cache()
+ homerVirtAddrBase = reinterpret_cast<void*>
+ (VmmManager::INITIAL_MEM_SIZE);
homerPhysAddrBase = mm_virt_to_phys(homerVirtAddrBase);
+
+ TRACUCOMP(g_fapiTd, "Virtual Address = 0x%16lx",
+ homerVirtAddrBase);
+ TRACUCOMP(g_fapiTd, "Physical Address= 0x%16lx",
+ homerPhysAddrBase);
}
#endif
@@ -285,15 +293,12 @@ namespace HBOCC
o_failedOccTarget = masterproc;
TRACFCOMP( g_fapiImpTd, ERR_MRK
"loadnStartAllOccs:primeAndLoadOcc failed");
- free(homerVirtAddrBase);
break;
}
/********* START OCC *************/
l_errl = HBOCC::startOCC (masterproc, NULL, o_failedOccTarget);
- // it either started or errored; either way, free the memory
- free(homerVirtAddrBase);
if (l_errl)
{
diff --git a/src/usr/hwpf/hwp/occ/occ_common.C b/src/usr/hwpf/hwp/occ/occ_common.C
index eb18ecef5..1a88532ca 100644
--- a/src/usr/hwpf/hwp/occ/occ_common.C
+++ b/src/usr/hwpf/hwp/occ/occ_common.C
@@ -35,6 +35,7 @@
#include <sys/misc.h>
#include <sys/mm.h>
#include <sys/mmio.h>
+#include <limits.h>
#include <vmmconst.h>
// targeting support
@@ -60,6 +61,7 @@
#include <p8_pm_init.H>
#include <p8_pm_firinit.H>
#include <p8_pm_prep_for_reset.H>
+#include <arch/ppc.H>
#ifdef CONFIG_ENABLE_CHECKSTOP_ANALYSIS
#include <diag/prdf/prdfWriteHomerFirData.H>
@@ -132,9 +134,14 @@ namespace HBOCC
errlHndl_t l_errl = NULL;
size_t lidSize = 0;
+ void* l_occImage = NULL;
do {
+ // allocate memory big enough for all OCC
+ l_occImage = (void*)malloc(1*MEGABYTE);
+
UtilLidMgr lidMgr(HBOCC::OCC_LIDID);
+ // Get the size of the OCC lid
l_errl = lidMgr.getLidSize(lidSize);
if(l_errl)
{
@@ -144,9 +151,11 @@ namespace HBOCC
break;
}
- // get the full OCC LID and then copy them.
- assert(lidSize <= 1 * MEGABYTE); // malloc() in occ.C
- l_errl = lidMgr.getLid(i_occVirtAddr, lidSize);
+ // Ensure occ lid size is less than memory allocated for it
+ assert(lidSize <= 1*MEGABYTE);
+
+ // Get the entire OCC lid and write it into temporary memory
+ l_errl = lidMgr.getLid(l_occImage, lidSize);
if(l_errl)
{
TRACFCOMP( g_fapiImpTd,
@@ -154,42 +163,66 @@ namespace HBOCC
OCC_LIDID);
break;
}
+ // Pointer to OCC LID
+ char *l_occLid = reinterpret_cast<char*>(l_occImage);
+
+
+ // Get system target in order to access ATTR_NEST_FREQ_MHZ
+ TARGETING::TargetService & tS = TARGETING::targetService();
+ TARGETING::Target * sysTarget = NULL;
+ tS.getTopLevelTarget( sysTarget );
+ assert( sysTarget != NULL );
+
+ // Save Nest Frequency;
+ ATTR_NEST_FREQ_MHZ_type l_nestFreq =
+ sysTarget->getAttr<ATTR_FREQ_PB>();
+
- // OCC Boot Image is now at the start of that L3 region.
size_t l_length = 0; // length of this section
size_t l_startOffset = 0; // offset to start of the section
- size_t l_offsetToLength = 0x48; // offset to length of the section
- char *l_tmpStart = reinterpret_cast<char *>(i_occVirtAddr) +
- l_startOffset;
- uint32_t *ptrToLength = (uint32_t *)(l_tmpStart + l_offsetToLength);
+ // offset to length of the section
+ size_t l_offsetToLength = OCC_OFFSET_LENGTH;
+
+ // Get length of OCC bootloader
+ uint32_t *ptrToLength = (uint32_t *)(l_occLid + l_offsetToLength);
l_length = *ptrToLength;
+ // We only have PAGESIZE to work with so make sure we do not exceed
+ // limit.
+ assert(l_length <= PAGESIZE);
+ // Write the OCC Bootloader into memory
+ memcpy(i_occVirtAddr, l_occImage, l_length);
+
+
// OCC Main Application
l_startOffset = l_length; // after the Boot image
- l_tmpStart = reinterpret_cast<char *>(i_occVirtAddr) +
+ char * l_occMainAppPtr = reinterpret_cast<char *>(l_occLid) +
l_startOffset;
- ptrToLength = (uint32_t *)(l_tmpStart + l_offsetToLength);
+
+ // Get the length of the OCC Main application
+ ptrToLength = (uint32_t *)(l_occMainAppPtr + l_offsetToLength);
l_length = *ptrToLength;
- // write the IPL flag and the nest FREQ for OCC.
+
+ // write the IPL flag and the nest freq into OCC main app.
// IPL_FLAG is a two byte field. OR a 1 into these two bytes.
// FREQ is the 4 byte nest frequency value that goes into
// the same field in the HOMER.
- TARGETING::TargetService & tS = TARGETING::targetService();
- TARGETING::Target * sysTarget = NULL;
- tS.getTopLevelTarget( sysTarget );
- assert( sysTarget != NULL );
uint16_t *ptrToIplFlag =
- (uint16_t *)((char *)l_tmpStart + OCC_OFFSET_IPL_FLAG);
+ (uint16_t *)((char *)l_occMainAppPtr + OCC_OFFSET_IPL_FLAG);
+
uint32_t *ptrToFreq =
- (uint32_t *)((char *)l_tmpStart + OCC_OFFSET_FREQ);
+ (uint32_t *)((char *)l_occMainAppPtr + OCC_OFFSET_FREQ);
+
*ptrToIplFlag |= 0x0001;
- *ptrToFreq = sysTarget->getAttr<ATTR_FREQ_PB>();
+ *ptrToFreq = l_nestFreq;
+ // Store the OCC Main applicatoin into ecmdDataBuffer
+ // so we may write it to SRAM
ecmdDataBufferBase l_occAppData(l_length * 8 /* bits */);
- uint32_t rc = l_occAppData.insert((uint32_t *)l_tmpStart, 0,
+ uint32_t rc = l_occAppData.insert((uint32_t *)l_occMainAppPtr, 0,
l_length * 8 /* bits */);
if (rc)
{
@@ -199,6 +232,7 @@ namespace HBOCC
// create l_errl
break;
}
+ // Write the OCC Main app into SRAM
const uint32_t l_SramAddrApp = OCC_SRAM_ADDRESS;
l_errl = HBOCC::writeSRAM(i_target, l_SramAddrApp, l_occAppData);
if(l_errl)
@@ -208,8 +242,12 @@ namespace HBOCC
break;
}
+
}while(0);
+ //free memory used for OCC lid
+ free(l_occImage);
+
TRACUCOMP( g_fapiTd,
EXIT_MRK"loadOCCImageDuringIpl");
return l_errl;
@@ -315,6 +353,8 @@ namespace HBOCC
uint32_t nestFreq = sysTarget->getAttr<ATTR_FREQ_PB>();
+
+
config_data->version = HBOCC::OccHostDataVersion;
config_data->nestFrequency = nestFreq;
@@ -342,8 +382,10 @@ namespace HBOCC
const uint32_t l_SramAddrFir = OCC_SRAM_FIR_DATA;
ecmdDataBufferBase l_occFirData(OCC_SRAM_FIR_LENGTH * 8 /* bits */);
/// copy config_data in here
- uint32_t rc = l_occFirData.insert((uint32_t *)config_data, 0,
- sizeof(*config_data) * 8 /* bits */);
+ uint32_t rc = l_occFirData.insert(
+ (uint32_t *)config_data->firdataConfig,
+ 0,
+ sizeof(config_data->firdataConfig) * 8 /* bits */);
if (rc)
{
TRACFCOMP( g_fapiImpTd,
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