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authorThi Tran <thi@us.ibm.com>2013-09-12 10:41:02 -0500
committerA. Patrick Williams III <iawillia@us.ibm.com>2013-09-12 14:25:48 -0500
commit7d14631253d5cd41782bc7b58751480b07b8d684 (patch)
tree75632ca755090c461717fffd7ac34693a67313fd /src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pmc_firinit.C
parent7ac1d851fdfe0b247fea4c1e3943811d08221f0a (diff)
downloadtalos-hostboot-7d14631253d5cd41782bc7b58751480b07b8d684.tar.gz
talos-hostboot-7d14631253d5cd41782bc7b58751480b07b8d684.zip
Hostboot - Updated HWPs from defect SW222043 (Power Management Significant)
Change-Id: I2054d8de283fa65fa4aa79b5dce344a726067408 CQ: SW218817 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/6129 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pmc_firinit.C')
-rwxr-xr-xsrc/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pmc_firinit.C36
1 files changed, 35 insertions, 1 deletions
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pmc_firinit.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pmc_firinit.C
index ab9c24044..94cda8525 100755
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pmc_firinit.C
+++ b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pmc_firinit.C
@@ -20,7 +20,7 @@
/* Origin: 30 */
/* */
/* IBM_PROLOG_END_TAG */
-// $Id: p8_pm_pmc_firinit.C,v 1.13 2013/04/12 01:17:27 stillgs Exp $
+// $Id: p8_pm_pmc_firinit.C,v 1.14 2013/08/02 19:19:40 stillgs Exp $
// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_pmc_firinit.C,v $
//------------------------------------------------------------------------------
// *! (C) Copyright International Business Machines Corp. 2011
@@ -150,6 +150,7 @@ p8_pm_pmc_firinit(const fapi::Target& i_target , uint32_t mode )
{
if (mode == PM_RESET)
{
+ FAPI_INF("Hard reset detected. Full PMC LFIR is masked");
e_rc = mask.flushTo0();
e_rc |= mask.setBit(0,PMC_FIR_REGISTER_LENGTH);
if (e_rc)
@@ -168,6 +169,39 @@ p8_pm_pmc_firinit(const fapi::Target& i_target , uint32_t mode )
break;
}
}
+ else if (mode == PM_RESET_SOFT)
+ {
+ FAPI_INF("Soft reset detected. Only non-idle PMC LFIR bits are masked");
+ // Only mask the bits that that do not deal with SLW
+ rc = fapiGetScom(i_target, PMC_LFIR_MASK_0x01010843, mask );
+ if (rc)
+ {
+ FAPI_ERR("fapiGetScom(PMC_LFIR_MASK_0x01010843) failed.");
+ break;
+ }
+
+ // The following is done to keep SIMICS model from complaining about
+ // setting non-implemented bits.
+
+ e_rc |= mask.setBit(0,IDLE_PORESW_FATAL_ERR);
+ e_rc |= mask.setBit(IDLE_INTERNAL_ERR+1,
+ PMC_FIR_REGISTER_LENGTH-IDLE_INTERNAL_ERR);
+ if (e_rc)
+ {
+ rc.setEcmdError(e_rc);
+ break;
+ }
+
+ //--******************************************************************************
+ //-- PMC_FIR_MASK (W0_OR_45) (WR_43) (WO_AND_44)
+ //--******************************************************************************
+ rc = fapiPutScom(i_target, PMC_LFIR_MASK_0x01010843, mask );
+ if (rc)
+ {
+ FAPI_ERR("fapiPutScom(PMC_LFIR_MASK_0x01010843) failed.");
+ break;
+ }
+ }
else
{
e_rc |= fir.flushTo0();
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