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author | Thi Tran <thi@us.ibm.com> | 2014-11-14 13:51:13 -0600 |
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committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2015-01-15 15:36:01 -0600 |
commit | f2f75404fafd6d6e7e52a5b901665165ab61b625 (patch) | |
tree | 4dd50c1145575587b207bb7bc0809b8311fc8688 /src/usr/hwpf/hwp/nest_chiplets | |
parent | 60e36d9749821dc522e1cfd0e164ffd4459a2895 (diff) | |
download | talos-hostboot-f2f75404fafd6d6e7e52a5b901665165ab61b625.tar.gz talos-hostboot-f2f75404fafd6d6e7e52a5b901665165ab61b625.zip |
SW286896: HWP update to complete Naples VPO istep 7
CQ:SW286896
Change-Id: I19823ac32a963d7072d21140b828c30ab326a19f
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/14475
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Tested-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/14492
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/hwpf/hwp/nest_chiplets')
-rw-r--r-- | src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup/proc_a_x_pci_dmi_pll_initf.C | 20 |
1 files changed, 14 insertions, 6 deletions
diff --git a/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup/proc_a_x_pci_dmi_pll_initf.C b/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup/proc_a_x_pci_dmi_pll_initf.C index 8aff18350..a9f176c91 100644 --- a/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup/proc_a_x_pci_dmi_pll_initf.C +++ b/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup/proc_a_x_pci_dmi_pll_initf.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2012,2014 */ +/* Contributors Listed Below - COPYRIGHT 2012,2015 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -22,7 +22,7 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: proc_a_x_pci_dmi_pll_initf.C,v 1.16 2014/01/07 14:43:23 mfred Exp $ +// $Id: proc_a_x_pci_dmi_pll_initf.C,v 1.19 2014/12/02 00:17:23 szhong Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_a_x_pci_dmi_pll_initf.C,v $ //------------------------------------------------------------------------------ // *| @@ -87,10 +87,9 @@ fapi::ReturnCode proc_a_x_pci_dmi_pll_initf(const fapi::Target & i_target, uint8_t is_simulation; uint8_t lctank_pll_vco_workaround = 0; uint32_t ring_length = 0; - uint8_t attrABRingData[80] ={0}; // Set to 80 bytes to match length in XML file, not actual scan ring length. - uint8_t attrDMIRingData[231]={0}; // Set to 231 bytes to match length in XML file, not actual scan ring length. - uint8_t attrPCIRingData[80] ={0}; // Set to 80 bytes to match length in XML file, not actual scan ring length. - + fapi::ATTR_PROC_AB_BNDY_PLL_DATA_Type attrABRingData={0}; + fapi::ATTR_PROC_PB_BNDY_DMIPLL_DATA_Type attrDMIRingData={0}; + fapi::ATTR_PROC_PCI_BNDY_PLL_DATA_Type attrPCIRingData={0}; // return codes uint32_t rc_ecmd = 0; fapi::ReturnCode rc; @@ -419,6 +418,15 @@ fapi::ReturnCode proc_a_x_pci_dmi_pll_initf(const fapi::Target & i_target, This section is automatically updated by CVS when you check in this file. Be sure to create CVS comments when you commit so that they can be included here. $Log: proc_a_x_pci_dmi_pll_initf.C,v $ +Revision 1.19 2014/12/02 00:17:23 szhong +remove hardcoded bndy pll length in code + +Revision 1.18 2014/11/13 20:17:22 szhong +adjust pb_bndy_dmi_pll length to 240 + +Revision 1.17 2014/11/11 22:10:35 szhong +increased attribute data length to support Naples + Revision 1.16 2014/01/07 14:43:23 mfred Checking in updates from Andrea Ma: Include statements fixed and one fapi dbg statement changed. |