diff options
author | Thi Tran <thi@us.ibm.com> | 2014-08-20 08:24:05 -0500 |
---|---|---|
committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2014-08-20 10:39:59 -0500 |
commit | bc64b357273dba1d79aa6e6fa2b5227fd80aefa1 (patch) | |
tree | cd271369d51f25b9279bdd11fc2b5670a1228fb2 /src/usr/hwpf/hwp/nest_chiplets | |
parent | 98eb8b3e16e77475458db5ae92b5c296d7fabfcc (diff) | |
download | talos-hostboot-bc64b357273dba1d79aa6e6fa2b5227fd80aefa1.tar.gz talos-hostboot-bc64b357273dba1d79aa6e6fa2b5227fd80aefa1.zip |
Disable PCIE PLL unmask in proc_a_x_pci_dmi_pll_setup
Change-Id: I0d487522a7a29dfe145acc33ecd5559e32610465
CQ:SW274072
Backport: release-fips820
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/12897
Tested-by: Jenkins Server
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/hwpf/hwp/nest_chiplets')
-rw-r--r-- | src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup/proc_a_x_pci_dmi_pll_setup.C | 19 |
1 files changed, 11 insertions, 8 deletions
diff --git a/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup/proc_a_x_pci_dmi_pll_setup.C b/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup/proc_a_x_pci_dmi_pll_setup.C index adda180bc..d5bda7b7f 100644 --- a/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup/proc_a_x_pci_dmi_pll_setup.C +++ b/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup/proc_a_x_pci_dmi_pll_setup.C @@ -327,14 +327,17 @@ fapi::ReturnCode proc_a_x_pci_dmi_pll_setup_unmask_lock(const fapi::Target & i_t break; } - rc = proc_a_x_pci_dmi_pll_setup_unmask_lock( - i_target, - PCIE_CHIPLET_0x09000000); - if (!rc.ok()) - { - FAPI_ERR("Error from proc_a_x_pci_dmi_pll_setup_unmask_lock"); - break; - } +// TODO: Temporary workaround for SW274072 and SW273877 in order to release 820 driver. +// HW team is investigating. Also, refer to SW255565 for more info. +// +// rc = proc_a_x_pci_dmi_pll_setup_unmask_lock( +// i_target, +// PCIE_CHIPLET_0x09000000); +// if (!rc.ok()) +// { +// FAPI_ERR("Error from proc_a_x_pci_dmi_pll_setup_unmask_lock"); +// break; +// } FAPI_INF("Done setting up PCIE PLL. "); |