PON - Proc HW procedure update

Change-Id: I7168e7b02d9c7795ad16b76027e8a46edf24b161
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2984
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

14 files changed, 1043 insertions, 417 deletions

diff --git a/src/usr/hwpf/hwp/nest_chiplets/makefile b/src/usr/hwpf/hwp/nest_chiplets/makefile
index b7c2982ac..b9b826bce 100644
--- a/src/usr/hwpf/hwp/nest_chiplets/makefile
+++ b/src/usr/hwpf/hwp/nest_chiplets/makefile
@@ -1,25 +1,25 @@
-#   IBM_PROLOG_BEGIN_TAG
-#  This is an automatically generated prolog.
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
 #
-#  $Source: src/usr/hwpf/hwp/nest_chiplets/makefile $
+# $Source: src/usr/hwpf/hwp/nest_chiplets/makefile $
 #
-#  IBM CONFIDENTIAL
+# IBM CONFIDENTIAL
 #
-#  COPYRIGHT International Business Machines Corp. 2012
+# COPYRIGHT International Business Machines Corp. 2012,2013
 #
-#  p1
+# p1
 #
-#  Object Code Only (OCO) source materials
-#  Licensed Internal Code Source Materials
-#  IBM HostBoot Licensed Internal Code
+# Object Code Only (OCO) source materials
+# Licensed Internal Code Source Materials
+# IBM HostBoot Licensed Internal Code
 #
-#  The source code for this program is not published or other-
-#  wise divested of its trade secrets, irrespective of what has
-#  been deposited with the U.S. Copyright Office.
+# The source code for this program is not published or otherwise
+# divested of its trade secrets, irrespective of what has been
+# deposited with the U.S. Copyright Office.
 #
-#  Origin: 30
+# Origin: 30
 #
-#  IBM_PROLOG_END_TAG
+# IBM_PROLOG_END_TAG
 ROOTPATH = ../../../../..
 
 MODULE = nest_chiplets
@@ -49,7 +49,9 @@ OBJS =  nest_chiplets.o \
         proc_scomoverride_chiplets.o \
         proc_a_x_pci_dmi_pll_initf.o \
         proc_a_x_pci_dmi_pll_setup.o \
-        proc_pcie_scominit.o
+        proc_pcie_scominit.o \
+        proc_abus_scominit.o \
+        proc_xbus_scominit.o
         
 ##  NOTE: add a new directory onto the vpaths when you add a new HWP
 VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/nest_chiplets/proc_start_clocks_chiplets
diff --git a/src/usr/hwpf/hwp/nest_chiplets/nest_chiplets.C b/src/usr/hwpf/hwp/nest_chiplets/nest_chiplets.C
index 16a00927f..5c62d9cca 100644
--- a/src/usr/hwpf/hwp/nest_chiplets/nest_chiplets.C
+++ b/src/usr/hwpf/hwp/nest_chiplets/nest_chiplets.C
@@ -69,6 +69,8 @@
 #include    "nest_chiplets.H"
 #include    "proc_start_clocks_chiplets/proc_start_clocks_chiplets.H"
 #include    "proc_chiplet_scominit/proc_chiplet_scominit.H"
+#include    "proc_chiplet_scominit/proc_xbus_scominit.H"
+#include    "proc_chiplet_scominit/proc_abus_scominit.H"
 #include    "proc_scomoverride_chiplets/proc_scomoverride_chiplets.H"
 #include    "proc_a_x_pci_dmi_pll_setup/proc_a_x_pci_dmi_pll_setup.H"
 #include    "proc_a_x_pci_dmi_pll_setup/proc_a_x_pci_dmi_pll_initf.H"
@@ -467,7 +469,6 @@ void*    call_proc_chiplet_scominit( void    *io_pArgs )
 
     TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_proc_chiplet_scominit entry" );
 
-    uint8_t l_cpuNum = 0;
     TARGETING::TargetHandleList l_cpuTargetList;
     getAllChips(l_cpuTargetList, TYPE_PROC);
 
@@ -523,14 +524,26 @@ void*    call_proc_chiplet_scominit( void    *io_pArgs )
             }
         }
 
-        // ----------------------------------------------
-        // Execute PROC_CHIPLET_ABUS/XBUS initfiles
-        // Note: the order is intentional to make
-        // HB and Cronus trace in the same order.
-        // Please do not change
-        // ----------------------------------------------
+    } while (0);
 
-        // Do XBUS first, get all XBUS connections
+    return l_StepError.getErrorHandle();
+}
+//*****************************************************************************
+// wrapper function to call proc_xbus_scominit
+//******************************************************************************
+void* call_proc_xbus_scominit( void    *io_pArgs )
+{
+    errlHndl_t l_err = NULL;
+    fapi::ReturnCode rc;
+    IStepError l_StepError;
+
+    TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_proc_xbus_scominit entry" );
+
+    TARGETING::TargetHandleList l_cpuTargetList;
+    getAllChips(l_cpuTargetList, TYPE_PROC);
+
+    do
+    {
         EDI_EI_INITIALIZATION::TargetPairs_t l_XbusConnections;
         l_err =
         EDI_EI_INITIALIZATION::PbusLinkSvc::getTheInstance().getPbusConnections(
@@ -555,17 +568,14 @@ void*    call_proc_chiplet_scominit( void    *io_pArgs )
             break;
         }
 
-
-        // Loop thru the proc
-        for ( l_cpuNum=0; l_cpuNum < l_cpuTargetList.size(); l_cpuNum++ )
+        for (TARGETING::TargetHandleList::iterator l_cpuIter =
+             l_cpuTargetList.begin(); l_cpuIter != l_cpuTargetList.end();
+             ++l_cpuIter)
         {
-            const TARGETING::Target* l_cpuTarget = l_cpuTargetList[l_cpuNum];
+            const TARGETING::Target* l_cpu_target = *l_cpuIter;
 
-            // ----------------------------------------------
-            // Execute PROC_CHIPLET_XBUS initfiles
-            // ----------------------------------------------
             TARGETING::TargetHandleList l_xbusList;
-            getChildChiplets( l_xbusList, l_cpuTarget, TYPE_XBUS );
+            getChildChiplets( l_xbusList, l_cpu_target, TYPE_XBUS );
 
             // For each XBUS unit in this proc
             for (size_t jj = 0; jj < l_xbusList.size(); jj++)
@@ -595,7 +605,7 @@ void*    call_proc_chiplet_scominit( void    *io_pArgs )
                        TARGET_TYPE_PROC_CHIP,
                        reinterpret_cast<void *>
                        (const_cast<TARGETING::Target*>(
-                               l_cpuTarget)));
+                               l_cpu_target)));
                 targets.push_back(l_fapi_this_cpu_target);
 
                 const fapi::Target l_fapi_other_cpu_target(
@@ -605,49 +615,75 @@ void*    call_proc_chiplet_scominit( void    *io_pArgs )
                                l_pParent)));
                 targets.push_back(l_fapi_other_cpu_target);
 
-                // execute PROC_CHIPLET_XBUS_IF initfile
-                FAPI_INF("proc_chiplet_scominit: Executing %s on...",
-                    PROC_CHIPLET_XBUS_IF);
+                // Call HW procedure
+                TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "Running proc_xbus_scominit HWP on..." );
                 EntityPath l_path = l_xbusTarget->getAttr<ATTR_PHYS_PATH>();
                 l_path.dump();
-                l_path = l_cpuTarget->getAttr<ATTR_PHYS_PATH>();
+                l_path = l_cpu_target->getAttr<ATTR_PHYS_PATH>();
                 l_path.dump();
                 l_path = l_pParent->getAttr<ATTR_PHYS_PATH>();
                 l_path.dump();
 
-                FAPI_EXEC_HWP(rc,
-                              fapiHwpExecInitFile,
-                              targets,
-                              PROC_CHIPLET_XBUS_IF);
-
-                l_err = fapi::fapiRcToErrl(rc);
+                FAPI_INVOKE_HWP(l_err, proc_xbus_scominit,
+                                l_fapi_xbus_target,
+                                l_fapi_this_cpu_target,
+                                l_fapi_other_cpu_target);
                 if (l_err)
                 {
-                    TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
-                              "proc_chiplet_scominit: Error from fapiHwpExecInitfile executing %s",
-                              PROC_CHIPLET_XBUS_IF);
-
-                    l_StepError.addErrorDetails(
-                               ISTEP_PROC_XBUS_IF_EXECUTION_FAILED,
-                               ISTEP_PROC_CHIPLET_SCOMINIT,
-                               l_err);
-
-                    // We want to continue to the next link instead of exiting,
+                    TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, "ERROR 0x%.8X : "
+                    "proc_xbus_scominit HWP returns error.  XBUS target 0x%.8X, "
+                    "This CPU target 0x%.8X, Other CPU target 0x%.8X",
+                    l_err->reasonCode(), TARGETING::get_huid(l_xbusTarget),
+                    TARGETING::get_huid(l_cpu_target),
+                    TARGETING::get_huid(l_pParent));
+                    ErrlUserDetailsTarget myDetails(l_xbusTarget);
+                    /*@
+                     * @errortype
+                     * @reasoncode       ISTEP_PROC_XBUS_SCOMINIT_FAILED
+                     * @severity         ERRORLOG::ERRL_SEV_UNRECOVERABLE
+                     * @moduleid         ISTEP_PROC_XBUS_SCOMINIT
+                     * @userdata1        bytes 0-1: plid identifying first error
+                     *                   bytes 2-3: reason code of first error
+                     * @userdata2        bytes 0-1: total number of elogs included
+                     *                   bytes 2-3: N/A
+                     * @devdesc          call to proc_xbus_scominit has failed
+                     */
+                    l_StepError.addErrorDetails(ISTEP_PROC_XBUS_SCOMINIT_FAILED,
+                                                ISTEP_PROC_XBUS_SCOMINIT,
+                                                l_err );
+                    // We want to continue to the next target instead of exiting,
                     // Commit the error log and move on
-                    // Log should be deleted and set to NULL in errlCommit.
+                    // Note: Error log should already be deleted and set to NULL
+                    // after committing
                     errlCommit(l_err, HWPF_COMP_ID);
                 }
 
             }  // End xbus loop
 
+        } // End cpu loop
+
+    } while (0);
+
+    return l_StepError.getErrorHandle();
+}
+
+//*****************************************************************************
+// wrapper function to call proc_abus_scominit
+//******************************************************************************
+void* call_proc_abus_scominit( void    *io_pArgs )
+{
+
+    errlHndl_t l_err = NULL;
+    fapi::ReturnCode rc;
+    IStepError l_StepError;
 
-        } // End cpunum loop
+    TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_proc_abus_scominit entry" );
 
-        // Note: all error logs exist above must have been committed.
-        // We want to move on to the ABUS training.  The usage of l_err
-        // again below should not cause mem leakage.
+    TARGETING::TargetHandleList l_cpuTargetList;
+    getAllChips(l_cpuTargetList, TYPE_PROC);
 
-        // Now do ABUS, get all ABUS connections
+    do
+    {
         EDI_EI_INITIALIZATION::TargetPairs_t l_AbusConnections;
         l_err =
         EDI_EI_INITIALIZATION::PbusLinkSvc::getTheInstance().getPbusConnections(
@@ -673,12 +709,15 @@ void*    call_proc_chiplet_scominit( void    *io_pArgs )
         }
 
         // Loop thru the proc
-        for ( l_cpuNum=0; l_cpuNum < l_cpuTargetList.size(); l_cpuNum++ )
+        for (TARGETING::TargetHandleList::iterator l_cpuIter =
+             l_cpuTargetList.begin(); l_cpuIter != l_cpuTargetList.end();
+             ++l_cpuIter)
         {
-            const TARGETING::Target* l_cpuTarget = l_cpuTargetList[l_cpuNum];
+            const TARGETING::Target* l_cpu_target = *l_cpuIter;
+
             // Get the ABUS under this proc
             TARGETING::TargetHandleList l_abusList;
-            getChildChiplets( l_abusList, l_cpuTarget, TYPE_ABUS );
+            getChildChiplets( l_abusList, l_cpu_target, TYPE_ABUS );
 
             // For each ABUS unit in this proc
             for (size_t ii = 0; ii < l_abusList.size(); ii++)
@@ -708,7 +747,7 @@ void*    call_proc_chiplet_scominit( void    *io_pArgs )
                        TARGET_TYPE_PROC_CHIP,
                        reinterpret_cast<void *>
                        (const_cast<TARGETING::Target*>(
-                               l_cpuTarget)));
+                               l_cpu_target)));
                 targets.push_back(l_fapi_this_cpu_target);
 
                 const fapi::Target l_fapi_other_cpu_target(
@@ -718,76 +757,57 @@ void*    call_proc_chiplet_scominit( void    *io_pArgs )
                                l_pParent)));
                 targets.push_back(l_fapi_other_cpu_target);
 
-                // execute PROC_CHIPLET_ABUS_IF initfile
-                FAPI_INF("proc_chiplet_scominit: Executing %s on...",
-                    PROC_CHIPLET_ABUS_IF);
+                // Call HW procedure
+                TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "Running proc_abus_scominit HWP on..." );
                 EntityPath l_path = l_abusTarget->getAttr<ATTR_PHYS_PATH>();
                 l_path.dump();
-                l_path = l_cpuTarget->getAttr<ATTR_PHYS_PATH>();
+                l_path = l_cpu_target->getAttr<ATTR_PHYS_PATH>();
                 l_path.dump();
                 l_path = l_pParent->getAttr<ATTR_PHYS_PATH>();
                 l_path.dump();
 
-                FAPI_EXEC_HWP(rc,
-                              fapiHwpExecInitFile,
-                              targets,
-                              PROC_CHIPLET_ABUS_IF);
-                l_err = fapi::fapiRcToErrl(rc);
+                FAPI_INVOKE_HWP(l_err, proc_abus_scominit,
+                                l_fapi_abus_target,
+                                l_fapi_this_cpu_target,
+                                l_fapi_other_cpu_target);
                 if (l_err)
                 {
-                    TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
-                              "proc_chiplet_scominit: Error from fapiHwpExecInitfile executing %s",
-                              PROC_CHIPLET_ABUS_IF);
-
-                    l_StepError.addErrorDetails(
-                               ISTEP_PROC_ABUS_IF_EXECUTION_FAILED,
-                               ISTEP_PROC_CHIPLET_SCOMINIT,
-                               l_err);
-
-                    // We want to continue to the next link instead of exiting,
+                    TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, "ERROR 0x%.8X : "
+                    "proc_abus_scominit HWP returns error.  ABUS target 0x%.8X, "
+                    "This CPU target 0x%.8X, Other CPU target 0x%.8X",
+                    l_err->reasonCode(), TARGETING::get_huid(l_abusTarget),
+                    TARGETING::get_huid(l_cpu_target),
+                    TARGETING::get_huid(l_pParent));
+                    ErrlUserDetailsTarget myDetails(l_abusTarget);
+                    /*@
+                     * @errortype
+                     * @reasoncode       ISTEP_PROC_ABUS_SCOMINIT_FAILED
+                     * @severity         ERRORLOG::ERRL_SEV_UNRECOVERABLE
+                     * @moduleid         ISTEP_PROC_ABUS_SCOMINIT
+                     * @userdata1        bytes 0-1: plid identifying first error
+                     *                   bytes 2-3: reason code of first error
+                     * @userdata2        bytes 0-1: total number of elogs included
+                     *                   bytes 2-3: N/A
+                     * @devdesc          call to proc_abus_scominit has failed
+                     */
+                    l_StepError.addErrorDetails(ISTEP_PROC_ABUS_SCOMINIT_FAILED,
+                                                ISTEP_PROC_ABUS_SCOMINIT,
+                                                l_err );
+                    // We want to continue to the next target instead of exiting,
                     // Commit the error log and move on
-                    // Log should be deleted and set to NULL in errlCommit.
+                    // Note: Error log should already be deleted and set to NULL
+                    // after committing
                     errlCommit(l_err, HWPF_COMP_ID);
                 }
-            } // End abus list loop
 
-        } // End cpunum loop
+            } // End abus list loop
 
+        } // End cpu loop
 
     } while (0);
 
     return l_StepError.getErrorHandle();
-}
-//*****************************************************************************
-// wrapper function to call proc_xbus_scominit
-//******************************************************************************
-void*    call_proc_xbus_scominit( void    *io_pArgs )
-{
-    TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, 
-               "call_proc_xbus_scominit entry" );
-
-    // call proc_xbus_scominit.C
-
-    TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, 
-               "call_proc_xbus_scominit exit" );
-
-    return NULL;
-}
-
-//*****************************************************************************
-// wrapper function to call proc_abus_scominit
-//******************************************************************************
-void*    call_proc_abus_scominit( void    *io_pArgs )
-{
-    TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, 
-               "call_proc_abus_scominit entry" );
-
-    // call proc_abus_scominit.C
-    //
-    TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, 
-               "call_proc_abus_scominit exit" );
 
-    return NULL;
 }
 
 
diff --git a/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup/proc_a_x_pci_dmi_pll_initf.C b/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup/proc_a_x_pci_dmi_pll_initf.C
index bf78cd3cf..a50fb1382 100644
--- a/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup/proc_a_x_pci_dmi_pll_initf.C
+++ b/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup/proc_a_x_pci_dmi_pll_initf.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* IBM CONFIDENTIAL                                                       */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2012                   */
+/* COPYRIGHT International Business Machines Corp. 2012,2013              */
 /*                                                                        */
 /* p1                                                                     */
 /*                                                                        */
@@ -21,7 +21,7 @@
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
 // -*- mode: C++; c-file-style: "linux";  -*-
-// $Id: proc_a_x_pci_dmi_pll_initf.C,v 1.4 2012/08/27 15:29:03 mfred Exp $
+// $Id: proc_a_x_pci_dmi_pll_initf.C,v 1.9 2013/01/20 19:21:03 jmcgill Exp $
 // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_a_x_pci_dmi_pll_initf.C,v $
 //------------------------------------------------------------------------------
 // *|
@@ -51,10 +51,6 @@
 #include "proc_a_x_pci_dmi_pll_initf.H"
 #include <fapi.H>
 
-#define RING_LENGTH_AB_BNDY_PLL      536
-#define RING_LENGTH_PB_BNDY_DMIPLL  1234
-#define RING_LENGTH_PCI_BNDY_PLL     565
-
 using namespace fapi;
 
 
@@ -68,43 +64,6 @@ const uint64_t OPCG_REG2_FOR_SETPULSE  = 0x0000000000002000ull;
 const uint64_t OPCG_REG3_FOR_SETPULSE  = 0x6000000000000000ull;
 const uint64_t CLK_REGION_FOR_SETPULSE = 0x0010040000000000ull;
 
-// PLL Settings for simulation from Johannes Koesters  20 July 2012
-// TPFLEX.PLLNESTFLT.PLLCTL.C_PLL_CNTRL_LEAF		= x"13C54402001C000B 0008000000000000 00"
-// TPFLEX.PLLEMFLT.PLLCTL.C_PLL_CNTRL_LEAF 		= x"13C54402001C000B 0008000000000000 00"
-// TPFLEX.PLLXB.PLLCTL.C_PLL_CNTRL_LEAF			= x"174B1402001C0009 0008000000000000 00"
-// TPFLEX.PLLNEST.PLLCTL.C_PLL_CNTRL_LEAF		= x"10CB1402001C0009 0008000000000000 00"
-// IOMC1.TX_WRAP.PLL_MCIO.CWRAP.PLLCTL.C_PLL_CNTRL_LEAF	= x"10CB1402001C0009 0008000000000000 00"
-// ABUS.TX_WRAP.PLL_A.CWRAP.PLLCTL.C_PLL_CNTRL_LEAF	= x"1F4CB402000C0009 0008000000000000 00"
-// TPFLEX.PLLPCIE.PLLCTL.C_PLL_CNTRL_LEAF		= x"128000000A0060DB B000000200000000 00"
-
-
-// Settings for A Bus PLL  //
-// const uint64_t ABUS_PLL_CONFIG_RING_CNTRL0         = 0x0745D402001C000Bull;     version 06/22/12
-const uint64_t ABUS_PLL_CONFIG_RING_CNTRL0            = 0x10C5D402000C0008ull;
-const uint64_t ABUS_PLL_CONFIG_RING_CNTRL1            = 0x0008000000000000ull;
-const uint8_t  ABUS_PLL_CONFIG_RING_CNTRL2            = 0x00;
-const uint64_t ABUS_PLL_CONFIG_RING_CNTRL0_FOR_SIM    = 0x10C5D402001C0009ull;    // TODO turn fastlock bit (63) OFF when new PLL model is available.
-const uint64_t ABUS_PLL_CONFIG_RING_CNTRL1_FOR_SIM    = 0x0008000000000000ull;
-const uint8_t  ABUS_PLL_CONFIG_RING_CNTRL2_FOR_SIM    = 0x00;
-
-// Settings for DMI PLLs  //
-// const uint64_t DMI_PLL_CONFIG_RING_CNTRL0          = 0x074B1402001C000Bull;     version 06/22/12
-const uint64_t DMI_PLL_CONFIG_RING_CNTRL0             = 0x10CB1402001C0008ull;
-const uint64_t DMI_PLL_CONFIG_RING_CNTRL1             = 0x0008000000000000ull;
-const uint8_t  DMI_PLL_CONFIG_RING_CNTRL2             = 0x00;
-const uint64_t DMI_PLL_CONFIG_RING_CNTRL0_FOR_SIM     = 0x10CB1402000C0009ull;    // TODO turn fastlock bit (63) OFF when new PLL model is available.
-const uint64_t DMI_PLL_CONFIG_RING_CNTRL1_FOR_SIM     = 0x0008000000000000ull;
-const uint8_t  DMI_PLL_CONFIG_RING_CNTRL2_FOR_SIM     = 0x00;
-
-// Settings for PCIE PLL  //
-const uint64_t PCIE_PLL_CONFIG_RING_CNTRL0            = 0x128000000A00789Aull;
-const uint64_t PCIE_PLL_CONFIG_RING_CNTRL1            = 0xA000000000000000ull;
-const uint8_t  PCIE_PLL_CONFIG_RING_CNTRL2            = 0x00;
-const uint64_t PCIE_PLL_CONFIG_RING_CNTRL0_FOR_SIM    = 0x128000000A0010DBull;
-const uint64_t PCIE_PLL_CONFIG_RING_CNTRL1_FOR_SIM    = 0xB000000200000000ull;
-const uint8_t  PCIE_PLL_CONFIG_RING_CNTRL2_FOR_SIM    = 0x00;
-
-
 
 
 //------------------------------------------------------------------------------
@@ -133,16 +92,18 @@ extern "C"
     {
         // data buffer to hold register values
         ecmdDataBufferBase scom_data(64);
-        ecmdDataBufferBase rxpll_data(47);
-        ecmdDataBufferBase pll_data(136);
         ecmdDataBufferBase ring_data;
+        uint8_t            pcie_enable_attr;
+        uint8_t            abus_enable_attr;
+        uint32_t           ring_length     = 0;
+        uint8_t            attrABRingData[80]  ={0};  // Set to 80 bytes to match length in XML file, not actual scan ring length.
+        uint8_t            attrDMIRingData[192]={0};  // Set to 192 bytes to match length in XML file, not actual scan ring length.
+        uint8_t            attrPCIRingData[80] ={0};  // Set to 80 bytes to match length in XML file, not actual scan ring length.
 
         // return codes
         uint32_t rc_ecmd = 0;
         fapi::ReturnCode rc;
 
-        // locals
-        uint8_t         is_simulation = 0;
 
 
         // mark function entry
@@ -154,30 +115,17 @@ extern "C"
         do
         {
 
-            //---------------------------//
-            // Common code for all PLLs  //
-            //---------------------------//
-            // Read the ATTR_IS_SIMULATION attribute
-            rc = FAPI_ATTR_GET( ATTR_IS_SIMULATION, NULL, is_simulation);
-            if (rc)
-            {
-                FAPI_ERR("Failed to get attribute: ATTR_IS_SIMULATION.");
-                break;
-            }
-
-
-
             //------------//
             // X Bus PLL  //
             //------------//
             if (!i_startX)
             {
-                FAPI_DBG("X BUS PLL not selected for setup in this routine.\n");
+                FAPI_DBG("X BUS PLL not selected for setup in this routine.");
             }
             else
             {
-                FAPI_INF("This routine does not do X-BUS PLL setup at this time!.\n");
-                FAPI_INF("It is assumed that the X-BUS PLL is already set up in synchronous mode for use with the NEST logic.\n");
+                FAPI_INF("This routine does not do X-BUS PLL setup at this time!.");
+                FAPI_INF("It is assumed that the X-BUS PLL is already set up in synchronous mode for use with the NEST logic.");
             }
             // end X-bus PLL setup
 
@@ -187,85 +135,67 @@ extern "C"
             //------------//
             // A Bus PLL  //
             //------------//
+
+            // query ABUS partial good attribute
+            rc = FAPI_ATTR_GET(ATTR_PROC_A_ENABLE,
+                               &i_target,
+                               abus_enable_attr);
+            if (!rc.ok())
+            {
+                FAPI_ERR("Error querying ATTR_PROC_A_ENABLE");
+                break;
+            }
+
             if (!i_startA)
             {
-                FAPI_DBG("A BUS PLL not selected for setup in this routine.\n");
+                FAPI_DBG("A BUS PLL not selected for setup in this routine.");
+            }
+            else if (abus_enable_attr != fapi::ENUM_ATTR_PROC_A_ENABLE_ENABLE)
+            {
+                FAPI_DBG("A BUS PLL setup skipped (partial good).");
             }
             else
             {
-                FAPI_DBG("Loading the config bits into A BUS PLL\n");
-                if (is_simulation)
-                {
-                    rc_ecmd |= pll_data.setDoubleWord( 0, ABUS_PLL_CONFIG_RING_CNTRL0_FOR_SIM);
-                    rc_ecmd |= pll_data.setDoubleWord( 1, ABUS_PLL_CONFIG_RING_CNTRL1_FOR_SIM);
-                    rc_ecmd |= pll_data.setByte(      16, ABUS_PLL_CONFIG_RING_CNTRL2_FOR_SIM);
-                }
-                else
-                {
-                    rc_ecmd |= pll_data.setDoubleWord( 0, ABUS_PLL_CONFIG_RING_CNTRL0);
-                    rc_ecmd |= pll_data.setDoubleWord( 1, ABUS_PLL_CONFIG_RING_CNTRL1);
-                    rc_ecmd |= pll_data.setByte(      16, ABUS_PLL_CONFIG_RING_CNTRL2);
-                }
-                if (rc_ecmd)
-                {
-                    FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", rc_ecmd);
-                    rc.setEcmdError(rc_ecmd);
-                    break;
-                }
-                // Set bit 17 of the controller for the ABus Cleanup PLLs
-                rc_ecmd |= rxpll_data.flushTo0();
-                rc_ecmd |= rxpll_data.setBit(17);
-                if(rc_ecmd)
-                {
-                    FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", rc_ecmd);
-                    rc.setEcmdError(rc_ecmd);
-                    break;
-                }
-
-
+                FAPI_DBG("Loading the config bits into A BUS PLL");
 
                 //---------------------------------------------------------------------------
-                //  Scan out the original contents from ring and modify it with new settings.
+                //  Get ring data from cronus attribute and put it into eCmdDataBufferBase
                 //---------------------------------------------------------------------------
-                FAPI_DBG("Loading PLL settings into scan ring ab_bndy_pll for A-Bus PLL.");
-
-                // The scan chain that we need to modify is:  Name = ab_bndy_pll  Address = {0x08030088}
-                // This chain is 536 bits long.
-                // RX2 clean up PLL control bits (47) go into positions  58 - 104
-                // RX1 clean up PLL control bits (47) go into positions 105 - 151
-                // RX0 clean up PLL control bits (47) go into positions 152 - 198
-                // A-BUS PLL control bits       (136) go into positions 200 - 335
 
-                rc_ecmd |= ring_data.setBitLength(RING_LENGTH_AB_BNDY_PLL);   // This length needs to match the length in the scandef file (Required for hostboot.)
-                if (rc_ecmd)
+                // Read the ring length attribute value.
+                rc = FAPI_ATTR_GET( ATTR_PROC_AB_BNDY_PLL_LENGTH, &i_target, ring_length);
+                if (rc)
                 {
-                    FAPI_ERR("Error 0x%x setting ecmd data buffer length. Buffer must be set to length of scan chain.",  rc_ecmd);
-                    rc.setEcmdError(rc_ecmd);
+                    FAPI_ERR("Failed to get attribute: ATTR_PROC_AB_BNDY_PLL_LENGTH.");
                     break;
                 }
-                rc = fapiGetRing(i_target, 0x08030088, ring_data);
+                FAPI_DBG("ATTR_PROC_AB_BNDY_PLL_LENGTH attribute is set to : %d.", ring_length);
+
+
+                // Read the ring data attribute value.
+                rc = FAPI_ATTR_GET( ATTR_PROC_AB_BNDY_PLL_DATA, &i_target, attrABRingData);
                 if (rc)
                 {
-                    FAPI_ERR("fapiGetRing failed with rc = 0x%x", (uint32_t)rc);
+                    FAPI_ERR("Failed to get attribute: ATTR_PROC_AB_BNDY_PLL_DATA.");
                     break;
                 }
-                // Reverse the bits in the pll data buffers so they match the order of the bits in the scan chain
-                rc_ecmd |= pll_data.reverse( );
-                rc_ecmd |= rxpll_data.reverse( );
+
+
+                // Set the ring_data buffer to the right length for the ring data
+                rc_ecmd |= ring_data.setBitLength(ring_length);   // This length needs to match the real scan length in the scandef file (Required for hostboot.)
                 if (rc_ecmd)
                 {
-                    FAPI_ERR("Error (0x%x) reversing the bits in the pll data buffer", rc_ecmd);
+                    FAPI_ERR("Error 0x%x setting ecmd data buffer length. Buffer must be set to length of scan chain.",  rc_ecmd);
                     rc.setEcmdError(rc_ecmd);
                     break;
                 }
-                // Insert the PLL settings in to the scan ring.
-                rc_ecmd |= ring_data.insert( rxpll_data,  58, 47);
-                rc_ecmd |= ring_data.insert( rxpll_data, 105, 47);
-                rc_ecmd |= ring_data.insert( rxpll_data, 152, 47);
-                rc_ecmd |= ring_data.insert( pll_data,   200, 136);
+
+
+                // Put the ring data from the attribute into the buffer
+                rc_ecmd |= ring_data.insert(attrABRingData, 0, ring_length, 0);
                 if (rc_ecmd)
                 {
-                    FAPI_ERR("Error (0x%x) inserting config bits into ring_data buffer", rc_ecmd);
+                    FAPI_ERR("Error 0x%x loading scan chain attribute data into buffer.",  rc_ecmd);
                     rc.setEcmdError(rc_ecmd);
                     break;
                 }
@@ -342,7 +272,7 @@ extern "C"
 
 
                 //-----------------------------------------------------
-                //  Scan new ring data back into ab_bndy_pll scan ring.
+                //  Scan new ring data into ab_bndy_pll scan ring.
                 //-----------------------------------------------------
                 rc = fapiPutRing(i_target, 0x08030088, ring_data, RING_MODE_SET_PULSE);
                 if (rc)
@@ -350,7 +280,7 @@ extern "C"
                     FAPI_ERR("fapiPutRing failed with rc = 0x%x", (uint32_t)rc);
                     break;
                 }
-                FAPI_DBG("Loading of the config bits for A-BUS PLL is done.\n");
+                FAPI_DBG("Loading of the config bits for A-BUS PLL is done.");
 
 
 
@@ -390,8 +320,8 @@ extern "C"
                 }
 
 
-                FAPI_DBG("Loading of the config bits for A BUS PLL is done.\n");
-                FAPI_INF("Done setting up A-Bus PLL. \n");
+                FAPI_DBG("Loading of the config bits for A BUS PLL is done.");
+                FAPI_INF("Done setting up A-Bus PLL. ");
             }  // end A PLL
 
 
@@ -401,85 +331,50 @@ extern "C"
             //----------//
             if (!i_startDMI)
             {
-                FAPI_DBG("DMI PLL not selected for setup in this routine.\n");
+                FAPI_DBG("DMI PLL not selected for setup in this routine.");
             }
             else
             {
-                FAPI_DBG("Loading the config bits into DMI PLL\n");
-                if (is_simulation)
-                {
-                     rc_ecmd |= pll_data.setDoubleWord( 0, DMI_PLL_CONFIG_RING_CNTRL0_FOR_SIM);
-                     rc_ecmd |= pll_data.setDoubleWord( 1, DMI_PLL_CONFIG_RING_CNTRL1_FOR_SIM);
-                     rc_ecmd |= pll_data.setByte(      16, DMI_PLL_CONFIG_RING_CNTRL2_FOR_SIM);
-                }
-                else
-                {
-                     rc_ecmd |= pll_data.setDoubleWord( 0, DMI_PLL_CONFIG_RING_CNTRL0);
-                     rc_ecmd |= pll_data.setDoubleWord( 1, DMI_PLL_CONFIG_RING_CNTRL1);
-                     rc_ecmd |= pll_data.setByte(      16, DMI_PLL_CONFIG_RING_CNTRL2);
-                }
-                if (rc_ecmd)
-                {
-                    FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", rc_ecmd);
-                    rc.setEcmdError(rc_ecmd);
-                    break;
-                }
-                // Set bit 17 of the controller for the DMI Cleanup PLLs
-                rc_ecmd |= rxpll_data.flushTo0();
-                rc_ecmd |= rxpll_data.setBit(17);
-                if(rc_ecmd)
-                {
-                    FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", rc_ecmd);
-                    rc.setEcmdError(rc_ecmd);
-                    break;
-                }
-
-
+                FAPI_DBG("Loading the config bits into DMI PLL");
 
                 //---------------------------------------------------------------------------
-                //  Scan out the original contents from ring and modify it with new settings.
+                //  Get ring data from cronus attribute and put it into eCmdDataBufferBase
                 //---------------------------------------------------------------------------
-                FAPI_DBG("Loading PLL settings into scan ring pb_bndy_dmipll for DMI PLL.");
-
-                // The scan chain that we need to modify is:  Name = pb_bndy_dmipll  Address = {0x02030088}
-                // This chain is 1234 bits long.
-                // RX3 clean up PLL control bits (47) go into positions 314 - 360
-                // RX2 clean up PLL control bits (47) go into positions 361 - 407
-                // RX1 clean up PLL control bits (47) go into positions 408 - 454
-                // RX0 clean up PLL control bits (47) go into positions 455 - 501
-                // DMI PLL control bits         (136) go into positions 502 - 637
 
-                rc_ecmd |= ring_data.setBitLength(RING_LENGTH_PB_BNDY_DMIPLL);   // This length needs to match the length in the scandef file (Required for hostboot.)
-                if (rc_ecmd)
+                // Read the ring length attribute value.
+                rc = FAPI_ATTR_GET( ATTR_PROC_PB_BNDY_DMIPLL_LENGTH, &i_target, ring_length);
+                if (rc)
                 {
-                    FAPI_ERR("Error 0x%x setting ecmd data buffer length. Buffer must be set to length of scan chain.",  rc_ecmd);
-                    rc.setEcmdError(rc_ecmd);
+                    FAPI_ERR("Failed to get attribute: ATTR_PROC_PB_BNDY_DMIPLL_LENGTH.");
                     break;
                 }
-                rc = fapiGetRing(i_target, 0x02030088, ring_data);
+                FAPI_DBG("ATTR_PROC_PB_BNDY_DMIPLL_LENGTH attribute is set to : %d.", ring_length);
+
+
+                // Read the ring data attribute value.
+                rc = FAPI_ATTR_GET( ATTR_PROC_PB_BNDY_DMIPLL_DATA, &i_target, attrDMIRingData);
                 if (rc)
                 {
-                    FAPI_ERR("fapiGetRing failed with rc = 0x%x", (uint32_t)rc);
+                    FAPI_ERR("Failed to get attribute: ATTR_PROC_PB_BNDY_DMIPLL_DATA.");
                     break;
                 }
-                // Reverse the bits in the pll data buffers so they match the order of the bits in the scan chain
-                rc_ecmd |= pll_data.reverse( );
-                rc_ecmd |= rxpll_data.reverse( );
+
+
+                // Set the ring_data buffer to the right length for the ring data
+                rc_ecmd |= ring_data.setBitLength(ring_length);   // This length needs to match the real scan length in the scandef file (Required for hostboot.)
                 if (rc_ecmd)
                 {
-                    FAPI_ERR("Error (0x%x) reversing the bits in the pll data buffer", rc_ecmd);
+                    FAPI_ERR("Error 0x%x setting ecmd data buffer length. Buffer must be set to length of scan chain.",  rc_ecmd);
                     rc.setEcmdError(rc_ecmd);
                     break;
                 }
-                // Insert the PLL settings in to the scan ring.
-                rc_ecmd |= ring_data.insert( rxpll_data, 314, 47);
-                rc_ecmd |= ring_data.insert( rxpll_data, 361, 47);
-                rc_ecmd |= ring_data.insert( rxpll_data, 408, 47);
-                rc_ecmd |= ring_data.insert( rxpll_data, 455, 47);
-                rc_ecmd |= ring_data.insert( pll_data,   502, 136);
+
+
+                // Put the ring data from the attribute into the buffer
+                rc_ecmd |= ring_data.insert(attrDMIRingData, 0, ring_length, 0);
                 if (rc_ecmd)
                 {
-                    FAPI_ERR("Error (0x%x) inserting config bits into ring_data buffer", rc_ecmd);
+                    FAPI_ERR("Error 0x%x loading scan chain attribute data into buffer.",  rc_ecmd);
                     rc.setEcmdError(rc_ecmd);
                     break;
                 }
@@ -556,7 +451,7 @@ extern "C"
 
 
                 //-----------------------------------------------------
-                //  Scan new ring data back into pb_bndy_dmipll scan ring.
+                //  Scan new ring data into pb_bndy_dmipll scan ring.
                 //-----------------------------------------------------
                 rc = fapiPutRing(i_target, 0x02030088, ring_data, RING_MODE_SET_PULSE);
                 if (rc)
@@ -564,7 +459,7 @@ extern "C"
                     FAPI_ERR("fapiPutRing failed with rc = 0x%x", (uint32_t)rc);
                     break;
                 }
-                FAPI_DBG("Loading of the config bits for DMI PLL is done.\n");
+                FAPI_DBG("Loading of the config bits for DMI PLL is done.");
 
 
 
@@ -603,7 +498,7 @@ extern "C"
                     break;
                 }
 
-                FAPI_INF("Done setting up DMI PLL. \n");
+                FAPI_INF("Done setting up DMI PLL. ");
             }  // end DMI PLL
 
 
@@ -611,70 +506,67 @@ extern "C"
             //-----------//
             // PCIE PLL  //
             //-----------//
+
+            // query PCIE partial good attribute
+            rc = FAPI_ATTR_GET(ATTR_PROC_PCIE_ENABLE,
+                               &i_target,
+                               pcie_enable_attr);
+            if (!rc.ok())
+            {
+                FAPI_ERR("Error querying ATTR_PROC_PCIE_ENABLE");
+                break;
+            }
+
             if (!i_startPCIE)
             {
-                FAPI_DBG("PCIE PLL not selected for setup in this routine.\n");
+                FAPI_DBG("PCIE PLL not selected for setup in this routine.");
+            }
+            else if (pcie_enable_attr != fapi::ENUM_ATTR_PROC_PCIE_ENABLE_ENABLE)
+            {
+                FAPI_DBG("PCIE PLL setup skipped (partial good).");
             }
             else
             {
-                FAPI_DBG("Starting PLL setup for PCIE PLL ...\n");
-                FAPI_DBG("Loading the config bits into PCIE BUS PLL\n");
-                if (is_simulation)
-                {
-                    rc_ecmd |= pll_data.setDoubleWord( 0, PCIE_PLL_CONFIG_RING_CNTRL0_FOR_SIM);
-                    rc_ecmd |= pll_data.setDoubleWord( 1, PCIE_PLL_CONFIG_RING_CNTRL1_FOR_SIM);
-                    rc_ecmd |= pll_data.setByte(      16, PCIE_PLL_CONFIG_RING_CNTRL2_FOR_SIM);
-                }
-                else
-                {
-                    rc_ecmd |= pll_data.setDoubleWord( 0, PCIE_PLL_CONFIG_RING_CNTRL0);
-                    rc_ecmd |= pll_data.setDoubleWord( 1, PCIE_PLL_CONFIG_RING_CNTRL1);
-                    rc_ecmd |= pll_data.setByte(      16, PCIE_PLL_CONFIG_RING_CNTRL2);
-                }
-                if (rc_ecmd)
-                {
-                    FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", rc_ecmd);
-                    rc.setEcmdError(rc_ecmd);
-                    break;
-                }
-
-
+                FAPI_DBG("Loading the config bits into PCIE BUS PLL");
 
                 //---------------------------------------------------------------------------
-                //  Scan out the original contents from ring and modify it with new settings.
+                //  Get ring data from cronus attribute and put it into eCmdDataBufferBase
                 //---------------------------------------------------------------------------
-                FAPI_DBG("Loading PLL settings into scan ring pci_bndy_pll for DMI PLL.");
 
-                // The scan chain that we need to modify is:  Name = pci_bndy_pll  Address = {0x09030088}
-                // This chain is 565 bits long.
-                // PCIE PLL control bits       (136) go into positions 258 - 393
-
-                rc_ecmd |= ring_data.setBitLength(RING_LENGTH_PCI_BNDY_PLL);   // This length needs to match the length in the scandef file (Required for hostboot.)
-                if (rc_ecmd)
+                // Read the ring length attribute value.
+                rc = FAPI_ATTR_GET( ATTR_PROC_PCI_BNDY_PLL_LENGTH, &i_target, ring_length);
+                if (rc)
                 {
-                    FAPI_ERR("Error 0x%x setting ecmd data buffer length. Buffer must be set to length of scan chain.",  rc_ecmd);
-                    rc.setEcmdError(rc_ecmd);
+                    FAPI_ERR("Failed to get attribute: ATTR_PROC_PCI_BNDY_PLL_LENGTH.");
                     break;
                 }
-                rc = fapiGetRing(i_target, 0x09030088, ring_data);
+                FAPI_DBG("ATTR_PROC_PCI_BNDY_PLL_LENGTH attribute is set to : %d.", ring_length);
+
+
+                // Read the ring data attribute value.
+                rc = FAPI_ATTR_GET( ATTR_PROC_PCI_BNDY_PLL_DATA, &i_target, attrPCIRingData);
                 if (rc)
                 {
-                    FAPI_ERR("fapiGetRing failed with rc = 0x%x", (uint32_t)rc);
+                    FAPI_ERR("Failed to get attribute: ATTR_PROC_PCI_BNDY_PLL_DATA.");
                     break;
                 }
-                // Reverse the bits in the pll data buffers so they match the order of the bits in the scan chain
-                rc_ecmd |= pll_data.reverse( );
+
+
+                // Set the ring_data buffer to the right length for the ring data
+                rc_ecmd |= ring_data.setBitLength(ring_length);   // This length needs to match the real scan length in the scandef file (Required for hostboot.)
                 if (rc_ecmd)
                 {
-                    FAPI_ERR("Error (0x%x) reversing the bits in the pll data buffer", rc_ecmd);
+                    FAPI_ERR("Error 0x%x setting ecmd data buffer length. Buffer must be set to length of scan chain.",  rc_ecmd);
                     rc.setEcmdError(rc_ecmd);
                     break;
                 }
-                // Insert the PLL settings in to the scan ring.
-                rc_ecmd |= ring_data.insert( pll_data,   258, 136);
+
+
+                // Put the ring data from the attribute into the buffer
+                rc_ecmd |= ring_data.insert(attrPCIRingData, 0, ring_length, 0);
                 if (rc_ecmd)
                 {
-                    FAPI_ERR("Error (0x%x) inserting config bits into ring_data buffer", rc_ecmd);
+                    FAPI_ERR("Error 0x%x loading scan chain attribute data into buffer.",  rc_ecmd);
                     rc.setEcmdError(rc_ecmd);
                     break;
                 }
@@ -751,7 +643,7 @@ extern "C"
 
 
                 //-----------------------------------------------------
-                //  Scan new ring data back into pci_bndy_pll scan ring.
+                //  Scan new ring data into pci_bndy_pll scan ring.
                 //-----------------------------------------------------
                 rc = fapiPutRing(i_target, 0x09030088, ring_data, RING_MODE_SET_PULSE);
                 if (rc)
@@ -759,7 +651,7 @@ extern "C"
                     FAPI_ERR("fapiPutRing failed with rc = 0x%x", (uint32_t)rc);
                     break;
                 }
-                FAPI_DBG("Loading of the config bits for PCIE PLL is done.\n");
+                FAPI_DBG("Loading of the config bits for PCIE PLL is done.");
 
 
 
@@ -799,7 +691,7 @@ extern "C"
                 }
 
 
-                FAPI_INF("Done setting up PCIE PLL. \n");
+                FAPI_INF("Done setting up PCIE PLL. ");
             }  // end PCIE PLL
 
 
@@ -818,6 +710,18 @@ extern "C"
 This section is automatically updated by CVS when you check in this file.
 Be sure to create CVS comments when you commit so that they can be included here.
 $Log: proc_a_x_pci_dmi_pll_initf.C,v $
+Revision 1.9  2013/01/20 19:21:03  jmcgill
+update for A chiplet partial good support
+
+Revision 1.8  2013/01/10 14:42:53  jmcgill
+add partial good support
+
+Revision 1.6  2012/12/07 17:09:39  mfred
+fix to add DMI PLL settings for MC1 for Venice.
+
+Revision 1.5  2012/12/06 22:59:18  mfred
+adjust DMI PLL settings based on chip type.
+
 Revision 1.4  2012/08/27 15:29:03  mfred
 Fixed some findings from the latest FW code review.
 
diff --git a/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup/proc_a_x_pci_dmi_pll_setup.C b/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup/proc_a_x_pci_dmi_pll_setup.C
index d6b659e9b..97a75d9aa 100644
--- a/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup/proc_a_x_pci_dmi_pll_setup.C
+++ b/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup/proc_a_x_pci_dmi_pll_setup.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* IBM CONFIDENTIAL                                                       */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2012                   */
+/* COPYRIGHT International Business Machines Corp. 2012,2013              */
 /*                                                                        */
 /* p1                                                                     */
 /*                                                                        */
@@ -21,7 +21,7 @@
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
 // -*- mode: C++; c-file-style: "linux";  -*-
-// $Id: proc_a_x_pci_dmi_pll_setup.C,v 1.7 2012/08/14 18:32:45 mfred Exp $
+// $Id: proc_a_x_pci_dmi_pll_setup.C,v 1.9 2013/01/20 19:22:44 jmcgill Exp $
 // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_a_x_pci_dmi_pll_setup.C,v $
 //------------------------------------------------------------------------------
 // *|
@@ -101,7 +101,8 @@ extern "C"
         const uint32_t  max     = 50;  // Set to maximum number of times to poll for PLL each lock
         uint32_t        timeout = 0;
         uint32_t        num     = 0;
-
+        uint8_t         pcie_enable_attr;
+        uint8_t         abus_enable_attr;
 
         // mark function entry
         FAPI_INF("Entry1, start_XBUS=%s\n, Entry2, start_ABUS=%s\n, Entry3, start_PCIE=%s\n, Entry4, start_DMI=%s \n" ,
@@ -117,7 +118,7 @@ extern "C"
             // Common code for all PLLs  //
             //---------------------------//
 
-            FAPI_INF("FSI GP4 bit 22: Clear pll_test_bypass1.\n");
+            FAPI_INF("FSI GP4 bit 22: Clear pll_test_bypass1.");
             rc = fapiGetScom(i_target, MBOX_FSIGP4_0x00050013, gp_data);
             if (rc)
             {
@@ -145,12 +146,12 @@ extern "C"
             //------------//
             if (!i_startX)
             {
-                FAPI_DBG("X BUS PLL not selected for setup in this routine.\n");
+                FAPI_DBG("X BUS PLL not selected for setup in this routine.");
             }
             else
             {
-                FAPI_INF("This routine does not do X-BUS PLL setup at this time!.\n");
-                FAPI_INF("It is assumed that the X-BUS PLL is already set up in synchronous mode for use with the NEST logic.\n");
+                FAPI_INF("This routine does not do X-BUS PLL setup at this time!.");
+                FAPI_INF("It is assumed that the X-BUS PLL is already set up in synchronous mode for use with the NEST logic.");
             }
             // end X-bus PLL setup
 
@@ -159,16 +160,30 @@ extern "C"
             //------------//
             // A Bus PLL  //
             //------------//
+
+            // query ABUS partial good attribute
+            rc = FAPI_ATTR_GET(ATTR_PROC_A_ENABLE,
+                               &i_target,
+                               abus_enable_attr);
+            if (!rc.ok())
+            {
+                FAPI_ERR("Error querying ATTR_PROC_A_ENABLE");
+                break;
+            }
+
             if (!i_startA)
             {
-                FAPI_DBG("A BUS PLL not selected for setup in this routine.\n");
+                FAPI_DBG("A BUS PLL not selected for setup in this routine.");
+            }
+            else if (abus_enable_attr != fapi::ENUM_ATTR_PROC_A_ENABLE_ENABLE)
+            {
+                FAPI_DBG("A BUS PLL setup skipped (partial good).");
             }
             else
             {
-                FAPI_DBG("Starting PLL setup for A BUS PLL ...\n");
-
+                FAPI_DBG("Starting PLL setup for A BUS PLL ...");
 
-                FAPI_INF("ABUS GP3: Release PLL test enable of ABUS chiplet. \n");
+                FAPI_INF("ABUS GP3: Release PLL test enable of ABUS chiplet. ");
                 rc_ecmd |= gp_data.flushTo1();
                 rc_ecmd |= gp_data.clearBit(GP3_PLL_TEST_ENABLE);
                 if (rc_ecmd)
@@ -186,7 +201,7 @@ extern "C"
 
 
 
-                FAPI_INF("ABUS GP3: Release PLL reset of ABUS chiplet \n");
+                FAPI_INF("ABUS GP3: Release PLL reset of ABUS chiplet ");
                 rc_ecmd |= gp_data.flushTo1();
                 rc_ecmd |= gp_data.clearBit(GP3_PLL_RESET);
                 if (rc_ecmd)
@@ -204,7 +219,7 @@ extern "C"
 
 
 
-                FAPI_INF("CHIPLET PLLLK: Check the PLL lock of A-BUS \n");
+                FAPI_INF("CHIPLET PLLLK: Check the PLL lock of A-BUS ");
                 num = 0;
                 do
                 {
@@ -229,11 +244,11 @@ extern "C"
                     FAPI_SET_HWP_ERROR(rc, RC_PROC_A_X_PCI_DMI_PLL_SETUP_ABUS_PLL_NO_LOCK);
                     break;
                 }
-                FAPI_INF("A-Bus PLL is locked.\n");
+                FAPI_INF("A-Bus PLL is locked.");
 
 
 
-                FAPI_INF("ABUS GP3: Release PLL bypass of A-BUS \n");
+                FAPI_INF("ABUS GP3: Release PLL bypass of A-BUS ");
                 rc_ecmd |= gp_data.flushTo1();
                 rc_ecmd |= gp_data.clearBit(GP3_PLL_BYPASS);
                 if (rc_ecmd)
@@ -251,7 +266,7 @@ extern "C"
 
 
 
-                FAPI_INF("Done setting up A-Bus PLL. \n");
+                FAPI_INF("Done setting up A-Bus PLL. ");
             }  // end A PLL
 
 
@@ -261,14 +276,14 @@ extern "C"
             //----------//
             if (!i_startDMI)
             {
-                FAPI_DBG("DMI PLL not selected for setup in this routine.\n");
+                FAPI_DBG("DMI PLL not selected for setup in this routine.");
             }
             else
             {
-                FAPI_DBG("Starting PLL setup for DMI PLL ...\n");
+                FAPI_DBG("Starting PLL setup for DMI PLL ...");
 
 
-                FAPI_INF("NEST GP3: Release PLL test enable for DMI PLL.\n");
+                FAPI_INF("NEST GP3: Release PLL test enable for DMI PLL.");
                 rc_ecmd |= gp_data.flushTo1();
                 rc_ecmd |= gp_data.clearBit(GP3_PLL_TEST_ENABLE);
                 if (rc_ecmd)
@@ -286,7 +301,7 @@ extern "C"
 
 
 
-                FAPI_INF("NEST GP3: Release PLL reset for DMI PLL.\n");
+                FAPI_INF("NEST GP3: Release PLL reset for DMI PLL.");
                 rc_ecmd |= gp_data.flushTo1();
                 rc_ecmd |= gp_data.clearBit(GP3_PLL_RESET);
                 if (rc_ecmd)
@@ -304,7 +319,7 @@ extern "C"
 
 
 
-                FAPI_INF("CHIPLET PLLLK: Check the PLL lock of DMI PLL.\n");
+                FAPI_INF("CHIPLET PLLLK: Check the PLL lock of DMI PLL.");
                 num = 0;
                 do
                 {
@@ -329,11 +344,11 @@ extern "C"
                     FAPI_SET_HWP_ERROR(rc, RC_PROC_A_X_PCI_DMI_PLL_SETUP_DMI_PLL_NO_LOCK);
                     break;
                 }
-                FAPI_INF("DMI PLL is locked.\n");
+                FAPI_INF("DMI PLL is locked.");
 
 
 
-                FAPI_INF("NEST GP3: Release PLL bypass of for DMI PLL.\n");
+                FAPI_INF("NEST GP3: Release PLL bypass of for DMI PLL.");
                 rc_ecmd |= gp_data.flushTo1();
                 rc_ecmd |= gp_data.clearBit(GP3_PLL_BYPASS);
                 if (rc_ecmd)
@@ -351,7 +366,7 @@ extern "C"
 
 
 
-                FAPI_INF("Done setting up DMI PLL. \n");
+                FAPI_INF("Done setting up DMI PLL. ");
             }  // end DMI PLL
 
 
@@ -359,15 +374,30 @@ extern "C"
             //-----------//
             // PCIE PLL  //
             //-----------//
+
+            // query PCIE partial good attribute
+            rc = FAPI_ATTR_GET(ATTR_PROC_PCIE_ENABLE,
+                               &i_target,
+                               pcie_enable_attr);
+            if (!rc.ok())
+            {
+                FAPI_ERR("Error querying ATTR_PROC_PCIE_ENABLE");
+                break;
+            }
+
             if (!i_startPCIE)
             {
-                FAPI_DBG("PCIE PLL not selected for setup in this routine.\n");
+                FAPI_DBG("PCIE PLL not selected for setup in this routine.");
+            }
+            else if (pcie_enable_attr != fapi::ENUM_ATTR_PROC_PCIE_ENABLE_ENABLE)
+            {
+                FAPI_DBG("PCIE PLL setup skipped (partial good).");
             }
             else
             {
-                FAPI_DBG("Starting PLL setup for PCIE PLL ...\n");
+                FAPI_DBG("Starting PLL setup for PCIE PLL ...");
 
-                FAPI_INF("PCIE GP3: Release PLL test enable of PCIE chiplet. \n");
+                FAPI_INF("PCIE GP3: Release PLL test enable of PCIE chiplet. ");
                 rc_ecmd |= gp_data.flushTo1();
                 rc_ecmd |= gp_data.clearBit(GP3_PLL_TEST_ENABLE);
                 if (rc_ecmd)
@@ -385,7 +415,7 @@ extern "C"
 
 
 
-                FAPI_INF("PCIE GP3: Release PLL reset of PCIE chiplet \n");
+                FAPI_INF("PCIE GP3: Release PLL reset of PCIE chiplet ");
                 rc_ecmd |= gp_data.flushTo1();
                 rc_ecmd |= gp_data.clearBit(GP3_PLL_RESET);
                 if (rc_ecmd)
@@ -403,7 +433,7 @@ extern "C"
 
 
 
-                FAPI_INF("PCIE GP3: Release PLL bypass of PCIE-BUS \n");
+                FAPI_INF("PCIE GP3: Release PLL bypass of PCIE-BUS ");
                 // 24july2012  mfred moved this before checking PLL lock as this is required for analog PLLs.
                 rc_ecmd |= gp_data.flushTo1();
                 rc_ecmd |= gp_data.clearBit(GP3_PLL_BYPASS);
@@ -422,7 +452,7 @@ extern "C"
 
 
 
-                FAPI_INF("CHIPLET PLLLK: Check the PLL lock of PCIE-BUS \n");
+                FAPI_INF("CHIPLET PLLLK: Check the PLL lock of PCIE-BUS ");
                 num = 0;
                 do
                 {
@@ -447,11 +477,11 @@ extern "C"
                     FAPI_SET_HWP_ERROR(rc, RC_PROC_A_X_PCI_DMI_PLL_SETUP_PCIE_PLL_NO_LOCK);
                     break;
                 }
-                FAPI_INF("PCIE PLL is locked.\n");
+                FAPI_INF("PCIE PLL is locked.");
 
 
 
-                FAPI_INF("Done setting up PCIE PLL. \n");
+                FAPI_INF("Done setting up PCIE PLL. ");
             }  // end PCIE PLL
 
 
@@ -470,6 +500,12 @@ extern "C"
 This section is automatically updated by CVS when you check in this file.
 Be sure to create CVS comments when you commit so that they can be included here.
 $Log: proc_a_x_pci_dmi_pll_setup.C,v $
+Revision 1.9  2013/01/20 19:22:44  jmcgill
+update for A chiplet partial good support
+
+Revision 1.8  2013/01/10 14:40:13  jmcgill
+add partial good support
+
 Revision 1.7  2012/08/14 18:32:45  mfred
 Changed input parms from bool & to const bool.
 
diff --git a/src/usr/hwpf/hwp/nest_chiplets/proc_chiplet_scominit/proc_abus_scominit.C b/src/usr/hwpf/hwp/nest_chiplets/proc_chiplet_scominit/proc_abus_scominit.C
new file mode 100644
index 000000000..72fc8f9b7
--- /dev/null
+++ b/src/usr/hwpf/hwp/nest_chiplets/proc_chiplet_scominit/proc_abus_scominit.C
@@ -0,0 +1,119 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/usr/hwpf/hwp/nest_chiplets/proc_chiplet_scominit/proc_abus_scominit.C $ */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* COPYRIGHT International Business Machines Corp. 2013                   */
+/*                                                                        */
+/* p1                                                                     */
+/*                                                                        */
+/* Object Code Only (OCO) source materials                                */
+/* Licensed Internal Code Source Materials                                */
+/* IBM HostBoot Licensed Internal Code                                    */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* Origin: 30                                                             */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+// $Id: proc_abus_scominit.C,v 1.2 2013/01/20 19:23:46 jmcgill Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_abus_scominit.C,v $
+//------------------------------------------------------------------------------
+// *! (C) Copyright International Business Machines Corp. 2012
+// *! All Rights Reserved -- Property of IBM
+// *! *** IBM Confidential ***
+//------------------------------------------------------------------------------
+// *! TITLE       : proc_abus_scominit.C
+// *! DESCRIPTION : Invoke ABUS initfile (FAPI)
+// *!
+// *! OWNER NAME  : Mike Jones        Email: mjjones@us.ibm.com
+// *! BACKUP NAME : Joe McGill        Email: jmcgill@us.ibm.com
+// *!
+// *! ADDITIONAL COMMENTS :
+// *!
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+//  Includes
+//------------------------------------------------------------------------------
+#include <fapiHwpExecInitFile.H>
+#include <proc_abus_scominit.H>
+
+extern "C" {
+
+//------------------------------------------------------------------------------
+// Function definitions
+//------------------------------------------------------------------------------
+
+// HWP entry point, comments in header
+fapi::ReturnCode proc_abus_scominit(
+    const fapi::Target & i_abus_target,
+    const fapi::Target & i_this_pu_target,
+    const fapi::Target & i_other_pu_target)
+{
+    fapi::ReturnCode rc;
+    std::vector<fapi::Target> targets;
+    uint8_t abus_enable_attr;
+
+    // mark HWP entry
+    FAPI_INF("proc_abus_scominit: Start");
+
+    do
+    {
+        // query ABUS partial good attribute
+        rc = FAPI_ATTR_GET(ATTR_PROC_A_ENABLE,
+                           &i_this_pu_target,
+                           abus_enable_attr);
+        if (!rc.ok())
+        {
+            FAPI_ERR("proc_abus_scominit: Error querying ATTR_PROC_A_ENABLE");
+            break;
+        }
+
+        if (abus_enable_attr != fapi::ENUM_ATTR_PROC_A_ENABLE_ENABLE)
+        {
+            FAPI_ERR("proc_abus_scominit: Partial good attribute error");
+            FAPI_SET_HWP_ERROR(rc, RC_PROC_ABUS_SCOMINIT_PARTIAL_GOOD_ERR);
+            break;
+        }
+
+        // obtain target type to determine which initfile(s) to execute
+        targets.push_back(i_abus_target);
+        targets.push_back(i_this_pu_target);
+        targets.push_back(i_other_pu_target);
+
+        // processor ABUS chiplet target
+        if ((i_abus_target.getType() == fapi::TARGET_TYPE_ABUS_ENDPOINT) &&
+            (i_this_pu_target.getType() == fapi::TARGET_TYPE_PROC_CHIP) &&
+            (i_other_pu_target.getType() == fapi::TARGET_TYPE_PROC_CHIP))
+        {
+            FAPI_INF("proc_abus_scominit: Executing %s on %s",
+                     ABUS_IF, i_abus_target.toEcmdString());
+            FAPI_EXEC_HWP(rc, fapiHwpExecInitFile, targets, ABUS_IF);
+            if (!rc.ok())
+            {
+                FAPI_ERR("proc_abus_scominit: Error from fapiHwpExecInitfile executing %s on %s",
+                         ABUS_IF, i_abus_target.toEcmdString());
+                break;
+            }
+        }
+        // unsupported target type
+        else
+        {
+            FAPI_ERR("proc_abus_scominit: Unsupported target type(s)");
+            FAPI_SET_HWP_ERROR(rc, RC_PROC_ABUS_SCOMINIT_INVALID_TARGET);
+            break;
+        }
+    } while (0);
+
+    // mark HWP exit
+    FAPI_INF("proc_abus_scominit: End");
+	return rc;
+}
+
+
+} // extern "C"
diff --git a/src/usr/hwpf/hwp/nest_chiplets/proc_chiplet_scominit/proc_abus_scominit.H b/src/usr/hwpf/hwp/nest_chiplets/proc_chiplet_scominit/proc_abus_scominit.H
new file mode 100644
index 000000000..928ab9c97
--- /dev/null
+++ b/src/usr/hwpf/hwp/nest_chiplets/proc_chiplet_scominit/proc_abus_scominit.H
@@ -0,0 +1,93 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/usr/hwpf/hwp/nest_chiplets/proc_chiplet_scominit/proc_abus_scominit.H $ */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* COPYRIGHT International Business Machines Corp. 2013                   */
+/*                                                                        */
+/* p1                                                                     */
+/*                                                                        */
+/* Object Code Only (OCO) source materials                                */
+/* Licensed Internal Code Source Materials                                */
+/* IBM HostBoot Licensed Internal Code                                    */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* Origin: 30                                                             */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+// $Id: proc_abus_scominit.H,v 1.1 2012/08/11 18:24:25 jmcgill Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_abus_scominit.H,v $
+//------------------------------------------------------------------------------
+// *! (C) Copyright International Business Machines Corp. 2012
+// *! All Rights Reserved -- Property of IBM
+// *! *** IBM Confidential ***
+//------------------------------------------------------------------------------
+// *! TITLE       : proc_abus_scominit.H
+// *! DESCRIPTION : Invoke ABUS initfile (FAPI)
+// *!
+// *! OWNER NAME  : Mike Jones        Email: mjjones@us.ibm.com
+// *! BACKUP NAME : Joe McGill        Email: jmcgill@us.ibm.com
+// *!
+// *! ADDITIONAL COMMENTS :
+// *!
+//------------------------------------------------------------------------------
+
+#ifndef PROC_ABUS_SCOMINIT_H_
+#define PROC_ABUS_SCOMINIT_H_
+
+//------------------------------------------------------------------------------
+// Includes
+//------------------------------------------------------------------------------
+#include <fapi.H>
+
+//------------------------------------------------------------------------------
+// Constant definitions
+//------------------------------------------------------------------------------
+const char * const ABUS_IF = "p8.abus.scom.if";
+
+//------------------------------------------------------------------------------
+// Structure definitions
+//------------------------------------------------------------------------------
+
+// function pointer typedef definition for HWP call support
+typedef fapi::ReturnCode
+(*proc_abus_scominit_FP_t)(const fapi::Target & i_abus_target,
+                           const fapi::Target & i_this_pu_target,
+                           const fapi::Target & i_other_pu_target);
+
+extern "C" {
+
+//------------------------------------------------------------------------------
+// Function prototypes
+//------------------------------------------------------------------------------
+
+/**
+ * @brief HWP that calls the ABUS SCOM initfiles
+ *
+ * Should be called for all valid/connected ABUS endpoints
+ *
+ * @param[in] i_abus_target     Reference to ABUS target
+ *            i_this_pu_target  Reference to enclosing chip target
+ *            i_other_pu_target Reference to connected chip target
+ *                              If i_abus_target is TARGET_TYPE_ABUS_ENDPOINT,
+ *                                 i_this_pu_target is TARGET_TYPE_PROC_CHIP,
+ *                                 i_other_pu_target is TARGET_TYPE_PROC_CHIP,
+ *                              calls:
+ *                              - p8.abus.scom.initfile
+ *
+ * @return ReturnCode
+ */
+fapi::ReturnCode proc_abus_scominit(
+    const fapi::Target & i_abus_target,
+    const fapi::Target & i_this_pu_target,
+    const fapi::Target & i_other_pu_target);
+
+
+} // extern "C"
+
+#endif // PROC_ABUS_SCOMINIT_H_
diff --git a/src/usr/hwpf/hwp/nest_chiplets/proc_chiplet_scominit/proc_abus_scominit_errors.xml b/src/usr/hwpf/hwp/nest_chiplets/proc_chiplet_scominit/proc_abus_scominit_errors.xml
new file mode 100644
index 000000000..9e61fd5ae
--- /dev/null
+++ b/src/usr/hwpf/hwp/nest_chiplets/proc_chiplet_scominit/proc_abus_scominit_errors.xml
@@ -0,0 +1,34 @@
+<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
+<!-- This is an automatically generated prolog.                             -->
+<!--                                                                        -->
+<!-- $Source: src/usr/hwpf/hwp/nest_chiplets/proc_chiplet_scominit/proc_abus_scominit_errors.xml $ -->
+<!--                                                                        -->
+<!-- IBM CONFIDENTIAL                                                       -->
+<!--                                                                        -->
+<!-- COPYRIGHT International Business Machines Corp. 2013                   -->
+<!--                                                                        -->
+<!-- p1                                                                     -->
+<!--                                                                        -->
+<!-- Object Code Only (OCO) source materials                                -->
+<!-- Licensed Internal Code Source Materials                                -->
+<!-- IBM HostBoot Licensed Internal Code                                    -->
+<!--                                                                        -->
+<!-- The source code for this program is not published or otherwise         -->
+<!-- divested of its trade secrets, irrespective of what has been           -->
+<!-- deposited with the U.S. Copyright Office.                              -->
+<!--                                                                        -->
+<!-- Origin: 30                                                             -->
+<!--                                                                        -->
+<!-- IBM_PROLOG_END_TAG                                                     -->
+<!-- Error definitions for proc_abus_scominit procedure -->
+<hwpErrors>
+  <!-- *********************************************************************** -->
+  <hwpError>
+    <rc>RC_PROC_ABUS_SCOMINIT_INVALID_TARGET</rc>
+    <description>Invalid target type presented to proc_abus_scominit HWP (expects TARGET_TYPE_ABUS_ENDPOINT).</description>
+  </hwpError>
+  <hwpError>
+    <rc>RC_PROC_ABUS_SCOMINIT_PARTIAL_GOOD_ERR</rc>
+    <description>Partial good attribute state does not allow for action on chiplet target.</description>
+  </hwpError>
+</hwpErrors>
diff --git a/src/usr/hwpf/hwp/nest_chiplets/proc_chiplet_scominit/proc_chiplet_scominit.C b/src/usr/hwpf/hwp/nest_chiplets/proc_chiplet_scominit/proc_chiplet_scominit.C
index 866b67b76..edfa740b2 100644
--- a/src/usr/hwpf/hwp/nest_chiplets/proc_chiplet_scominit/proc_chiplet_scominit.C
+++ b/src/usr/hwpf/hwp/nest_chiplets/proc_chiplet_scominit/proc_chiplet_scominit.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* IBM CONFIDENTIAL                                                       */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2012                   */
+/* COPYRIGHT International Business Machines Corp. 2012,2013              */
 /*                                                                        */
 /* p1                                                                     */
 /*                                                                        */
@@ -20,7 +20,7 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: proc_chiplet_scominit.C,v 1.5 2012/08/11 03:43:10 jmcgill Exp $
+// $Id: proc_chiplet_scominit.C,v 1.9 2013/01/20 19:29:42 jmcgill Exp $
 // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_chiplet_scominit.C,v $
 //------------------------------------------------------------------------------
 // *! (C) Copyright International Business Machines Corp. 2012
@@ -54,7 +54,8 @@ fapi::ReturnCode proc_chiplet_scominit(const fapi::Target & i_target)
 {
     fapi::ReturnCode rc;
     fapi::TargetType target_type;
-    std::vector<fapi::Target> targets;
+    std::vector<fapi::Target> initfile_targets;
+    uint8_t nx_enabled;
 
     // mark HWP entry
     FAPI_INF("proc_chiplet_scominit: Start");
@@ -63,18 +64,18 @@ fapi::ReturnCode proc_chiplet_scominit(const fapi::Target & i_target)
     {
         // obtain target type to determine which initfile(s) to execute
         target_type = i_target.getType();
-        targets.push_back(i_target);
 
         // chip level target
         if (target_type == fapi::TARGET_TYPE_PROC_CHIP)
         {
-            // execute FBC initfile
+            // execute FBC SCOM initfile
+            initfile_targets.push_back(i_target);
             FAPI_INF("proc_chiplet_scominit: Executing %s on %s",
                      PROC_CHIPLET_SCOMINIT_FBC_IF, i_target.toEcmdString());
             FAPI_EXEC_HWP(
                 rc,
                 fapiHwpExecInitFile,
-                targets,
+                initfile_targets,
                 PROC_CHIPLET_SCOMINIT_FBC_IF);
             if (!rc.ok())
             {
@@ -83,6 +84,99 @@ fapi::ReturnCode proc_chiplet_scominit(const fapi::Target & i_target)
                          i_target.toEcmdString());
                 break;
             }
+
+            // query NX partial good attribute
+            rc = FAPI_ATTR_GET(ATTR_PROC_NX_ENABLE,
+                               &i_target,
+                               nx_enabled);
+            if (!rc.ok())
+            {
+                FAPI_ERR("proc_chiplet_scominit: Error querying ATTR_PROC_NX_ENABLE");
+                break;
+            }
+
+            // apply NX/AS SCOM initfiles only if partial good attribute is set
+            if (nx_enabled == fapi::ENUM_ATTR_PROC_NX_ENABLE_ENABLE)
+            {
+                // execute NX SCOM initfile
+                initfile_targets.clear();
+                initfile_targets.push_back(i_target);
+                FAPI_INF("proc_chiplet_scominit: Executing %s on %s",
+                         PROC_CHIPLET_SCOMINIT_NX_IF, i_target.toEcmdString());
+                FAPI_EXEC_HWP(
+                    rc,
+                    fapiHwpExecInitFile,
+                    initfile_targets,
+                    PROC_CHIPLET_SCOMINIT_NX_IF);
+                if (!rc.ok())
+                {
+                    FAPI_ERR("proc_chiplet_scominit: Error from fapiHwpExecInitfile executing %s on %s",
+                             PROC_CHIPLET_SCOMINIT_NX_IF,
+                             i_target.toEcmdString());
+                    break;
+                }
+
+                // execute AS SCOM initfile
+                FAPI_INF("proc_chiplet_scominit: Executing %s on %s",
+                         PROC_CHIPLET_SCOMINIT_AS_IF, i_target.toEcmdString());
+                FAPI_EXEC_HWP(
+                    rc,
+                    fapiHwpExecInitFile,
+                    initfile_targets,
+                    PROC_CHIPLET_SCOMINIT_AS_IF);
+                if (!rc.ok())
+                {
+                    FAPI_ERR("proc_chiplet_scominit: Error from fapiHwpExecInitfile executing %s on %s",
+                             PROC_CHIPLET_SCOMINIT_AS_IF,
+                             i_target.toEcmdString());
+                    break;
+                }
+            }
+            else
+            {
+                FAPI_DBG("proc_chiplet_scominit: Skipping execution of %s/%s (partial good)",
+                         PROC_CHIPLET_SCOMINIT_NX_IF, PROC_CHIPLET_SCOMINIT_AS_IF);
+            }
+
+            // determine set of functional MCS chiplets
+            std::vector<fapi::Target> mcs_targets;
+            rc = fapiGetChildChiplets(i_target,
+                                      fapi::TARGET_TYPE_MCS_CHIPLET,
+                                      mcs_targets,
+                                      fapi::TARGET_STATE_FUNCTIONAL);
+            if (!rc.ok())
+            {
+                FAPI_ERR("proc_chiplet_scominit: Error from fapiGetChildChiplets");
+                break;
+            }
+
+            // apply MCS SCOM initfile only for functional chiplets
+            for (std::vector<fapi::Target>::iterator i = mcs_targets.begin();
+                 (i != mcs_targets.end()) && rc.ok();
+                 i++)
+            {
+                // execute MCS SCOM initfile
+                initfile_targets.clear();
+                initfile_targets.push_back(*i);
+                FAPI_INF("proc_chiplet_scominit: Executing %s on %s",
+                         PROC_CHIPLET_SCOMINIT_MCS_IF, i->toEcmdString());
+                FAPI_EXEC_HWP(
+                    rc,
+                    fapiHwpExecInitFile,
+                    initfile_targets,
+                    PROC_CHIPLET_SCOMINIT_MCS_IF);
+                if (!rc.ok())
+                {
+                    FAPI_ERR("proc_chiplet_scominit: Error from fapiHwpExecInitfile executing %s on %s",
+                             PROC_CHIPLET_SCOMINIT_MCS_IF,
+                             i->toEcmdString());
+                    break;
+                }
+            }
+            if (!rc.ok())
+            {
+                break;
+            }
         }
         // unsupported target type
         else
diff --git a/src/usr/hwpf/hwp/nest_chiplets/proc_chiplet_scominit/proc_chiplet_scominit.H b/src/usr/hwpf/hwp/nest_chiplets/proc_chiplet_scominit/proc_chiplet_scominit.H
index c77eedf29..15da9670b 100644
--- a/src/usr/hwpf/hwp/nest_chiplets/proc_chiplet_scominit/proc_chiplet_scominit.H
+++ b/src/usr/hwpf/hwp/nest_chiplets/proc_chiplet_scominit/proc_chiplet_scominit.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* IBM CONFIDENTIAL                                                       */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2012                   */
+/* COPYRIGHT International Business Machines Corp. 2012,2013              */
 /*                                                                        */
 /* p1                                                                     */
 /*                                                                        */
@@ -20,7 +20,7 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: proc_chiplet_scominit.H,v 1.6 2012/08/11 03:43:12 jmcgill Exp $
+// $Id: proc_chiplet_scominit.H,v 1.8 2013/01/20 19:30:37 jmcgill Exp $
 // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_chiplet_scominit.H,v $
 //------------------------------------------------------------------------------
 // *! (C) Copyright International Business Machines Corp. 2012
@@ -50,6 +50,9 @@
 //------------------------------------------------------------------------------
 
 const char * const PROC_CHIPLET_SCOMINIT_FBC_IF = "p8.fbc.scom.if";
+const char * const PROC_CHIPLET_SCOMINIT_NX_IF  = "p8.nx.scom.if";
+const char * const PROC_CHIPLET_SCOMINIT_AS_IF  = "p8.as.scom.if";
+const char * const PROC_CHIPLET_SCOMINIT_MCS_IF = "p8.mcs.scom.if";
 
 //------------------------------------------------------------------------------
 // Structure definitions
@@ -74,6 +77,9 @@ extern "C" {
  * @param[in] i_target Reference to target
  *                     If TARGET_TYPE_PROC_CHIP, calls:
  *                     - p8.fbc.scom.initfile
+ *                     - p8.nx.scom.initfile
+ *                     - p8.as.scom.initfile
+ *                     - p8.mcs.scom.initfile for each functional MCS chiplet
  *
  * @return ReturnCode
  */
diff --git a/src/usr/hwpf/hwp/nest_chiplets/proc_chiplet_scominit/proc_xbus_scominit.C b/src/usr/hwpf/hwp/nest_chiplets/proc_chiplet_scominit/proc_xbus_scominit.C
new file mode 100644
index 000000000..521a9b42c
--- /dev/null
+++ b/src/usr/hwpf/hwp/nest_chiplets/proc_chiplet_scominit/proc_xbus_scominit.C
@@ -0,0 +1,119 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/usr/hwpf/hwp/nest_chiplets/proc_chiplet_scominit/proc_xbus_scominit.C $ */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* COPYRIGHT International Business Machines Corp. 2013                   */
+/*                                                                        */
+/* p1                                                                     */
+/*                                                                        */
+/* Object Code Only (OCO) source materials                                */
+/* Licensed Internal Code Source Materials                                */
+/* IBM HostBoot Licensed Internal Code                                    */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* Origin: 30                                                             */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+// $Id: proc_xbus_scominit.C,v 1.2 2013/01/20 19:24:27 jmcgill Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_xbus_scominit.C,v $
+//------------------------------------------------------------------------------
+// *! (C) Copyright International Business Machines Corp. 2012
+// *! All Rights Reserved -- Property of IBM
+// *! *** IBM Confidential ***
+//------------------------------------------------------------------------------
+// *! TITLE       : proc_xbus_scominit.C
+// *! DESCRIPTION : Invoke XBUS initfile (FAPI)
+// *!
+// *! OWNER NAME  : Mike Jones        Email: mjjones@us.ibm.com
+// *! BACKUP NAME : Joe McGill        Email: jmcgill@us.ibm.com
+// *!
+// *! ADDITIONAL COMMENTS :
+// *!
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+//  Includes
+//------------------------------------------------------------------------------
+#include <fapiHwpExecInitFile.H>
+#include <proc_xbus_scominit.H>
+
+extern "C" {
+
+//------------------------------------------------------------------------------
+// Function definitions
+//------------------------------------------------------------------------------
+
+// HWP entry point, comments in header
+fapi::ReturnCode proc_xbus_scominit(
+    const fapi::Target & i_xbus_target,
+    const fapi::Target & i_this_pu_target,
+    const fapi::Target & i_other_pu_target)
+{
+    fapi::ReturnCode rc;
+    std::vector<fapi::Target> targets;
+    uint8_t xbus_enable_attr;
+
+    // mark HWP entry
+    FAPI_INF("proc_xbus_scominit: Start");
+
+    do
+    {
+        // query XBUS partial good attribute
+        rc = FAPI_ATTR_GET(ATTR_PROC_X_ENABLE,
+                           &i_this_pu_target,
+                           xbus_enable_attr);
+        if (!rc.ok())
+        {
+            FAPI_ERR("proc_xbus_scominit: Error querying ATTR_PROC_X_ENABLE");
+            break;
+        }
+
+        if (xbus_enable_attr != fapi::ENUM_ATTR_PROC_X_ENABLE_ENABLE)
+        {
+            FAPI_ERR("proc_xbus_scominit: Partial good attribute error");
+            FAPI_SET_HWP_ERROR(rc, RC_PROC_XBUS_SCOMINIT_PARTIAL_GOOD_ERR);
+            break;
+        }
+
+        // obtain target type to determine which initfile(s) to execute
+        targets.push_back(i_xbus_target);
+        targets.push_back(i_this_pu_target);
+        targets.push_back(i_other_pu_target);
+
+        // processor XBUS chiplet target
+        if ((i_xbus_target.getType() == fapi::TARGET_TYPE_XBUS_ENDPOINT) &&
+            (i_this_pu_target.getType() == fapi::TARGET_TYPE_PROC_CHIP) &&
+            (i_other_pu_target.getType() == fapi::TARGET_TYPE_PROC_CHIP))
+        {
+            FAPI_INF("proc_xbus_scominit: Executing %s on %s",
+                     XBUS_IF, i_xbus_target.toEcmdString());
+            FAPI_EXEC_HWP(rc, fapiHwpExecInitFile, targets, XBUS_IF);
+            if (!rc.ok())
+            {
+                FAPI_ERR("proc_xbus_scominit: Error from fapiHwpExecInitfile executing %s on %s",
+                         XBUS_IF, i_xbus_target.toEcmdString());
+                break;
+            }
+        }
+        // unsupported target type
+        else
+        {
+            FAPI_ERR("proc_xbus_scominit: Unsupported target type(s)");
+            FAPI_SET_HWP_ERROR(rc, RC_PROC_XBUS_SCOMINIT_INVALID_TARGET);
+            break;
+        }
+    } while (0);
+
+    // mark HWP exit
+    FAPI_INF("proc_xbus_scominit: End");
+	return rc;
+}
+
+
+} // extern "C"
diff --git a/src/usr/hwpf/hwp/nest_chiplets/proc_chiplet_scominit/proc_xbus_scominit.H b/src/usr/hwpf/hwp/nest_chiplets/proc_chiplet_scominit/proc_xbus_scominit.H
new file mode 100644
index 000000000..0606a76e1
--- /dev/null
+++ b/src/usr/hwpf/hwp/nest_chiplets/proc_chiplet_scominit/proc_xbus_scominit.H
@@ -0,0 +1,93 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/usr/hwpf/hwp/nest_chiplets/proc_chiplet_scominit/proc_xbus_scominit.H $ */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* COPYRIGHT International Business Machines Corp. 2013                   */
+/*                                                                        */
+/* p1                                                                     */
+/*                                                                        */
+/* Object Code Only (OCO) source materials                                */
+/* Licensed Internal Code Source Materials                                */
+/* IBM HostBoot Licensed Internal Code                                    */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* Origin: 30                                                             */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+// $Id: proc_xbus_scominit.H,v 1.1 2012/08/11 18:24:30 jmcgill Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_xbus_scominit.H,v $
+//------------------------------------------------------------------------------
+// *! (C) Copyright International Business Machines Corp. 2012
+// *! All Rights Reserved -- Property of IBM
+// *! *** IBM Confidential ***
+//------------------------------------------------------------------------------
+// *! TITLE       : proc_xbus_scominit.H
+// *! DESCRIPTION : Invoke XBUS initfile (FAPI)
+// *!
+// *! OWNER NAME  : Mike Jones        Email: mjjones@us.ibm.com
+// *! BACKUP NAME : Joe McGill        Email: jmcgill@us.ibm.com
+// *!
+// *! ADDITIONAL COMMENTS :
+// *!
+//------------------------------------------------------------------------------
+
+#ifndef PROC_XBUS_SCOMINIT_H_
+#define PROC_XBUS_SCOMINIT_H_
+
+//------------------------------------------------------------------------------
+// Includes
+//------------------------------------------------------------------------------
+#include <fapi.H>
+
+//------------------------------------------------------------------------------
+// Constant definitions
+//------------------------------------------------------------------------------
+const char * const XBUS_IF = "p8.xbus.scom.if";
+
+//------------------------------------------------------------------------------
+// Structure definitions
+//------------------------------------------------------------------------------
+
+// function pointer typedef definition for HWP call support
+typedef fapi::ReturnCode
+(*proc_xbus_scominit_FP_t)(const fapi::Target & i_target,
+                           const fapi::Target & i_this_pu_target,
+                           const fapi::Target & i_other_pu_target);
+
+extern "C" {
+
+//------------------------------------------------------------------------------
+// Function prototypes
+//------------------------------------------------------------------------------
+
+/**
+ * @brief HWP that calls the XBUS SCOM initfiles
+ *
+ * Should be called for all valid/connected XBUS endpoints
+ *
+ * @param[in] i_xbus_target     Reference to XBUS target
+ *            i_this_pu_target  Reference to enclosing chip target
+ *            i_other_pu_target Reference to connected chip target
+ *                              If i_xbus_target is TARGET_TYPE_XBUS_ENDPOINT,
+ *                                 i_this_pu_target is TARGET_TYPE_PROC_CHIP,
+ *                                 i_other_pu_target is TARGET_TYPE_PROC_CHIP,
+ *                              calls:
+ *                              - p8.xbus.scom.initfile
+ *
+ * @return ReturnCode
+ */
+fapi::ReturnCode proc_xbus_scominit(
+    const fapi::Target & i_xbus_target,
+    const fapi::Target & i_this_pu_target,
+    const fapi::Target & i_other_pu_target);
+
+
+} // extern "C"
+
+#endif // PROC_XBUS_SCOMINIT_H_
diff --git a/src/usr/hwpf/hwp/nest_chiplets/proc_chiplet_scominit/proc_xbus_scominit_errors.xml b/src/usr/hwpf/hwp/nest_chiplets/proc_chiplet_scominit/proc_xbus_scominit_errors.xml
new file mode 100644
index 000000000..bd2afb999
--- /dev/null
+++ b/src/usr/hwpf/hwp/nest_chiplets/proc_chiplet_scominit/proc_xbus_scominit_errors.xml
@@ -0,0 +1,34 @@
+<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
+<!-- This is an automatically generated prolog.                             -->
+<!--                                                                        -->
+<!-- $Source: src/usr/hwpf/hwp/nest_chiplets/proc_chiplet_scominit/proc_xbus_scominit_errors.xml $ -->
+<!--                                                                        -->
+<!-- IBM CONFIDENTIAL                                                       -->
+<!--                                                                        -->
+<!-- COPYRIGHT International Business Machines Corp. 2013                   -->
+<!--                                                                        -->
+<!-- p1                                                                     -->
+<!--                                                                        -->
+<!-- Object Code Only (OCO) source materials                                -->
+<!-- Licensed Internal Code Source Materials                                -->
+<!-- IBM HostBoot Licensed Internal Code                                    -->
+<!--                                                                        -->
+<!-- The source code for this program is not published or otherwise         -->
+<!-- divested of its trade secrets, irrespective of what has been           -->
+<!-- deposited with the U.S. Copyright Office.                              -->
+<!--                                                                        -->
+<!-- Origin: 30                                                             -->
+<!--                                                                        -->
+<!-- IBM_PROLOG_END_TAG                                                     -->
+<!-- Error definitions for proc_xbus_scominit procedure -->
+<hwpErrors>
+  <!-- *********************************************************************** -->
+  <hwpError>
+    <rc>RC_PROC_XBUS_SCOMINIT_INVALID_TARGET</rc>
+    <description>Invalid target type presented to proc_xbus_scominit HWP (expects TARGET_TYPE_XBUS_ENDPOINT).</description>
+  </hwpError>
+  <hwpError>
+    <rc>RC_PROC_XBUS_SCOMINIT_PARTIAL_GOOD_ERR</rc>
+    <description>Partial good attribute state does not allow for action on chiplet target.</description>
+  </hwpError>
+</hwpErrors>
diff --git a/src/usr/hwpf/hwp/nest_chiplets/proc_pcie_scominit/proc_pcie_scominit.C b/src/usr/hwpf/hwp/nest_chiplets/proc_pcie_scominit/proc_pcie_scominit.C
index 95ff319f4..f941f4e8f 100644
--- a/src/usr/hwpf/hwp/nest_chiplets/proc_pcie_scominit/proc_pcie_scominit.C
+++ b/src/usr/hwpf/hwp/nest_chiplets/proc_pcie_scominit/proc_pcie_scominit.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* IBM CONFIDENTIAL                                                       */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2012                   */
+/* COPYRIGHT International Business Machines Corp. 2012,2013              */
 /*                                                                        */
 /* p1                                                                     */
 /*                                                                        */
@@ -20,7 +20,7 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: proc_pcie_scominit.C,v 1.1 2012/11/05 21:52:40 jmcgill Exp $
+// $Id: proc_pcie_scominit.C,v 1.3 2013/01/20 19:27:41 jmcgill Exp $
 // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_pcie_scominit.C,v $
 //------------------------------------------------------------------------------
 // *! (C) Copyright International Business Machines Corp. 2012
@@ -356,6 +356,7 @@ fapi::ReturnCode proc_pcie_scominit(
     const fapi::Target & i_target)
 {
     fapi::ReturnCode rc;
+    uint8_t pcie_enabled;
 
     // mark HWP entry
     FAPI_INF("proc_pcie_scominit: Start");
@@ -370,26 +371,44 @@ fapi::ReturnCode proc_pcie_scominit(
             break;
         }
 
-        // initialize/configure/finalize IOP programming
-        rc = proc_pcie_scominit_iop_init(i_target);
+        // query PCIE partial good attribute
+        rc = FAPI_ATTR_GET(ATTR_PROC_PCIE_ENABLE,
+                           &i_target,
+                           pcie_enabled);
         if (!rc.ok())
         {
-            FAPI_ERR("proc_pcie_scominit: Error from proc_pcie_scominit_iop_init");
+            FAPI_ERR("proc_pcie_scominit: Error querying ATTR_PROC_PCIE_ENABLE");
             break;
         }
 
-        rc = proc_pcie_scominit_iop_config(i_target);
-        if (!rc.ok())
+        // initialize/configure/finalize IOP programming (only if partial good
+        // attribute is set)
+        if (pcie_enabled == fapi::ENUM_ATTR_PROC_PCIE_ENABLE_ENABLE)
         {
-            FAPI_ERR("proc_pcie_scominit: Error from proc_pcie_scominit_iop_config");
-            break;
-        }
+            rc = proc_pcie_scominit_iop_init(i_target);
+            if (!rc.ok())
+            {
+                FAPI_ERR("proc_pcie_scominit: Error from proc_pcie_scominit_iop_init");
+                break;
+            }
 
-        rc = proc_pcie_scominit_iop_complete(i_target);
-        if (!rc.ok())
+            rc = proc_pcie_scominit_iop_config(i_target);
+            if (!rc.ok())
+            {
+                FAPI_ERR("proc_pcie_scominit: Error from proc_pcie_scominit_iop_config");
+                break;
+            }
+
+            rc = proc_pcie_scominit_iop_complete(i_target);
+            if (!rc.ok())
+            {
+                FAPI_ERR("proc_pcie_scominit: Error from proc_pcie_scominit_iop_complete");
+                break;
+            }
+        }
+        else
         {
-            FAPI_ERR("proc_pcie_scominit: Error from proc_pcie_scominit_iop_complete");
-            break;
+            FAPI_DBG("proc_pcie_scominit: Skipping initialization (partial good)");
         }
 
     } while(0);
diff --git a/src/usr/hwpf/hwp/nest_chiplets/proc_start_clocks_chiplets/proc_start_clocks_chiplets.C b/src/usr/hwpf/hwp/nest_chiplets/proc_start_clocks_chiplets/proc_start_clocks_chiplets.C
index c173a7bf8..d31a0d68f 100644
--- a/src/usr/hwpf/hwp/nest_chiplets/proc_start_clocks_chiplets/proc_start_clocks_chiplets.C
+++ b/src/usr/hwpf/hwp/nest_chiplets/proc_start_clocks_chiplets/proc_start_clocks_chiplets.C
@@ -20,7 +20,7 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: proc_start_clocks_chiplets.C,v 1.10 2012/12/12 10:43:10 rkoester Exp $
+// $Id: proc_start_clocks_chiplets.C,v 1.13 2013/01/20 19:26:07 jmcgill Exp $
 // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_start_clocks_chiplets.C,v $
 //------------------------------------------------------------------------------
 // *|
@@ -298,8 +298,6 @@ fapi::ReturnCode proc_start_clocks_get_partial_good_vector(
 
         }
 
-        FAPI_DBG("proc_start_clocks_get_partial_good_vector: picked partial good regions vector is (%016llX)", *o_chiplet_reg_vec);
-
 
     } while(0);
 
@@ -438,8 +436,6 @@ fapi::ReturnCode proc_start_clocks_chiplet_check_clk_status_reg(
             break;
         }
 
-        // intialize reference databuffer
-        rc_ecmd |= vec_data.flushTo0();
         // load it with reference data
         rc_ecmd |= vec_data.setDoubleWord(0, i_chiplet_clkreg_vec);
         // generate expected value databuffer
@@ -717,7 +713,7 @@ fapi::ReturnCode proc_start_clocks_generic_chiplet(
                                                        );
         if (rc)
         {
-            FAPI_ERR("proc_start_clocks_partial_good_vector: Error getting partial good region vector");
+            FAPI_ERR("proc_start_clocks_generic_chiplet: Error getting partial good region vector");
             break;
         }
 
@@ -793,6 +789,9 @@ fapi::ReturnCode proc_start_clocks_chiplets(const fapi::Target& i_target,
                                             bool xbus, bool abus, bool pcie)
 {
     fapi::ReturnCode rc;
+    uint8_t xbus_enable_attr;
+    uint8_t abus_enable_attr;
+    uint8_t pcie_enable_attr;
 
     // mark HWP entry
     FAPI_IMP("proc_start_clocks_chiplets: Entering ...");
@@ -801,38 +800,92 @@ fapi::ReturnCode proc_start_clocks_chiplets(const fapi::Target& i_target,
     {
         if (xbus)
         {
-            FAPI_DBG("Starting X bus chiplet clocks ...");
-            rc = proc_start_clocks_generic_chiplet(
-                i_target,
-                X_BUS_CHIPLET_0x04000000);
-            if (rc)
+            // query XBUS partial good attribute
+            rc = FAPI_ATTR_GET(ATTR_PROC_X_ENABLE,
+                               &i_target,
+                               xbus_enable_attr);
+            if (!rc.ok())
             {
+                FAPI_ERR("proc_start_clocks_chiplets: Error querying ATTR_PROC_X_ENABLE");
                 break;
             }
+
+            if (xbus_enable_attr == fapi::ENUM_ATTR_PROC_X_ENABLE_ENABLE)
+            {
+                FAPI_DBG("Starting X bus chiplet clocks ...");
+                rc = proc_start_clocks_generic_chiplet(
+                    i_target,
+                    X_BUS_CHIPLET_0x04000000);
+                if (rc)
+                {
+                    FAPI_ERR("proc_start_clocks_chiplets: Error from proc_start_clocks_generic_chiplet (X)");
+                    break;
+                }
+            }
+            else
+            {
+                FAPI_DBG("Skipping XBUS chiplet clock start (partial good).");
+            }
         }
 
         if (abus)
         {
-            FAPI_DBG("Starting A bus chiplet clocks ...");
-            rc = proc_start_clocks_generic_chiplet(
-                i_target,
-                A_BUS_CHIPLET_0x08000000);
-            if (rc)
+            // query ABUS partial good attribute
+            rc = FAPI_ATTR_GET(ATTR_PROC_A_ENABLE,
+                               &i_target,
+                               abus_enable_attr);
+            if (!rc.ok())
             {
+                FAPI_ERR("proc_start_clocks_chiplets: Error querying ATTR_PROC_A_ENABLE");
                 break;
             }
+
+            if (abus_enable_attr == fapi::ENUM_ATTR_PROC_A_ENABLE_ENABLE)
+            {
+                FAPI_DBG("Starting A bus chiplet clocks ...");
+                rc = proc_start_clocks_generic_chiplet(
+                    i_target,
+                    A_BUS_CHIPLET_0x08000000);
+                if (rc)
+                {
+                    FAPI_ERR("proc_start_clocks_chiplets: Error from proc_start_clocks_generic_chiplet (A)");
+                    break;
+                }
+            }
+            else
+            {
+                FAPI_DBG("Skipping ABUS chiplet clock start (partial good).");
+            }
         }
 
         if (pcie)
         {
-            FAPI_DBG("Starting PCIE chiplet clocks ...");
-            rc = proc_start_clocks_generic_chiplet(
-                i_target,
-                PCIE_CHIPLET_0x09000000);
-            if (rc)
+            // query PCIE partial good attribute
+            rc = FAPI_ATTR_GET(ATTR_PROC_PCIE_ENABLE,
+                               &i_target,
+                               pcie_enable_attr);
+            if (!rc.ok())
             {
+                FAPI_ERR("proc_start_clocks_chiplets: Error querying ATTR_PROC_PCIE_ENABLE");
                 break;
             }
+
+            if (pcie_enable_attr == fapi::ENUM_ATTR_PROC_PCIE_ENABLE_ENABLE)
+            {
+                FAPI_DBG("Starting PCIE chiplet clocks ...");
+                rc = proc_start_clocks_generic_chiplet(
+                    i_target,
+                    PCIE_CHIPLET_0x09000000);
+                if (rc)
+                {
+                    FAPI_ERR("proc_start_clocks_chiplets: Error from proc_start_clocks_generic_chiplet (PCIE)");
+                    break;
+                }
+            }
+            else
+            {
+                FAPI_DBG("Skipping PCIE chiplet clock start (partial good).");
+            }
         }
 
     } while (0);