TULETA Bring Up - P8 HW procedure update 04/10/2013

SW197152

Change-Id: I82540a5ee1be3fcb5c6cb64d07dadd9e1c54a4ac
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/4005
Tested-by: Jenkins Server
Reviewed-by: Van H. Lee <vanlee@us.ibm.com>
Reviewed-by: MIKE J. JONES <mjjones@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

2 files changed, 44 insertions, 4 deletions

diff --git a/src/usr/hwpf/hwp/nest_chiplets/proc_pcie_scominit/proc_pcie_scominit.C b/src/usr/hwpf/hwp/nest_chiplets/proc_pcie_scominit/proc_pcie_scominit.C
index 110e29a3d..085e110a6 100644
--- a/src/usr/hwpf/hwp/nest_chiplets/proc_pcie_scominit/proc_pcie_scominit.C
+++ b/src/usr/hwpf/hwp/nest_chiplets/proc_pcie_scominit/proc_pcie_scominit.C
@@ -20,7 +20,7 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: proc_pcie_scominit.C,v 1.5 2013/02/19 23:26:52 jmcgill Exp $
+// $Id: proc_pcie_scominit.C,v 1.6 2013/04/08 14:57:39 jmcgill Exp $
 // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_pcie_scominit.C,v $
 //------------------------------------------------------------------------------
 // *! (C) Copyright International Business Machines Corp. 2012
@@ -360,6 +360,35 @@ fapi::ReturnCode proc_pcie_scominit_iop_complete(
         {
             break;
         }
+
+        // form ETU reset data buffer
+        rc_ecmd |= data.flushTo0();
+        if (rc_ecmd)
+        {
+            FAPI_ERR("proc_pcie_scominit_iop_complete: Error 0x%x setting up ETU reset register data buffer",
+                     rc_ecmd);
+            rc.setEcmdError(rc_ecmd);
+            break;
+        }
+
+        // clear ETU reset
+        for (size_t i = 0; (i < PROC_PCIE_SCOMINIT_NUM_PHB); i++)
+        {
+            rc = fapiPutScom(i_target,
+                             PROC_PCIE_SCOMINIT_ETU_RESET[i],
+                             data);
+            if (!rc.ok())
+            {
+                FAPI_ERR("proc_pcie_scominit_iop_complete: Error from fapiPutScom (PCIE%d_ETU_RESET_0x%016llX)",
+                          i, PROC_PCIE_SCOMINIT_ETU_RESET[i]);
+                break;
+            }
+        }
+        if (!rc.ok())
+        {
+            break;
+        }
+
     } while(0);
 
     // mark function exit
diff --git a/src/usr/hwpf/hwp/nest_chiplets/proc_pcie_scominit/proc_pcie_scominit.H b/src/usr/hwpf/hwp/nest_chiplets/proc_pcie_scominit/proc_pcie_scominit.H
index b829a4439..a57646d40 100644
--- a/src/usr/hwpf/hwp/nest_chiplets/proc_pcie_scominit/proc_pcie_scominit.H
+++ b/src/usr/hwpf/hwp/nest_chiplets/proc_pcie_scominit/proc_pcie_scominit.H
@@ -20,7 +20,7 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: proc_pcie_scominit.H,v 1.2 2013/02/04 23:58:46 jmcgill Exp $
+// $Id: proc_pcie_scominit.H,v 1.3 2013/04/08 14:57:41 jmcgill Exp $
 // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_pcie_scominit.H,v $
 //------------------------------------------------------------------------------
 // *! (C) Copyright International Business Machines Corp. 2012
@@ -28,7 +28,8 @@
 // *! *** IBM Confidential ***
 //------------------------------------------------------------------------------
 // *! TITLE       : proc_pcie_scominit.H
-// *! DESCRIPTION : Perform PCIe Physical IO Inits (Phase 1, Steps 1-9) (FAPI)
+// *! DESCRIPTION : Perform PCIe Physical IO Inits (Phase 1, Steps 1-9 &
+// *!               Phase 2, Step 33) (FAPI)
 // *!
 // *! OWNER NAME  : Joe McGill        Email: jmcgill@us.ibm.com
 // *!
@@ -38,6 +39,7 @@
 // *!   Remove active IOPs from reset
 // *!   Perform IOP overrides/customization
 // *!   Mark IOP programming complete
+// *!   Remove ETU reset
 // *!
 //------------------------------------------------------------------------------
 
@@ -95,6 +97,15 @@ const uint32_t PCIE_GP4_IOP_SWAP_END_BIT[PROC_PCIE_SCOMINIT_NUM_IOP] =
     55
 };
 
+// ETU Reset register field/bit definitions
+const uint32_t PROC_PCIE_SCOMINIT_ETU_RESET[PROC_PCIE_SCOMINIT_NUM_PHB] =
+{
+    PCIE0_ETU_RESET_0x0901200A,
+    PCIE1_ETU_RESET_0x0901240A,
+    PCIE2_ETU_RESET_0x0901280A
+};
+const uint32_t ETU_RESET_GLOBAL_RESET_BIT = 0;
+
 // Murano/Venice support lane configurations bewtween 0x0 & 0xC,
 // swap values between 0x0 & 0x7
 const uint8_t PCIE_GP4_IOP_LANE_CFG_MAX = 0xC;
@@ -105,7 +116,7 @@ const uint8_t PCIE_GP4_IOP_SWAP_MAX = 0x7;
 const uint64_t PROC_PCIE_SCOMINIT_PLL_GLOBAL_CONTROL2[PROC_PCIE_SCOMINIT_NUM_IOP] =
 {
     PCIE_IOP0_PLL_GLOBAL_CONTROL2_0x8000080A0901143F,
-    PCIE_IOP1_PLL_GLOBAL_CONTROL2_0x8000080A0901187F,
+    PCIE_IOP1_PLL_GLOBAL_CONTROL2_0x8000080A0901187F
 };
 const uint32_t PLL_GLOBAL_CONTROL2_PROG_COMPLETE_BIT = 50;