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author | Thi Tran <thi@us.ibm.com> | 2014-01-08 08:07:11 -0600 |
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committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2014-01-08 11:59:45 -0600 |
commit | ca2e1f088903168fcf7ef766ce9201681105081e (patch) | |
tree | 2347c70b59a3043af51d16ee9301b8740d48ea71 /src/usr/hwpf/hwp/nest_chiplets/proc_pcie_scominit/proc_pcie_scominit_attributes.xml | |
parent | f3e453363fa9e92146a4bf578c8aab9f44af3933 (diff) | |
download | talos-hostboot-ca2e1f088903168fcf7ef766ce9201681105081e.tar.gz talos-hostboot-ca2e1f088903168fcf7ef766ce9201681105081e.zip |
INITPROC: Hostboot SW239813 FIR_STATUS_REG_ZCAL_B_ERR_STATUS
Change-Id: I467998d836518bee40aad32223d9e625e7f41912
CQ:SW239813
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/7943
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/hwpf/hwp/nest_chiplets/proc_pcie_scominit/proc_pcie_scominit_attributes.xml')
-rw-r--r-- | src/usr/hwpf/hwp/nest_chiplets/proc_pcie_scominit/proc_pcie_scominit_attributes.xml | 36 |
1 files changed, 34 insertions, 2 deletions
diff --git a/src/usr/hwpf/hwp/nest_chiplets/proc_pcie_scominit/proc_pcie_scominit_attributes.xml b/src/usr/hwpf/hwp/nest_chiplets/proc_pcie_scominit/proc_pcie_scominit_attributes.xml index ec9f8332b..013defb11 100644 --- a/src/usr/hwpf/hwp/nest_chiplets/proc_pcie_scominit/proc_pcie_scominit_attributes.xml +++ b/src/usr/hwpf/hwp/nest_chiplets/proc_pcie_scominit/proc_pcie_scominit_attributes.xml @@ -5,7 +5,7 @@ <!-- --> <!-- IBM CONFIDENTIAL --> <!-- --> -<!-- COPYRIGHT International Business Machines Corp. 2012,2013 --> +<!-- COPYRIGHT International Business Machines Corp. 2012,2014 --> <!-- --> <!-- p1 --> <!-- --> @@ -20,7 +20,7 @@ <!-- Origin: 30 --> <!-- --> <!-- IBM_PROLOG_END_TAG --> -<!-- $Id: proc_pcie_scominit_attributes.xml,v 1.5 2013/09/23 15:21:15 jmcgill Exp $ --> +<!-- $Id: proc_pcie_scominit_attributes.xml,v 1.6 2013/12/09 21:52:08 jmcgill Exp $ --> <!-- proc_pcie_scominit_attributes.xml --> <attributes> <!-- ********************************************************************* --> @@ -285,6 +285,38 @@ </attribute> <!-- ********************************************************************* --> <attribute> + <id>ATTR_PROC_PCIE_IOP_TX_FFE_GEN1</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + creator: platform (MRW) + consumer: proc_pcie_scominit + notes: + PCIe TX FFE (Gen1) + First array index: IOP number (0:1) + Second array index: Lane number (0:15) + </description> + <valueType>uint32</valueType> + <array>2,16</array> + <platInit/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_PROC_PCIE_IOP_TX_FFE_GEN2</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + creator: platform (MRW) + consumer: proc_pcie_scominit + notes: + PCIe TX FFE (Gen2) + First array index: IOP number (0:1) + Second array index: Lane number (0:15) + </description> + <valueType>uint32</valueType> + <array>2,16</array> + <platInit/> + </attribute> + <!-- ********************************************************************* --> + <attribute> <id>ATTR_PROC_PCIE_IOP_ZCAL_CONTROL</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> |