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authorThi Tran <thi@us.ibm.com>2013-03-03 13:02:38 -0600
committerA. Patrick Williams III <iawillia@us.ibm.com>2013-03-05 12:18:09 -0600
commit2cd51b10fa1bf295a8b3b35553226aab5d103af7 (patch)
treeaa256b43d22b0b85b36ecaea8dc0140ff8f02bca /src/usr/hwpf/hwp/mc_config
parent6e96f79fbadb624ef2aac82c6f2e4743291c5dd7 (diff)
downloadtalos-hostboot-2cd51b10fa1bf295a8b3b35553226aab5d103af7.tar.gz
talos-hostboot-2cd51b10fa1bf295a8b3b35553226aab5d103af7.zip
TULETA Bring Up - HW procedures update 03/03/2013
Revert io_run_training to 1.28 Update from review comment Change-Id: I2c94f24e3818ae1ffc6c629a5e904681e70205e2 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3405 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/hwpf/hwp/mc_config')
-rw-r--r--src/usr/hwpf/hwp/mc_config/makefile33
-rw-r--r--src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_config.C28
-rw-r--r--src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_config_shmoo.C117
-rw-r--r--src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_config_shmoo.H73
-rw-r--r--src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_grouping.C149
-rw-r--r--src/usr/hwpf/hwp/mc_config/mss_freq/mss_freq.C79
6 files changed, 407 insertions, 72 deletions
diff --git a/src/usr/hwpf/hwp/mc_config/makefile b/src/usr/hwpf/hwp/mc_config/makefile
index 821bdfcb9..f0a7fc5eb 100644
--- a/src/usr/hwpf/hwp/mc_config/makefile
+++ b/src/usr/hwpf/hwp/mc_config/makefile
@@ -1,25 +1,25 @@
-# IBM_PROLOG_BEGIN_TAG
-# This is an automatically generated prolog.
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
#
-# $Source: src/usr/hwpf/hwp/mc_config/makefile $
+# $Source: src/usr/hwpf/hwp/mc_config/makefile $
#
-# IBM CONFIDENTIAL
+# IBM CONFIDENTIAL
#
-# COPYRIGHT International Business Machines Corp. 2012
+# COPYRIGHT International Business Machines Corp. 2012,2013
#
-# p1
+# p1
#
-# Object Code Only (OCO) source materials
-# Licensed Internal Code Source Materials
-# IBM HostBoot Licensed Internal Code
+# Object Code Only (OCO) source materials
+# Licensed Internal Code Source Materials
+# IBM HostBoot Licensed Internal Code
#
-# The source code for this program is not published or other-
-# wise divested of its trade secrets, irrespective of what has
-# been deposited with the U.S. Copyright Office.
+# The source code for this program is not published or otherwise
+# divested of its trade secrets, irrespective of what has been
+# deposited with the U.S. Copyright Office.
#
-# Origin: 30
+# Origin: 30
#
-# IBM_PROLOG_END_TAG
+# IBM_PROLOG_END_TAG
ROOTPATH = ../../../../..
MODULE = mc_config
@@ -51,8 +51,9 @@ OBJS = mc_config.o \
mss_eff_config_rank_group.o \
mss_eff_config_cke_map.o \
mss_bulk_pwr_throttles.o \
- mss_throttle_to_power.o
-
+ mss_throttle_to_power.o \
+ mss_eff_config_shmoo.o
+
## NOTE: add a new directory onto the vpaths when you add a new HWP
##@ VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/???
VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/mc_config/mss_eff_config
diff --git a/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_config.C b/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_config.C
index 2152d137e..6a2547e9e 100644
--- a/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_config.C
+++ b/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_config.C
@@ -20,7 +20,7 @@
/* Origin: 30 */
/* */
/* IBM_PROLOG_END_TAG */
-// $Id: mss_eff_config.C,v 1.16 2013/01/24 18:33:16 bellows Exp $
+// $Id: mss_eff_config.C,v 1.20 2013/02/28 21:36:08 asaetow Exp $
// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/
// centaur/working/procedures/ipl/fapi/mss_eff_config.C,v $
//------------------------------------------------------------------------------
@@ -44,7 +44,12 @@
//------------------------------------------------------------------------------
// Version:| Author: | Date: | Comment:
//---------|----------|---------|-----------------------------------------------
-// 1.17 | | |
+// 1.21 | | |
+// 1.20 | asaetow |28-Feb-13| Changed temporary ATTR_EFF_ZQCAL_INTERVAL and ATTR_EFF_MEMCAL_INTERVAL to disable.
+// | | | NOTE: Temporary until we get timeout error fixed.
+// 1.19 | sauchadh |26-Feb-13| Added MCBIST related attributes
+// 1.18 | asaetow |12-FEB-13| Changed eff_dram_tdqs from 1 to 0.
+// 1.17 | asaetow |30-JAN-13| Changed "ATTR_SPD_MODULE_TYPE_CDIMM is obsolete..." message from error to warning.
// 1.16 | bellows |24-JAN-13| Added in CUSTOM bit of SPD and CUSTOM Attr
// | | | settings.
// 1.15 | asaetow |15-NOV-12| Added call to mss_eff_config_cke_map().
@@ -128,6 +133,8 @@
#include <mss_eff_config_cke_map.H>
#include <mss_eff_config_termination.H>
#include <mss_eff_config_thermal.H>
+#include <mss_eff_config_shmoo.H>
+
//------------------------------------------------------------------------------
// Includes
@@ -1083,7 +1090,7 @@ fapi::ReturnCode mss_eff_config_setup_eff_atts(
{
case fapi::ENUM_ATTR_SPD_MODULE_TYPE_CDIMM:
p_o_atts->eff_dimm_type = fapi::ENUM_ATTR_EFF_DIMM_TYPE_CDIMM;
- FAPI_ERR("ATTR_SPD_MODULE_TYPE_CDIMM is obsolete. Check your VPD for correct definition on %s!", i_target_mba.toEcmdString());
+ FAPI_INF("WARNING: ATTR_SPD_MODULE_TYPE_CDIMM is obsolete. Check your VPD for correct definition on %s!", i_target_mba.toEcmdString());
break;
case fapi::ENUM_ATTR_SPD_MODULE_TYPE_RDIMM:
p_o_atts->eff_dimm_type = fapi::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM;
@@ -1185,7 +1192,7 @@ fapi::ReturnCode mss_eff_config_setup_eff_atts(
{
p_o_atts->eff_dram_width = fapi::ENUM_ATTR_EFF_DRAM_WIDTH_X8;
// NOTE: TDQS enable MR1(A11) is only avaliable for X8 in DDR3
- p_o_atts->eff_dram_tdqs = 1;
+ p_o_atts->eff_dram_tdqs = 0;
}
else if (p_i_data->dram_width[0][0]
== fapi::ENUM_ATTR_SPD_DRAM_WIDTH_W16)
@@ -1518,12 +1525,16 @@ fapi::ReturnCode mss_eff_config_setup_eff_atts(
// 0.5
// ------------------------------ = 13.333ms
// (1.5 * 10) + (0.15 * 150)
- p_o_atts->eff_zqcal_interval = ( 13333 *
- p_i_mss_eff_config_data->mss_freq) / 2;
+
+ p_o_atts->eff_zqcal_interval = 0;
+ //p_o_atts->eff_zqcal_interval = ( 13333 *
+ // p_i_mss_eff_config_data->mss_freq) / 2;
//------------------------------------------------------------------------------
// Calculate MEMCAL Interval based on 1sec interval across all bits per DP18
- p_o_atts->eff_memcal_interval = (62500 *
- p_i_mss_eff_config_data->mss_freq) / 2;
+
+ p_o_atts->eff_memcal_interval = 0;
+ //p_o_atts->eff_memcal_interval = (62500 *
+ // p_i_mss_eff_config_data->mss_freq) / 2;
//------------------------------------------------------------------------------
// Calculate tRFI
p_o_atts->eff_dram_trfi = (3900 *
@@ -2075,6 +2086,7 @@ fapi::ReturnCode mss_eff_config(const fapi::Target i_target_mba)
rc = mss_eff_config_cke_map(i_target_mba); if(rc) break;
rc = mss_eff_config_termination(i_target_mba); if(rc) break;
rc = mss_eff_config_thermal(i_target_mba); if(rc) break;
+ rc = mss_eff_config_shmoo(i_target_mba); if(rc) break;
FAPI_INF("%s on %s COMPLETE\n", PROCEDURE_NAME,
diff --git a/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_config_shmoo.C b/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_config_shmoo.C
new file mode 100644
index 000000000..ed3c8fb90
--- /dev/null
+++ b/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_config_shmoo.C
@@ -0,0 +1,117 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_config_shmoo.C $ */
+/* */
+/* IBM CONFIDENTIAL */
+/* */
+/* COPYRIGHT International Business Machines Corp. 2013 */
+/* */
+/* p1 */
+/* */
+/* Object Code Only (OCO) source materials */
+/* Licensed Internal Code Source Materials */
+/* IBM HostBoot Licensed Internal Code */
+/* */
+/* The source code for this program is not published or otherwise */
+/* divested of its trade secrets, irrespective of what has been */
+/* deposited with the U.S. Copyright Office. */
+/* */
+/* Origin: 30 */
+/* */
+/* IBM_PROLOG_END_TAG */
+// $Id: mss_eff_config_shmoo.C,v 1.1 2013/02/26 12:38:20 lapietra Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/centaur/working/procedures/ipl/fapi/mss_eff_config_shmoo.C,v $
+//------------------------------------------------------------------------------
+// *! (C) Copyright International Business Machines Corp. 2011
+// *! All Rights Reserved -- Property of IBM
+// *! *** IBM Confidential ***
+//------------------------------------------------------------------------------
+// *! TITLE : mss_eff_config_shmoo
+// *! DESCRIPTION : Additional attributes for MCBIST
+// *! OWNER NAME : Saurabh Chadha Email: sauchadh@in.ibm.com
+// *! BACKUP NAME : Email:
+// *! ADDITIONAL COMMENTS :
+//
+//------------------------------------------------------------------------------
+// Don't forget to create CVS comments when you check in your changes!
+//------------------------------------------------------------------------------
+// CHANGE HISTORY:
+//------------------------------------------------------------------------------
+// Version:| Author: | Date: | Comment:
+//---------|----------|---------|-----------------------------------------------
+// 1.1 | sauchadh |26-Feb-13| Added MCBIST related attributes
+
+
+
+//----------------------------------------------------------------------
+// My Includes
+//----------------------------------------------------------------------
+
+
+
+//----------------------------------------------------------------------
+// Includes
+//----------------------------------------------------------------------
+#include <fapi.H>
+
+
+extern "C" {
+
+
+
+//******************************************************************************
+//* name=mss_eff_config_shmoo, param=i_target_mba, return=ReturnCode
+//******************************************************************************
+fapi::ReturnCode mss_eff_config_shmoo(const fapi::Target i_target_mba) {
+ fapi::ReturnCode rc = fapi::FAPI_RC_SUCCESS;
+ const char * const PROCEDURE_NAME = "mss_eff_config_shmoo";
+ FAPI_INF("*** Running %s on %s ... ***", PROCEDURE_NAME, i_target_mba.toEcmdString());
+
+ uint32_t datapattern=8;
+ uint32_t testtype=1;
+ uint8_t addr_modes=0;
+ uint8_t rank=0;
+ uint64_t start_addr=0;
+ uint64_t end_addr=0;
+ uint8_t error_capture=0;
+ uint64_t max_timeout=0;
+ uint8_t print_port=0;
+ uint8_t stop_on_error=0;
+ uint32_t data_seed=0;
+ uint8_t addr_inter=0;
+ uint8_t addr_num_rows=0;
+ uint8_t addr_num_cols=0;
+ uint8_t addr_rank=0;
+ uint8_t addr_bank=0;
+ uint8_t addr_slave_rank_on=0;
+ uint64_t adr_str_map=0;
+ uint8_t addr_rand=0;
+
+ rc = FAPI_ATTR_SET(ATTR_MCBIST_PATTERN, &i_target_mba, datapattern); if(rc) return rc;
+ rc = FAPI_ATTR_SET(ATTR_MCBIST_TEST_TYPE, &i_target_mba, testtype); if(rc) return rc;
+ rc = FAPI_ATTR_SET(ATTR_MCBIST_ADDR_MODES, &i_target_mba, addr_modes); if(rc) return rc;
+ rc = FAPI_ATTR_SET(ATTR_MCBIST_RANK, &i_target_mba, rank); if(rc) return rc;
+ rc = FAPI_ATTR_SET(ATTR_MCBIST_START_ADDR, &i_target_mba, start_addr); if(rc) return rc;
+ rc = FAPI_ATTR_SET(ATTR_MCBIST_END_ADDR, &i_target_mba, end_addr); if(rc) return rc;
+ rc = FAPI_ATTR_SET(ATTR_MCBIST_ERROR_CAPTURE, &i_target_mba, error_capture); if(rc) return rc;
+ rc = FAPI_ATTR_SET(ATTR_MCBIST_MAX_TIMEOUT, &i_target_mba, max_timeout); if(rc) return rc;
+ rc = FAPI_ATTR_SET(ATTR_MCBIST_PRINT_PORT, &i_target_mba, print_port); if(rc) return rc;
+ rc = FAPI_ATTR_SET(ATTR_MCBIST_STOP_ON_ERROR, &i_target_mba, stop_on_error); if(rc) return rc;
+ rc = FAPI_ATTR_SET(ATTR_MCBIST_DATA_SEED, &i_target_mba, data_seed); if(rc) return rc;
+ rc = FAPI_ATTR_SET(ATTR_MCBIST_ADDR_INTER, &i_target_mba, addr_inter); if(rc) return rc;
+ rc = FAPI_ATTR_SET(ATTR_MCBIST_ADDR_NUM_ROWS, &i_target_mba, addr_num_rows); if(rc) return rc;
+ rc = FAPI_ATTR_SET(ATTR_MCBIST_ADDR_NUM_COLS, &i_target_mba, addr_num_cols); if(rc) return rc;
+ rc = FAPI_ATTR_SET(ATTR_MCBIST_ADDR_RANK, &i_target_mba, addr_rank); if(rc) return rc;
+ rc = FAPI_ATTR_SET(ATTR_MCBIST_ADDR_BANK, &i_target_mba, addr_bank); if(rc) return rc;
+ rc = FAPI_ATTR_SET(ATTR_MCBIST_ADDR_SLAVE_RANK_ON, &i_target_mba, addr_slave_rank_on); if(rc) return rc;
+ rc = FAPI_ATTR_SET(ATTR_MCBIST_ADDR_STR_MAP, &i_target_mba, adr_str_map); if(rc) return rc;
+ rc = FAPI_ATTR_SET(ATTR_MCBIST_ADDR_RAND, &i_target_mba, addr_rand); if(rc) return rc;
+
+ FAPI_INF("%s on %s COMPLETE", PROCEDURE_NAME, i_target_mba.toEcmdString());
+ return rc;
+}
+
+
+
+} // extern "C"
diff --git a/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_config_shmoo.H b/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_config_shmoo.H
new file mode 100644
index 000000000..7ea67d5e1
--- /dev/null
+++ b/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_config_shmoo.H
@@ -0,0 +1,73 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_config_shmoo.H $ */
+/* */
+/* IBM CONFIDENTIAL */
+/* */
+/* COPYRIGHT International Business Machines Corp. 2013 */
+/* */
+/* p1 */
+/* */
+/* Object Code Only (OCO) source materials */
+/* Licensed Internal Code Source Materials */
+/* IBM HostBoot Licensed Internal Code */
+/* */
+/* The source code for this program is not published or otherwise */
+/* divested of its trade secrets, irrespective of what has been */
+/* deposited with the U.S. Copyright Office. */
+/* */
+/* Origin: 30 */
+/* */
+/* IBM_PROLOG_END_TAG */
+// $Id: mss_eff_config_shmoo.H,v 1.1 2013/02/26 12:38:36 lapietra Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/centaur/working/procedures/ipl/fapi/mss_eff_config_shmoo.H,v $
+//------------------------------------------------------------------------------
+// *! (C) Copyright International Business Machines Corp. 2011
+// *! All Rights Reserved -- Property of IBM
+// *! *** IBM Confidential ***
+//------------------------------------------------------------------------------
+// *! TITLE : mss_eff_config_shmoo.H
+// *! DESCRIPTION : Header file for mss_eff_config_shmoo.C
+// *! OWNER NAME : Saurabh Chadha Email: sauchadh@in.ibm.com
+// *! BACKUP NAME : Email:
+// *! ADDITIONAL COMMENTS :
+//
+//
+//
+//------------------------------------------------------------------------------
+// Don't forget to create CVS comments when you check in your changes!
+//------------------------------------------------------------------------------
+// CHANGE HISTORY:
+//------------------------------------------------------------------------------
+// Version:| Author: | Date: | Comment:
+//---------|----------|---------|-----------------------------------------------
+// 1.1 | sauchadh |26-Feb-13| First Draft
+
+
+#ifndef MSS_EFF_CONFIG_SHMOO_H_
+#define MSS_EFF_CONFIG_SHMOO_H_
+
+//----------------------------------------------------------------------
+// My Includes
+//----------------------------------------------------------------------
+
+
+//----------------------------------------------------------------------
+// Includes
+//----------------------------------------------------------------------
+#include <fapi.H>
+
+
+typedef fapi::ReturnCode (*mss_eff_config_shmoo_FP_t)(const fapi::Target i_target_mba);
+
+extern "C" {
+
+//******************************************************************************
+//* name=mss_eff_config_shmoo, param=i_target_mba, return=ReturnCode
+//******************************************************************************
+fapi::ReturnCode mss_eff_config_shmoo(const fapi::Target i_target_mba);
+
+} // extern "C"
+
+#endif // MSS_EFF_CONFIG_SHMOO_H_
diff --git a/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_grouping.C b/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_grouping.C
index 48c356339..9a9d7e674 100644
--- a/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_grouping.C
+++ b/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_grouping.C
@@ -5,7 +5,7 @@
/* */
/* IBM CONFIDENTIAL */
/* */
-/* COPYRIGHT International Business Machines Corp. 2012 */
+/* COPYRIGHT International Business Machines Corp. 2012,2013 */
/* */
/* p1 */
/* */
@@ -20,7 +20,7 @@
/* Origin: 30 */
/* */
/* IBM_PROLOG_END_TAG */
-// $Id: mss_eff_grouping.C,v 1.16 2012/12/14 08:41:20 gpaulraj Exp $
+// $Id: mss_eff_grouping.C,v 1.18 2013/02/01 23:38:22 asaetow Exp $
//------------------------------------------------------------------------------
// *! (C) Copyright International Business Machines Corp. 2011
// *! All Rights Reserved -- Property of IBM
@@ -38,7 +38,10 @@
//------------------------------------------------------------------------------
// Version:| Author: | Date: | Comment:
//---------|----------|---------|-----------------------------------------------
-// 1.16 | gpaulraj | 12-14-12| Modified "unable to group dimm size" as Error message
+// 1.18 | asaetow | 02-01-13| Removed FAPI_ERR("Mirror Base address overlaps with memory base address. "); temporarily.
+// | | | NOTE: Need Giri to check mirroring enable before checking for overlaps.
+// 1.17 | gpaulraj | 01-31-13| Error place holders added
+// 1.16 | gpaulraj | 12-14-12| Modified "nnable to group dimm size" as Error message
// 1.15 | bellows | 12-11-12| Picked up latest updates from Girisankar
// 1.14 | bellows | 12-11-12| added ; to DBG line
// 1.13 | bellows | 12-07-12| fix for interleaving attr and array bounds
@@ -230,8 +233,45 @@ extern "C" {
rc = FAPI_ATTR_GET(ATTR_ALL_MCS_IN_INTERLEAVING_GROUP, NULL,check_board); // system level attribute
if (!rc.ok()) { FAPI_ERR("Error reading ATTR_ALL_MCS_IN_INTERLEAVING_GROUP"); return rc; }
+ if(check_board)
+ {
+ if((groups_allowed & 0x02) || (groups_allowed & 0x04)||(groups_allowed & 0x08))
+ {
+ FAPI_INF("FABRIC IS IN NON-CHECKER BOARD MODE.");
+ FAPI_INF("FABRIC SUPPORTS THE FOLLOWING ");
+//@thi - Already asked Anuwat to fix this
+ if( (groups_allowed & 0x02)&& check_board){FAPI_INF("2MCS/GROUP");}
+ if( (groups_allowed & 0x04)&& check_board){FAPI_INF("4MCS/GROUP");}
+ if( (groups_allowed & 0x08)&& check_board){FAPI_INF("8MCS/GROUP");}
+ FAPI_INF("FABRIC DOES NOT SUPPORT THE FOLLOWING ");
+ if(! ((groups_allowed & 0x01)&& !check_board)){FAPI_INF("1MCS/GROUP");}
+ if(!((groups_allowed & 0x02)&& check_board)){FAPI_INF("2MCS/GROUP");}
+ if(!((groups_allowed & 0x04)&& check_board)){FAPI_INF("4MCS/GROUP");}
+ if(!((groups_allowed & 0x08)&& check_board)){FAPI_INF("8MCS/GROUP");}
+ }
+ else
+ {
+ FAPI_ERR("UNABLE TO GROUP");
+ FAPI_ERR("FABRIC IS IN NON-CHECKER BOARD MODE. SET ATTRIBUTE 'ATTR_MSS_INTERLEAVE_ENABLE' TO SUPPORT '2MCS/GROUP, 4MCS/GROUP AND 8MCS/GROUP'. OR ENABLE CHECKER BOARD, TO SUPPORT '1MCS/GROUP'. ");
+ FAPI_SET_HWP_ERROR(rc, RC_MSS_PLACE_HOLDER_ERROR);
+ return rc;
+ }
+ }
+ else
+ {
+ if(groups_allowed & 0x01) {
+ FAPI_INF("FABRIC IS IN CHECKER BOARD MODE AND IT SUPPORTS 1MCS/GROUP"); }
+ else {
+ FAPI_ERR("UNABLE TO GROUP");
+ FAPI_ERR("FABRIC IS IN CHECKER BOARD MODE BUT IT DOES NOT SUPPORT 1MCS/GROUP. SET ATTRIBUTE 'ATTR_MSS_INTERLEAVE_ENABLE' TO SUPPORT '1MCS/GROUP'. OR DISABLE CHECKER BOARD, TO SUPPORT '2MCS/GROUP, 4MCS/GROUP AND 8MCS/GROUP'.");
+ FAPI_SET_HWP_ERROR(rc, RC_MSS_PLACE_HOLDER_ERROR);
+ return rc;
+ }
+
+
+ }
for(uint8_t i=0;i<16;i++)
{
grouped[i]=0;
@@ -422,15 +462,21 @@ extern "C" {
gp++;
}
}
+
}
if(!done)
- {
+ { uint8_t ungroup =0;
for(uint8_t i=0;i<8;i++)
{
if(grouped[i] !=1 && eff_grouping_data.groupID[i][0] != 0 )
- FAPI_ERR ("UNABLE TO GROUP MCS%d size is %d", i,eff_grouping_data.groupID[i][0]);
- }
+ { FAPI_ERR ("UNABLE TO GROUP MCS%d size is %d", i,eff_grouping_data.groupID[i][0]); ungroup++;}
+ }
+ if (ungroup)
+ {
+ FAPI_SET_HWP_ERROR(rc, RC_MSS_PLACE_HOLDER_ERROR);
+ return rc;
+ }
for(uint8_t i=0;i<gp;i++)
for(uint8_t j=0;j<16;j++)
eff_grouping_data.groupID[i][j]=tempgpID.groupID[i][j];
@@ -464,6 +510,7 @@ extern "C" {
uint8_t j=0;
count=0;
+ uint64_t total_size_non_mirr =0;
for(pos=0;pos<=gp_pos;pos++)
{
eff_grouping_data.groupID[pos][2] = eff_grouping_data.groupID[pos][0]*eff_grouping_data.groupID[pos][1];
@@ -484,6 +531,8 @@ extern "C" {
//eff_grouping_data.groupID[pos+8][13] = eff_grouping_data.groupID[pos][13]/2;
eff_grouping_data.groupID[pos][12] =1;
}
+
+ total_size_non_mirr += eff_grouping_data.groupID[pos][2];
}
for(i=0;i<gp_pos;i++)
{
@@ -527,6 +576,8 @@ extern "C" {
}
}
+
+
rc = FAPI_ATTR_GET(ATTR_PROC_MEM_BASE,&i_target,mss_base_address);
mss_base_address = mss_base_address >> 30;
if(!rc.ok()) return rc;
@@ -536,32 +587,58 @@ extern "C" {
if(!rc.ok()) return rc;
- for(pos=0;pos<gp_pos;pos++)
+ if( mss_base_address > (mirror_base + total_size_non_mirr/2) || mirror_base > (mss_base_address + total_size_non_mirr))
{
- if(pos==0)
- {
- eff_grouping_data.groupID[pos][3] =mss_base_address;
- eff_grouping_data.groupID[pos+8][3]=mirror_base; //mirrored base address
- if(eff_grouping_data.groupID[pos][12])
+ for(pos=0;pos<gp_pos;pos++)
{
+ if(pos==0)
+ {
- eff_grouping_data.groupID[pos][14] = eff_grouping_data.groupID[pos][3]+ eff_grouping_data.groupID[pos][2]/2;
- eff_grouping_data.groupID[pos+8][14] = eff_grouping_data.groupID[pos+8][3]+ eff_grouping_data.groupID[pos+8][2]/2; //mirrored base address with alternate bars
- }
- }
- else
- {
- eff_grouping_data.groupID[pos][3] = eff_grouping_data.groupID[pos-1][3]+eff_grouping_data.groupID[pos-1][2];
- eff_grouping_data.groupID[pos+8][3]= eff_grouping_data.groupID[pos-1+8][3]+eff_grouping_data.groupID[pos-1+8][2];
+ eff_grouping_data.groupID[pos][3] =mss_base_address;
- if(eff_grouping_data.groupID[pos][12])
- {
- eff_grouping_data.groupID[pos][14] = eff_grouping_data.groupID[pos][3]+ eff_grouping_data.groupID[pos][2]/2;
- eff_grouping_data.groupID[pos+8][14] = eff_grouping_data.groupID[pos+8][3]+ eff_grouping_data.groupID[pos+8][2]/2; //mirrored base address with alternate bars
+ if(eff_grouping_data.groupID[pos][12])
+ {
+
+ eff_grouping_data.groupID[pos][14] = eff_grouping_data.groupID[pos][3]+ eff_grouping_data.groupID[pos][2]/2;
+
+ }
+ }
+ else
+ {
+ eff_grouping_data.groupID[pos][3] = eff_grouping_data.groupID[pos-1][3]+eff_grouping_data.groupID[pos-1][2];
+
+
+ if(eff_grouping_data.groupID[pos][12])
+ {
+ eff_grouping_data.groupID[pos][14] = eff_grouping_data.groupID[pos][3]+ eff_grouping_data.groupID[pos][2]/2;
+
+ }
+ }
+
+ if(eff_grouping_data.groupID[pos][1]>1 )
+ {
+ eff_grouping_data.groupID[pos+8][3]=mirror_base;
+ mirror_base= mirror_base + eff_grouping_data.groupID[pos+8][2];
+ if(eff_grouping_data.groupID[pos][12])
+ {
+ eff_grouping_data.groupID[pos+8][14] = eff_grouping_data.groupID[pos+8][3]+ eff_grouping_data.groupID[pos+8][2]/2; //mirrored base address with alternate bars
+ }
+
+ }
}
- }
- }
+
+ }
+
+ // AST HERE: NOTE: Need Giri to check mirroring enable before checking for overlaps.
+ //else
+ //{
+ // FAPI_ERR("Mirror Base address overlaps with memory base address. ");
+ // FAPI_SET_HWP_ERROR(rc, RC_MSS_PLACE_HOLDER_ERROR);
+ // return rc;
+ //}
+
+
ecmdDataBufferBase MC_IN_GP(8);
uint8_t mcs_in_group[8];
for(uint8_t i=0;i<8;i++)
@@ -600,21 +677,21 @@ extern "C" {
{
if(eff_grouping_data.groupID[i][0]>0)
{
- FAPI_INF (" Group %d MCS Size %4d ",i,eff_grouping_data.groupID[i][0]);
- FAPI_INF (" No of MCS %4d ",eff_grouping_data.groupID[i][1]);
- FAPI_INF (" Group Size %4d ",eff_grouping_data.groupID[i][2]);
- FAPI_INF (" Base Add. %4d ",eff_grouping_data.groupID[i][3]);
- FAPI_INF (" Mirrored Group SIze %4d", eff_grouping_data.groupID[i+8][2]);
- FAPI_INF (" Mirror Base Add %4d", eff_grouping_data.groupID[i+8][3]);
+ FAPI_INF (" Group %d MCS Size %4dGB",i,eff_grouping_data.groupID[i][0]);
+ FAPI_INF (" No of MCS %4d ",eff_grouping_data.groupID[i][1]);
+ FAPI_INF (" Group Size %4dGB",eff_grouping_data.groupID[i][2]);
+ FAPI_INF (" Base Add. %4dGB ",eff_grouping_data.groupID[i][3]);
+ FAPI_INF (" Mirrored Group SIze %4dGB", eff_grouping_data.groupID[i+8][2]);
+ FAPI_INF (" Mirror Base Add %4dGB" , eff_grouping_data.groupID[i+8][3]);
for(uint8_t j=4;j<4+eff_grouping_data.groupID[i][1];j++)
{
FAPI_INF (" MCSID%d- Pos %4d",(j-4),eff_grouping_data.groupID[i][j]);
}
FAPI_INF (" Alter-bar %4d",eff_grouping_data.groupID[i][12]);
- FAPI_INF("Alter-bar base add = %4d",eff_grouping_data.groupID[i][14]);
- FAPI_INF("Alter-bar size = %4d",eff_grouping_data.groupID[i][13]);
- FAPI_INF("Alter-bar Mirrored Base add = %4d", eff_grouping_data.groupID[i+8][14]);
- FAPI_INF("Alter-bar Mirrored size = %4d", eff_grouping_data.groupID[i+8][13]);
+ FAPI_INF("Alter-bar base add = %4dGB ",eff_grouping_data.groupID[i][14]);
+ FAPI_INF("Alter-bar size = %4dGB",eff_grouping_data.groupID[i][13]);
+ FAPI_INF("Alter-bar Mirrored Base add = %4dGB ", eff_grouping_data.groupID[i+8][14]);
+ FAPI_INF("Alter-bar Mirrored size = %4dGB", eff_grouping_data.groupID[i+8][13]);
}
else
{
diff --git a/src/usr/hwpf/hwp/mc_config/mss_freq/mss_freq.C b/src/usr/hwpf/hwp/mc_config/mss_freq/mss_freq.C
index cfaec3cc1..887428dff 100644
--- a/src/usr/hwpf/hwp/mc_config/mss_freq/mss_freq.C
+++ b/src/usr/hwpf/hwp/mc_config/mss_freq/mss_freq.C
@@ -5,7 +5,7 @@
/* */
/* IBM CONFIDENTIAL */
/* */
-/* COPYRIGHT International Business Machines Corp. 2012 */
+/* COPYRIGHT International Business Machines Corp. 2012,2013 */
/* */
/* p1 */
/* */
@@ -20,7 +20,7 @@
/* Origin: 30 */
/* */
/* IBM_PROLOG_END_TAG */
-// $Id: mss_freq.C,v 1.18 2012/09/07 22:22:08 jdsloat Exp $
+// $Id: mss_freq.C,v 1.20 2013/02/12 15:20:47 jdsloat Exp $
/* File mss_volt.C created by JEFF SABROWSKI on Fri 21 Oct 2011. */
//------------------------------------------------------------------------------
@@ -58,6 +58,8 @@
// 1.16 | jdsloat | 06/08/12 | Updates per Firware request
// 1.17 | bellows | 07/16/12 | added in Id tag
// 1.18 | jdsloat | 09/07/12 | Added FTB offset to TAA and TCK
+// 1.19 | jdsloat | 01/30/13 | Added Check for l_spd_min_tck_max
+// 1.20 | jdsloat | 02/12/13 | Added path for freq_override
//
// This procedure takes CENTAUR as argument. for each DIMM (under each MBA)
// DIMM SPD attributes are read to determine optimal DRAM frequency
@@ -122,6 +124,8 @@ fapi::ReturnCode mss_freq(const fapi::Target &i_target_memb)
uint8_t module_type_all = 0;
uint8_t num_ranks = 0;
uint8_t num_ranks_total = 0;
+ uint32_t l_freq_override = 0;
+ uint8_t l_override_path = 0;
// Get associated MBA's on this centaur
l_rc=fapiGetChildChiplets(i_target_memb, fapi::TARGET_TYPE_MBA_CHIPLET, l_mbaChiplets);
@@ -177,49 +181,49 @@ fapi::ReturnCode mss_freq(const fapi::Target &i_target_memb)
break;
}
- l_rc = FAPI_ATTR_GET(ATTR_MBA_PORT, &l_dimm_targets[j], cur_mba_port); if(l_rc) return l_rc;
+ l_rc = FAPI_ATTR_GET(ATTR_MBA_PORT, &l_dimm_targets[j], cur_mba_port);
if (l_rc)
{
FAPI_ERR("Unable to read the Port Info in order to determine configuration.");
break;
}
- l_rc = FAPI_ATTR_GET(ATTR_MBA_DIMM, &l_dimm_targets[j], cur_mba_dimm); if(l_rc) return l_rc;
+ l_rc = FAPI_ATTR_GET(ATTR_MBA_DIMM, &l_dimm_targets[j], cur_mba_dimm);
if (l_rc)
{
FAPI_ERR("Unable to read the DIMM Info in order to determine configuration.");
break;
}
- l_rc = FAPI_ATTR_GET(ATTR_SPD_MODULE_TYPE, &l_dimm_targets[j], module_type); if(l_rc) return l_rc;
+ l_rc = FAPI_ATTR_GET(ATTR_SPD_MODULE_TYPE, &l_dimm_targets[j], module_type);
if (l_rc)
{
FAPI_ERR("Unable to read the SPD module type.");
break;
}
- l_rc = FAPI_ATTR_GET(ATTR_SPD_NUM_RANKS, &l_dimm_targets[j], num_ranks); if(l_rc) return l_rc;
+ l_rc = FAPI_ATTR_GET(ATTR_SPD_NUM_RANKS, &l_dimm_targets[j], num_ranks);
if (l_rc)
{
FAPI_ERR("Unable to read the SPD number of ranks");
break;
}
- l_rc = FAPI_ATTR_GET(ATTR_SPD_FINE_OFFSET_TAAMIN, &l_dimm_targets[j], l_spd_taa_offset_FTB); if(l_rc) return l_rc;
+ l_rc = FAPI_ATTR_GET(ATTR_SPD_FINE_OFFSET_TAAMIN, &l_dimm_targets[j], l_spd_taa_offset_FTB);
if (l_rc)
{
FAPI_ERR("Unable to read the SPD TAA offset (FTB)");
break;
}
- l_rc = FAPI_ATTR_GET(ATTR_SPD_FINE_OFFSET_TCKMIN, &l_dimm_targets[j], l_spd_tck_offset_FTB); if(l_rc) return l_rc;
+ l_rc = FAPI_ATTR_GET(ATTR_SPD_FINE_OFFSET_TCKMIN, &l_dimm_targets[j], l_spd_tck_offset_FTB);
if (l_rc)
{
FAPI_ERR("Unable to read the SPD TCK offset (FTB)");
break;
}
- l_rc = FAPI_ATTR_GET(ATTR_SPD_FTB_DIVIDEND, &l_dimm_targets[j], l_spd_ftb_dividend); if(l_rc) return l_rc;
+ l_rc = FAPI_ATTR_GET(ATTR_SPD_FTB_DIVIDEND, &l_dimm_targets[j], l_spd_ftb_dividend);
if (l_rc)
{
FAPI_ERR("Unable to read the SPD FTB dividend");
break;
}
- l_rc = FAPI_ATTR_GET(ATTR_SPD_FTB_DIVISOR, &l_dimm_targets[j], l_spd_ftb_divisor); if(l_rc) return l_rc;
+ l_rc = FAPI_ATTR_GET(ATTR_SPD_FTB_DIVISOR, &l_dimm_targets[j], l_spd_ftb_divisor);
if (l_rc)
{
FAPI_ERR("Unable to read the SPD FTB divisor");
@@ -358,7 +362,46 @@ fapi::ReturnCode mss_freq(const fapi::Target &i_target_memb)
l_spd_min_tck_max = 1500;
}
+ if ( l_spd_min_tck_max == 0)
+ {
+ FAPI_ERR("l_spd_min_tck_max = 0 unable to calculate freq or cl. Possibly no centaurs configured. ");
+ FAPI_SET_HWP_ERROR(l_rc, RC_MSS_UNSUPPORTED_SPD_DATA);
+ }
+
FAPI_INF( "PLUG CONFIG: %d Type O' Dimm: 0x%02X Num Ranks: %d", plug_config, module_type, num_ranks);
+
+
+ l_rc = FAPI_ATTR_GET(ATTR_MSS_FREQ_OVERRIDE, &i_target_memb, l_freq_override);
+ if ( l_freq_override != 0)
+ {
+ // The relationship is as such
+ // l_dimm_freq_min = 2000000 / l_spd_min_tck_max
+
+ if (l_freq_override == 1866)
+ {
+ l_dimm_freq_min = 1866;
+ l_spd_min_tck_max = 1072;
+ }
+
+ if (l_freq_override == 1600)
+ {
+ l_dimm_freq_min = 1600;
+ l_spd_min_tck_max = 1250;
+ }
+
+ if (l_freq_override == 1333)
+ {
+ l_dimm_freq_min = 1333;
+ l_spd_min_tck_max = 1500;
+ }
+
+ if (l_freq_override == 1066)
+ {
+ l_dimm_freq_min = 1066;
+ l_spd_min_tck_max = 1875;
+ }
+
+ }
if ((l_spd_cas_lat_supported_all == 0) && (!l_rc))
{
@@ -379,7 +422,10 @@ fapi::ReturnCode mss_freq(const fapi::Target &i_target_memb)
// If the CL proposed is not supported or the TAA exceeds TAA max
// Spec defines tAAmax as 20 ns for all DDR3 speed grades.
- while ((!( l_spd_cas_lat_supported_all & (0x00000001<<(l_cas_latency-4)))) || (l_cl_mult_tck > 20000))
+ // Break loop if we have an override condition without a solution.
+
+ while ( ( (!( l_spd_cas_lat_supported_all & (0x00000001<<(l_cas_latency-4)))) || (l_cl_mult_tck > 20000) )
+ && ( l_override_path = 0 ) )
{
// If not supported, increment the CL up to 18 (highest supported CL) looking for Supported CL
while ((!( l_spd_cas_lat_supported_all & (0x00000001<<(l_cas_latency-4))))&&(l_cas_latency < 18))
@@ -390,7 +436,9 @@ fapi::ReturnCode mss_freq(const fapi::Target &i_target_memb)
// If still not supported CL or TAA is > 20 ns ... pick a slower TCK and start again
l_cl_mult_tck = l_cas_latency * l_spd_min_tck_max;
- if ((!( l_spd_cas_lat_supported_all & (0x00000001<<(l_cas_latency-4)))) || (l_cl_mult_tck > 20000))
+ // Do not move freq if using an override freq. Just continue. Hence the overide in this if statement
+ if ( ( (!( l_spd_cas_lat_supported_all & (0x00000001<<(l_cas_latency-4)))) || (l_cl_mult_tck > 20000) )
+ && ( l_freq_override == 0) )
{
if (l_spd_min_tck_max < 1500)
{
@@ -426,6 +474,13 @@ fapi::ReturnCode mss_freq(const fapi::Target &i_target_memb)
l_dimm_freq_min = 2000000 / l_spd_min_tck_max;
}
+ // Need to break the loop in case we reach this condition because no longer modify freq and CL
+ // With an overrride
+ if ( ( (!( l_spd_cas_lat_supported_all & (0x00000001<<(l_cas_latency-4)))) || (l_cl_mult_tck > 20000) )
+ && ( l_freq_override == 1) )
+ {
+ l_override_path = 1;
+ }
}
}
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