diff options
author | Thi Tran <thi@us.ibm.com> | 2014-11-14 13:51:13 -0600 |
---|---|---|
committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2015-01-15 15:36:01 -0600 |
commit | f2f75404fafd6d6e7e52a5b901665165ab61b625 (patch) | |
tree | 4dd50c1145575587b207bb7bc0809b8311fc8688 /src/usr/hwpf/hwp/initfiles | |
parent | 60e36d9749821dc522e1cfd0e164ffd4459a2895 (diff) | |
download | talos-hostboot-f2f75404fafd6d6e7e52a5b901665165ab61b625.tar.gz talos-hostboot-f2f75404fafd6d6e7e52a5b901665165ab61b625.zip |
SW286896: HWP update to complete Naples VPO istep 7
CQ:SW286896
Change-Id: I19823ac32a963d7072d21140b828c30ab326a19f
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/14475
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Tested-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/14492
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/hwpf/hwp/initfiles')
-rw-r--r-- | src/usr/hwpf/hwp/initfiles/p8.a_x_pci_dmi_fir.scom.initfile | 140 | ||||
-rw-r--r-- | src/usr/hwpf/hwp/initfiles/p8.fbc.scom.initfile | 31 |
2 files changed, 96 insertions, 75 deletions
diff --git a/src/usr/hwpf/hwp/initfiles/p8.a_x_pci_dmi_fir.scom.initfile b/src/usr/hwpf/hwp/initfiles/p8.a_x_pci_dmi_fir.scom.initfile index 9015610be..2d322b957 100644 --- a/src/usr/hwpf/hwp/initfiles/p8.a_x_pci_dmi_fir.scom.initfile +++ b/src/usr/hwpf/hwp/initfiles/p8.a_x_pci_dmi_fir.scom.initfile @@ -1,4 +1,4 @@ -#-- $Id: p8.a_x_pci_dmi_fir.scom.initfile,v 1.7 2014/03/12 19:00:28 jmcgill Exp $ +#-- $Id: p8.a_x_pci_dmi_fir.scom.initfile,v 1.11 2014/10/02 14:08:08 jmcgill Exp $ #------------------------------------------------------------------------------- #-- #-- (C) Copyright International Business Machines Corp. 2011 @@ -28,6 +28,7 @@ define pcie_enabled = (ATTR_PROC_PCIE_ENABLE == ENUM_ATTR_PROC_PCIE_ENABLE_ENABL define trace_on_scom = (ATTR_CHIP_EC_FEATURE_TRACE_CONTROL_ON_SCOM != 0); define is_venice = (ATTR_CHIP_EC_FEATURE_VENICE_SPECIFIC != 0); +define is_naples = (ATTR_CHIP_EC_FEATURE_NAPLES_SPECIFIC != 0); #-------------------------------------------------------------------------------- @@ -289,19 +290,19 @@ scom 0x8009A9E002011E3F { #-- XBUS01.X0.BUSCTL.SCOM.FIR_ACTION0_REG scom 0x04011006 { bits, scom_data, expr; - 0:63, 0x0000000000000000, ((xbus_enabled) && (is_venice)); + 0:63, 0x0000000000000000, ((xbus_enabled) && ((is_venice)||(is_naples))); } #-- XBUS01.X0.BUSCTL.SCOM.FIR_ACTION1_REG scom 0x04011007 { bits, scom_data, expr; - 0:63, 0xFFFFFFFFFFFFC000, ((xbus_enabled) && (is_venice)); + 0:63, 0xFFFFFFFFFFFFC000, ((xbus_enabled) && ((is_venice)||(is_naples))); } #-- XBUS01.X0.BUSCTL.SCOM.FIR_MASK_REG scom 0x04011003 { bits, scom_data, expr; - 0:63, 0xDFFFFFFFFFFFC000, ((xbus_enabled) && (is_venice)); + 0:63, 0xDFFFFFFFFFFFC000, ((xbus_enabled) && ((is_venice)||(is_naples))); } #-- X1 @@ -330,93 +331,93 @@ scom 0x04011403 { #-- XBUS23.X0.BUSCTL.SCOM.FIR_ACTION0_REG scom 0x04011806 { bits, scom_data, expr; - 0:63, 0x0000000000000000, ((xbus_enabled) && (is_venice)); + 0:63, 0x0000000000000000, ((xbus_enabled) && ((is_venice)||(is_naples))); } #-- XBUS23.X0.BUSCTL.SCOM.FIR_ACTION1_REG scom 0x04011807 { bits, scom_data, expr; - 0:63, 0xFFFFFFFFFFFFC000, ((xbus_enabled) && (is_venice)); + 0:63, 0xFFFFFFFFFFFFC000, ((xbus_enabled) && ((is_venice)||(is_naples))); } #-- XBUS23.X0.BUSCTL.SCOM.FIR_MASK_REG scom 0x04011803 { bits, scom_data, expr; - 0:63, 0xDFFFFFFFFFFFC000, ((xbus_enabled) && (is_venice)); + 0:63, 0xDFFFFFFFFFFFC000, ((xbus_enabled) && ((is_venice)||(is_naples))); } #-- X2 #-- XBUS23.X1.BUSCTL.SCOM.FIR_ACTION0_REG scom 0x04011C06 { bits, scom_data, expr; - 0:63, 0x0000000000000000, ((xbus_enabled) && (is_venice)); + 0:63, 0x0000000000000000, ((xbus_enabled) && ((is_venice)||(is_naples))); } #-- XBUS23.X1.BUSCTL.SCOM.FIR_ACTION1_REG scom 0x04011C07 { bits, scom_data, expr; - 0:63, 0xFFFFFFFFFFFFC000, ((xbus_enabled) && (is_venice)); + 0:63, 0xFFFFFFFFFFFFC000, ((xbus_enabled) && ((is_venice)||(is_naples))); } #-- XBUS23.X1.BUSCTL.SCOM.FIR_MASK_REG scom 0x04011C03 { bits, scom_data, expr; - 0:63, 0xDFFFFFFFFFFFC000, ((xbus_enabled) && (is_venice)); + 0:63, 0xDFFFFFFFFFFFC000, ((xbus_enabled) && ((is_venice)||(is_naples))); } #-- bus powerdown settings #-- X0 RX_MODE_PL (broadcast to all groups/lanes), set RX_LANE_PDWN scom 0x800001FF0401103F { bits, scom_data, expr; - 0:63, 0x0000000000008000, ((xbus_enabled) && (is_venice)); + 0:63, 0x0000000000008000, ((xbus_enabled) && ((is_venice)||(is_naples))); } #-- X0 TX_MODE_PL (broadcast to all groups/lanes), set TX_LANE_PDWN scom 0x800405FF0401103F { bits, scom_data, expr; - 0:63, 0x0000000000008000, ((xbus_enabled) && (is_venice)); + 0:63, 0x0000000000008000, ((xbus_enabled) && ((is_venice)||(is_naples))); } #-- X0 RX_LANE_DISABLED_VEC_0_15_PG (broadcast to all groups), disable all scom 0x800929E00401103F { bits, scom_data, expr; - 0:63, 0x000000000000FFFF, ((xbus_enabled) && (is_venice)); + 0:63, 0x000000000000FFFF, ((xbus_enabled) && ((is_venice)||(is_naples))); } #-- X0 RX_LANE_DISABLED_VEC_16_31_PG (broadcast to all groups), disable all scom 0x800931E00401103F { bits, scom_data, expr; - 0:63, 0x000000000000FFFF, ((xbus_enabled) && (is_venice)); + 0:63, 0x000000000000FFFF, ((xbus_enabled) && ((is_venice)||(is_naples))); } #-- X0 RX_CLK_MODE_PG (broadcast to all groups), set RX_CLK_PDWN scom 0x800801E00401103F { bits, scom_data, expr; - 0:63, 0x0000000000008000, ((xbus_enabled) && (is_venice)); + 0:63, 0x0000000000008000, ((xbus_enabled) && ((is_venice)||(is_naples))); } #-- X0 TX_LANE_DISABLED_VEC_0_15_PG (broadcast to all groups), disable all scom 0x800D1DE00401103F { bits, scom_data, expr; - 0:63, 0x000000000000FFFF, ((xbus_enabled) && (is_venice)); + 0:63, 0x000000000000FFFF, ((xbus_enabled) && ((is_venice)||(is_naples))); } #-- X0 TX_LANE_DISABLED_VEC_16_31_PG (broadcast to all groups), disable all scom 0x800D25E00401103F { bits, scom_data, expr; - 0:63, 0x000000000000FFFF, ((xbus_enabled) && (is_venice)); + 0:63, 0x000000000000FFFF, ((xbus_enabled) && ((is_venice)||(is_naples))); } #-- X0 TX_CLK_MODE_PG (broadcast to all groups), set TX_CLK_PDWN scom 0x800C05E00401103F { bits, scom_data, expr; - 0:63, 0x0000000000008000, ((xbus_enabled) && (is_venice)); + 0:63, 0x0000000000008000, ((xbus_enabled) && ((is_venice)||(is_naples))); } #-- X0 RX_FENCE_PG (broadcast to all groups), set RX_FENCE scom 0x8009A9E00401103F { bits, scom_data, expr; - 0:63, 0x0000000000008000, ((xbus_enabled) && (is_venice)); + 0:63, 0x0000000000008000, ((xbus_enabled) && ((is_venice)||(is_naples))); } #-- X1 RX_MODE_PL (broadcast to all groups/lanes), set RX_LANE_PDWN @@ -476,109 +477,109 @@ scom 0x8009A9E00401143F { #-- X2 RX_MODE_PL (broadcast to all groups/lanes), set RX_LANE_PDWN scom 0x800001FF04011C3F { bits, scom_data, expr; - 0:63, 0x0000000000008000, ((xbus_enabled) && (is_venice)); + 0:63, 0x0000000000008000, ((xbus_enabled) && ((is_venice)||(is_naples))); } #-- X2 TX_MODE_PL (broadcast to all groups/lanes), set TX_LANE_PDWN scom 0x800405FF04011C3F { bits, scom_data, expr; - 0:63, 0x0000000000008000, ((xbus_enabled) && (is_venice)); + 0:63, 0x0000000000008000, ((xbus_enabled) && ((is_venice)||(is_naples))); } #-- X2 RX_LANE_DISABLED_VEC_0_15_PG (broadcast to all groups), disable all scom 0x800929E004011C3F { bits, scom_data, expr; - 0:63, 0x000000000000FFFF, ((xbus_enabled) && (is_venice)); + 0:63, 0x000000000000FFFF, ((xbus_enabled) && ((is_venice)||(is_naples))); } #-- X2 RX_LANE_DISABLED_VEC_16_31_PG (broadcast to all groups), disable all scom 0x800931E004011C3F { bits, scom_data, expr; - 0:63, 0x000000000000FFFF, ((xbus_enabled) && (is_venice)); + 0:63, 0x000000000000FFFF, ((xbus_enabled) && ((is_venice)||(is_naples))); } #-- X2 RX_CLK_MODE_PG (broadcast to all groups), set RX_CLK_PDWN scom 0x800801E004011C3F { bits, scom_data, expr; - 0:63, 0x0000000000008000, ((xbus_enabled) && (is_venice)); + 0:63, 0x0000000000008000, ((xbus_enabled) && ((is_venice)||(is_naples))); } #-- X2 TX_LANE_DISABLED_VEC_0_15_PG (broadcast to all groups), disable all scom 0x800D1DE004011C3F { bits, scom_data, expr; - 0:63, 0x000000000000FFFF, ((xbus_enabled) && (is_venice)); + 0:63, 0x000000000000FFFF, ((xbus_enabled) && ((is_venice)||(is_naples))); } #-- X2 TX_LANE_DISABLED_VEC_16_31_PG (broadcast to all groups), disable all scom 0x800D25E004011C3F { bits, scom_data, expr; - 0:63, 0x000000000000FFFF, ((xbus_enabled) && (is_venice)); + 0:63, 0x000000000000FFFF, ((xbus_enabled) && ((is_venice)||(is_naples))); } #-- X2 TX_CLK_MODE_PG (broadcast to all groups), set TX_CLK_PDWN scom 0x800C05E004011C3F { bits, scom_data, expr; - 0:63, 0x0000000000008000, ((xbus_enabled) && (is_venice)); + 0:63, 0x0000000000008000, ((xbus_enabled) && ((is_venice)||(is_naples))); } #-- X2 RX_FENCE_PG (broadcast to all groups), set RX_FENCE scom 0x8009A9E004011C3F { bits, scom_data, expr; - 0:63, 0x0000000000008000, ((xbus_enabled) && (is_venice)); + 0:63, 0x0000000000008000, ((xbus_enabled) && ((is_venice)||(is_naples))); } #-- X3 RX_MODE_PL (broadcast to all groups/lanes), set RX_LANE_PDWN scom 0x800001FF0401183F { bits, scom_data, expr; - 0:63, 0x0000000000008000, ((xbus_enabled) && (is_venice)); + 0:63, 0x0000000000008000, ((xbus_enabled) && ((is_venice)||(is_naples))); } #-- X3 TX_MODE_PL (broadcast to all groups/lanes), set TX_LANE_PDWN scom 0x800405FF0401183F { bits, scom_data, expr; - 0:63, 0x0000000000008000, ((xbus_enabled) && (is_venice)); + 0:63, 0x0000000000008000, ((xbus_enabled) && ((is_venice)||(is_naples))); } #-- X3 RX_LANE_DISABLED_VEC_0_15_PG (broadcast to all groups), disable all scom 0x800929E00401183F { bits, scom_data, expr; - 0:63, 0x000000000000FFFF, ((xbus_enabled) && (is_venice)); + 0:63, 0x000000000000FFFF, ((xbus_enabled) && ((is_venice)||(is_naples))); } #-- X3 RX_LANE_DISABLED_VEC_16_31_PG (broadcast to all groups), disable all scom 0x800931E00401183F { bits, scom_data, expr; - 0:63, 0x000000000000FFFF, ((xbus_enabled) && (is_venice)); + 0:63, 0x000000000000FFFF, ((xbus_enabled) && ((is_venice)||(is_naples))); } #-- X3 RX_CLK_MODE_PG (broadcast to all groups), set RX_CLK_PDWN scom 0x800801E00401183F { bits, scom_data, expr; - 0:63, 0x0000000000008000, ((xbus_enabled) && (is_venice)); + 0:63, 0x0000000000008000, ((xbus_enabled) && ((is_venice)||(is_naples))); } #-- X3 TX_LANE_DISABLED_VEC_0_15_PG (broadcast to all groups), disable all scom 0x800D1DE00401183F { bits, scom_data, expr; - 0:63, 0x000000000000FFFF, ((xbus_enabled) && (is_venice)); + 0:63, 0x000000000000FFFF, ((xbus_enabled) && ((is_venice)||(is_naples))); } #-- X3 TX_LANE_DISABLED_VEC_16_31_PG (broadcast to all groups), disable all scom 0x800D25E00401183F { bits, scom_data, expr; - 0:63, 0x000000000000FFFF, ((xbus_enabled) && (is_venice)); + 0:63, 0x000000000000FFFF, ((xbus_enabled) && ((is_venice)||(is_naples))); } #-- X3 TX_CLK_MODE_PG (broadcast to all groups), set TX_CLK_PDWN scom 0x800C05E00401183F { bits, scom_data, expr; - 0:63, 0x0000000000008000, ((xbus_enabled) && (is_venice)); + 0:63, 0x0000000000008000, ((xbus_enabled) && ((is_venice)||(is_naples))); } #-- X3 RX_FENCE_PG (broadcast to all groups), set RX_FENCE scom 0x8009A9E00401183F { bits, scom_data, expr; - 0:63, 0x0000000000008000, ((xbus_enabled) && (is_venice)); + 0:63, 0x0000000000008000, ((xbus_enabled) && ((is_venice)||(is_naples))); } @@ -641,116 +642,137 @@ scom 0x040107CB { } -#-- ABUS IO (EDI) +#-- ABUS IO (EDI) / NV IO #-- set base configuration for FIR, leaving link specific FIR bits *masked* #-- (will be unsmaked by IO training procedure) #-- ABUS.BUSCTL.SCOM.FIR_ACTION0_REG +#-- NVBUS0.BUSCTL.SCOM.FIR_ACTION0_REG scom 0x08010C06 { bits, scom_data, expr; 0:63, 0x0000000000000000, (abus_enabled); } #-- ABUS.BUSCTL.SCOM.FIR_ACTION1_REG +#-- NVBUS0.BUSCTL.SCOM.FIR_ACTION1_REG scom 0x08010C07 { bits, scom_data, expr; 0:63, 0xFFFFFFFFFFFFC000, (abus_enabled); } #-- ABUS.BUSCTL.SCOM.FIR_MASK_REG +#-- NVBUS0.BUSCTL.SCOM.FIR_MASK_REG scom 0x08010C03 { bits, scom_data, expr; 0:63, 0xDFFFFFFFFFFFC000, (abus_enabled); } +#-- NVBUS1.BUSCTL.SCOM.FIR_ACTION0_REG +scom 0x08010C46 { + bits, scom_data, expr; + 0:63, 0x0000000000000000, (abus_enabled) && (is_naples); +} + +#-- NVBUS1.BUSCTL.SCOM.FIR_ACTION1_REG +scom 0x08010C47 { + bits, scom_data, expr; + 0:63, 0xFFFFFFFFFFFFC000, (abus_enabled) && (is_naples); +} + +#-- NVBUS1.BUSCTL.SCOM.FIR_MASK_REG +scom 0x08010C43 { + bits, scom_data, expr; + 0:63, 0xDFFFFFFFFFFFC000, (abus_enabled) && (is_naples); +} + #-- ABUS bus initialization/powerdown settings #-- ABUS.TX_WRAP.TX0.TXCTL.TX_CTL_REGS.TX_ID1_PG scom 0x800C940008010C3F { bits, scom_data, expr; - 48:53, 0b000001, (abus_enabled); + 48:53, 0b000001, (abus_enabled) && (!is_naples); } #-- ABUS.RX0.RXCTL.RX_CTL_REGS.RX_ID1_PG scom 0x8008500008010C3F { bits, scom_data, expr; - 48:53, 0b000001, (abus_enabled); + 48:53, 0b000001, (abus_enabled) && (!is_naples); } #-- ABUS.TX_WRAP.TX1.TXCTL.TX_CTL_REGS.TX_ID1_PG scom 0x800C942008010C3F { bits, scom_data, expr; - 48:53, 0b000010, (abus_enabled); + 48:53, 0b000010, (abus_enabled) && (!is_naples); } #-- ABUS.RX1.RXCTL.RX_CTL_REGS.RX_ID1_PG scom 0x8008502008010C3F { bits, scom_data, expr; - 48:53, 0b000010, (abus_enabled); + 48:53, 0b000010, (abus_enabled) && (!is_naples); } #-- ABUS.TX_WRAP.TX2.TXCTL.TX_CTL_REGS.TX_ID1_PG scom 0x800C944008010C3F { bits, scom_data, expr; - 48:53, 0b000011, (abus_enabled); + 48:53, 0b000011, (abus_enabled) && (!is_naples); } #-- ABUS.RX2.RXCTL.RX_CTL_REGS.RX_ID1_PG scom 0x8008504008010C3F { bits, scom_data, expr; - 48:53, 0b000011, (abus_enabled); + 48:53, 0b000011, (abus_enabled) && (!is_naples); } #-- ABUS RX_MODE_PL (broadcast to all groups/lanes), set RX_LANE_PDWN scom 0x800001FF08010C3F { bits, scom_data, expr; - 0:63, 0x0000000000008000, (abus_enabled); + 0:63, 0x0000000000008000, (abus_enabled) && (!is_naples); } #-- ABUS TX_MODE_PL (broadcast to all groups/lanes), set TX_LANE_PDWN scom 0x800405FF08010C3F { bits, scom_data, expr; - 0:63, 0x0000000000008000, (abus_enabled); + 0:63, 0x0000000000008000, (abus_enabled) && (!is_naples); } #-- ABUS RX_LANE_DISABLED_VEC_0_15_PG (broadcast to all groups), disable all scom 0x800929E008010C3F { bits, scom_data, expr; - 0:63, 0x000000000000FFFF, (abus_enabled); + 0:63, 0x000000000000FFFF, (abus_enabled) && (!is_naples); } #-- ABUS RX_LANE_DISABLED_VEC_16_31_PG (broadcast to all groups), disable all scom 0x800931E008010C3F { bits, scom_data, expr; - 0:63, 0x000000000000FFFF, (abus_enabled); + 0:63, 0x000000000000FFFF, (abus_enabled) && (!is_naples); } #-- ABUS RX_CLK_MODE_PG (broadcast to all groups), set RX_CLK_PDWN scom 0x800801E008010C3F { bits, scom_data, expr; - 0:63, 0x0000000000008000, (abus_enabled); + 0:63, 0x0000000000008000, (abus_enabled) && (!is_naples); } #-- ABUS TX_LANE_DISABLED_VEC_0_15_PG (broadcast to all groups), disable all scom 0x800D1DE008010C3F { bits, scom_data, expr; - 0:63, 0x000000000000FFFF, (abus_enabled); + 0:63, 0x000000000000FFFF, (abus_enabled) && (!is_naples); } #-- ABUS TX_LANE_DISABLED_VEC_16_31_PG (broadcast to all groups), disable all scom 0x800D25E008010C3F { bits, scom_data, expr; - 0:63, 0x000000000000FFFF, (abus_enabled); + 0:63, 0x000000000000FFFF, (abus_enabled) && (!is_naples); } #-- ABUS TX_CLK_MODE_PG (broadcast to all groups), set TX_CLK_PDWN scom 0x800C05E008010C3F { bits, scom_data, expr; - 0:63, 0x0000000000008000, (abus_enabled); + 0:63, 0x0000000000008000, (abus_enabled) && (!is_naples); } #-- ABUS RX_FENCE_PG (broadcast to all groups), set RX_FENCE scom 0x8009A9E008010C3F { bits, scom_data, expr; - 0:63, 0x0000000000008000, (abus_enabled); + 0:63, 0x0000000000008000, (abus_enabled) && (!is_naples); } #-- ABUS PB (PBES) @@ -759,19 +781,19 @@ scom 0x8009A9E008010C3F { #-- ES.PBES_WRAP_TOP.PBES_TOP.MISC_IO.SCOM.PB_IOA_FIR_ACTION0_REG scom 0x08010806 { bits, scom_data, expr; - 0:63, 0x0000000000000000, (abus_enabled); + 0:63, 0x0000000000000000, (abus_enabled) && (!is_naples); } #-- ES.PBES_WRAP_TOP.PBES_TOP.MISC_IO.SCOM.PB_IOA_FIR_ACTION1_REG scom 0x08010807 { bits, scom_data, expr; - 0:63, 0x0249861800000000, (abus_enabled); + 0:63, 0x0249861800000000, (abus_enabled) && (!is_naples); } #-- ES.PBES_WRAP_TOP.PBES_TOP.MISC_IO.SCOM.PB_IOA_FIR_MASK_REG scom 0x08010803 { bits, scom_data, expr; - 0:63, 0xFFFFFFFFFC000000, (abus_enabled); + 0:63, 0xFFFFFFFFFC000000, (abus_enabled) && (!is_naples); } #-- ABUS pervasive LFIR @@ -817,19 +839,19 @@ scom 0x080107CB { #-- ES.PBES_WRAP_TOP.PBES_TOP.MISC_IOF.SCOM.PB_IOF_FIR_ACTION0_REG scom 0x09010806 { bits, scom_data, expr; - 0:63, 0xFE082030FE082030, (pcie_enabled); + 0:63, 0xFE082030FE082030, (pcie_enabled) && (!is_naples); } #-- ES.PBES_WRAP_TOP.PBES_TOP.MISC_IOF.SCOM.PB_IOF_FIR_ACTION1_REG scom 0x09010807 { bits, scom_data, expr; - 0:63, 0x01D7DFCC01D7DFCC, (pcie_enabled); + 0:63, 0x01D7DFCC01D7DFCC, (pcie_enabled) && (!is_naples); } #-- ES.PBES_WRAP_TOP.PBES_TOP.MISC_IOF.SCOM.PB_IOF_FIR_MASK_REG scom 0x09010803 { bits, scom_data, expr; - 0:63, 0xFFFFFFFFFFFFFFFF, (pcie_enabled); + 0:63, 0xFFFFFFFFFFFFFFFF, (pcie_enabled) && (!is_naples); } #-- PCIE pervasive LFIR diff --git a/src/usr/hwpf/hwp/initfiles/p8.fbc.scom.initfile b/src/usr/hwpf/hwp/initfiles/p8.fbc.scom.initfile index a7dc7eb85..371853dca 100644 --- a/src/usr/hwpf/hwp/initfiles/p8.fbc.scom.initfile +++ b/src/usr/hwpf/hwp/initfiles/p8.fbc.scom.initfile @@ -1,4 +1,4 @@ -#-- $Id: p8.fbc.scom.initfile,v 1.15 2014/06/07 19:04:40 jmcgill Exp $ +#-- $Id: p8.fbc.scom.initfile,v 1.17 2014/10/01 14:47:35 szhong Exp $ #------------------------------------------------------------------------------- #-- #-- (C) Copyright International Business Machines Corp. 2011 @@ -28,13 +28,12 @@ define xbus_enabled = (ATTR_PROC_X_ENABLE == ENUM_ATTR_PROC_X_ENABLE_ENABLE); define abus_enabled = (ATTR_PROC_A_ENABLE == ENUM_ATTR_PROC_A_ENABLE_ENABLE); define pcie_enabled = (ATTR_PROC_PCIE_ENABLE == ENUM_ATTR_PROC_PCIE_ENABLE_ENABLE); define mcd_hang_poll_bug = (ATTR_CHIP_EC_FEATURE_MCD_HANG_RECOVERY_BUG != 0); - +define is_naples = (ATTR_CHIP_EC_FEATURE_NAPLES_SPECIFIC !=0); #-------------------------------------------------------------------------------- #-- SCOM initializations #-------------------------------------------------------------------------------- - -#-- PB Mode Register (PB_MODE / 0x02010C[048]A) +#-- PB Mode Register (PB_MODE / 0x02010C[048]A) scom 0x02010C(0,4,8)A { bits, scom_data; chip_is_system, 0b1; #-- single chip @@ -149,31 +148,31 @@ scom 0x04010C0A { #-- PB A Link Mode Register (PB_IOA_MODE / 0x0801080A) scom 0x0801080A { bits, scom_data, expr; - a_avp_mode, 0b0, (abus_enabled); #-- A AVP mode + a_avp_mode, 0b0, (abus_enabled) && (!is_naples); #-- A AVP mode } #-- PB A Link Framer Configuration Register (PB_IOA_FMR_CFG / 0x08010813) scom 0x08010813 { bits, scom_data, expr; - a_tod_wait_limit, 0b0001, (abus_enabled); #-- A bus TOD wait limit - a_prsp_wait_limit, 0b1000, (abus_enabled); #-- A bus presp wait limit - a_cc_wait_limit, 0b1100, (abus_enabled); #-- A bus cresp credit wait limit - a0_dc_wait_limit, 0b1100, (abus_enabled); #-- A0 bus data credit wait limit - a1_dc_wait_limit, 0b1100, (abus_enabled); #-- A1 bus data credit wait limit - a2_dc_wait_limit, 0b1100, (abus_enabled); #-- A2 bus data credit wait limit - a_ow_pack, 0b0, (abus_enabled); #-- OW pack disabled - a_ow_pack_priority, 0b0, (abus_enabled); #-- low priority + a_tod_wait_limit, 0b0001, (abus_enabled) && (!is_naples); #-- A bus TOD wait limit + a_prsp_wait_limit, 0b1000, (abus_enabled) && (!is_naples); #-- A bus presp wait limit + a_cc_wait_limit, 0b1100, (abus_enabled) && (!is_naples); #-- A bus cresp credit wait limit + a0_dc_wait_limit, 0b1100, (abus_enabled) && (!is_naples); #-- A0 bus data credit wait limit + a1_dc_wait_limit, 0b1100, (abus_enabled) && (!is_naples); #-- A1 bus data credit wait limit + a2_dc_wait_limit, 0b1100, (abus_enabled) && (!is_naples); #-- A2 bus data credit wait limit + a_ow_pack, 0b0, (abus_enabled) && (!is_naples); #-- OW pack disabled + a_ow_pack_priority, 0b0, (abus_enabled) && (!is_naples); #-- low priority } #-- PB F Link Mode Register (PB_IOF_MODE / 0x0901080A) scom 0x0901080A { bits, scom_data, expr; - f_avp_mode, 0b0, (pcie_enabled); #-- F AVP mode + f_avp_mode, 0b0, (pcie_enabled) && (!is_naples); #-- F AVP mode } #-- PB F Link Framer Configuration Register (PB_IOF_FMR_CFG / 0x09010813) scom 0x09010813 { bits, scom_data, expr; - f_ow_pack, 0b0, (pcie_enabled); #-- OW pack disabled - f_ow_pack_priority, 0b0, (pcie_enabled); #-- low priority + f_ow_pack, 0b0, (pcie_enabled) && (!is_naples); #-- OW pack disabled + f_ow_pack_priority, 0b0, (pcie_enabled) && (!is_naples); #-- low priority } |