diff options
| author | Prachi Gupta <pragupta@us.ibm.com> | 2015-03-26 10:06:08 -0500 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2015-03-26 13:59:05 -0500 |
| commit | e912f647e06fcf9efa601e419785552b6341ecf0 (patch) | |
| tree | e7282c9abbc73a89e6e9a5b855b9358700c15713 /src/usr/hwpf/hwp/initfiles | |
| parent | 91f1fe257f0b14cb39440d5c100e1d01d8025b20 (diff) | |
| download | talos-hostboot-e912f647e06fcf9efa601e419785552b6341ecf0.tar.gz talos-hostboot-e912f647e06fcf9efa601e419785552b6341ecf0.zip | |
SW292677:INITPROC: FSP&Hostboot - NPU updates
Change-Id: I86258da57eecca403b785782fc1496460e527814
CQ:SW292677
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/16097
Reviewed-by: Sangeetha T S <sangeet2@in.ibm.com>
Reviewed-by: PRACHI GUPTA <pragupta@us.ibm.com>
Tested-by: PRACHI GUPTA <pragupta@us.ibm.com>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/16657
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/hwpf/hwp/initfiles')
| -rw-r--r-- | src/usr/hwpf/hwp/initfiles/p8.npu.scom.initfile | 113 |
1 files changed, 113 insertions, 0 deletions
diff --git a/src/usr/hwpf/hwp/initfiles/p8.npu.scom.initfile b/src/usr/hwpf/hwp/initfiles/p8.npu.scom.initfile new file mode 100644 index 000000000..7371070c4 --- /dev/null +++ b/src/usr/hwpf/hwp/initfiles/p8.npu.scom.initfile @@ -0,0 +1,113 @@ +#-- $Id: p8.npu.scom.initfile,v 1.2 2014/12/11 00:24:12 camille Exp $ +#------------------------------------------------------------------------------- +#-- +#-- (C) Copyright International Business Machines Corp. 2011 +#-- All Rights Reserved -- Property of IBM +#-- *** *** +#-- +#-- TITLE : p8.npu.scom.initfile +#-- DESCRIPTION : Perform NPU configuration +#-- +#-- OWNER NAME : Lonny Lambrecht Email: lonny@us.ibm.com +#-- +#-------------------------------------------------------------------------------- + +SyntaxVersion = 1 + +#--****************************************************************************** +# -- ESNPUFIR +#--****************************************************************************** +# spy name ES.NPU.NP_AT.REG.FIR_MASK_REG +scom 0x0000000008013D83 { + bits, scom_data ; + 0:63, 0xE0002C02000F5F3F ; + } + +# spy name ES.NPU.NP_AT.REG.FIR_ACTION0_REG +scom 0x0000000008013D86 { + bits, scom_data ; + 0:63, 0x1CBFC1FCB7F0A300 ; + } + +# spy name ES.NPU.NP_AT.REG.FIR_ACTION1_REG +scom 0x0000000008013D87 { + bits, scom_data ; + 0:63, 0xFFFFFFFFFFFFFFFF ; + } + +# spy name ES.NPU.NP_AT.REG.NPU_AT_LR_ER (Lem enable) +scom 0x0000000008013D9C { + bits, scom_data ; + 0:63, 0xFFFFF00000000000 ; + } + +# spy name ES.NPU.NP_AT.REG.NPU_AT_SI_ER (LSI enable) +scom 0x0000000008013D9D { + bits, scom_data ; + 0:63, 0xE000240200000000 ; + } + +# spy name ES.NPU.NP_AT.REG.NPU_AT_FR_ER (freeze enable) +scom 0x0000000008013D9E { + bits, scom_data ; + 0:63, 0xE00024020C000000 ; + } + +# spy name ES.NPU.NP_AT.REG.NPU_AT_FE_ER (fence enable) +scom 0x0000000008013D9F { + bits, scom_data ; + 0:63, 0x1CBFC1FCB7F0A000 ; + } + +# spy name ES.NPU.SL_WRAP0.NTL_WRAP0.NTL_PMU_CONTROL (ntl00 pmu counter) +scom 0x0000000008013C27 { + bits, scom_data ; + 0:63, 0xF21045C200000000 ; + } + +# spy name ES.NPU.SL_WRAP0.NTL_WRAP1.NTL_PMU_CONTROL (ntl00 pmu counter) +scom 0x0000000008013C67 { + bits, scom_data ; + 0:63, 0xF21045C200000000 ; + } + +# spy name ES.NPU.SL_WRAP2.NTL_WRAP0.NTL_PMU_CONTROL (ntl20 pmu counter) +scom 0x0000000008013D27 { + bits, scom_data ; + 0:63, 0xF21045C200000000 ; + } + +# spy name ES.NPU.SL_WRAP2.NTL_WRAP1.NTL_PMU_CONTROL (ntl20 pmu counter) +scom 0x0000000008013D67 { + bits, scom_data ; + 0:63, 0xF21045C200000000 ; + } + +# spy name ES.NPU.NP_AT.REG.NPU_AT_PMU_CTRL (at pmu counter) +scom 0x0000000008013DA6 { + bits, scom_data ; + 0:63, 0xF210145000000000 ; + } + +# spy name ES.NPU.NP_AT.REG.NPU_AT_DEBUG (Debug/trace control) +scom 0x0000000008013DAB { + bits, scom_data ; + 0:63, 0x7000000000000000 ; + } + +# spy name ES.NPU.NP_AT.REG.NPU_AT_CNFG0 (npu bar select) +scom 0x0000000008013DA9 { + bits, scom_data ; + 0:63, 0x0211000043500000 ; + } + +# spy name ES.NPU.SL_WRAP0.NP_CQ.NP_CQ_LNK0.NXCQ_SCOM.NP_BUID_REG (npu bar select) +scom 0x0000000008013C13 { + bits, scom_data ; + 0:63, 0x0800000043500000 ; + } + + +# NPCQ control register? scom-only ?? +# NPCQ Int_lvl_REG register? scom-only ?? + |
