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| author | Thi Tran <thi@us.ibm.com> | 2014-10-27 14:49:12 -0500 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2014-10-28 16:18:16 -0500 |
| commit | 37cd15d015e47a3ceb0ff4d73d36e7e8b6f6d9c9 (patch) | |
| tree | a5e794da6e67fb8f8633243029fe694993ddfd39 /src/usr/hwpf/hwp/initfiles | |
| parent | 759896fd7cfacf2a9ae5c18e3635d70cb3977be1 (diff) | |
| download | talos-hostboot-37cd15d015e47a3ceb0ff4d73d36e7e8b6f6d9c9.tar.gz talos-hostboot-37cd15d015e47a3ceb0ff4d73d36e7e8b6f6d9c9.zip | |
SW283548: HW Procedure workarounds for CAPI - HW299404
Change-Id: Ifc5e81de5da2ba0665d84579b488e5a794d68444
CQ:SW283548
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/14199
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Tested-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/14204
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/hwpf/hwp/initfiles')
| -rw-r--r-- | src/usr/hwpf/hwp/initfiles/p8.mcs.scom.initfile | 26 |
1 files changed, 23 insertions, 3 deletions
diff --git a/src/usr/hwpf/hwp/initfiles/p8.mcs.scom.initfile b/src/usr/hwpf/hwp/initfiles/p8.mcs.scom.initfile index bb5012851..fde038ee1 100644 --- a/src/usr/hwpf/hwp/initfiles/p8.mcs.scom.initfile +++ b/src/usr/hwpf/hwp/initfiles/p8.mcs.scom.initfile @@ -1,9 +1,15 @@ -#-- $Id: p8.mcs.scom.initfile,v 1.17 2014/09/12 17:15:24 baysah Exp $ +#-- $Id: p8.mcs.scom.initfile,v 1.19 2014/10/22 21:21:12 baysah Exp $ #-- CHANGE HISTORY: #-------------------------------------------------------------------------------- #-- Version:|Author: | Date: | Comment: #-- --------|--------|--------|-------------------------------------------------- #-- | | | +#-- 1.19|baysah |10/22/14|- SW281364 : Remove ATTR_PM_SLEEP_ENABLE condition so MCS workaround for L4-CAPI Deadlock is for all systems types +#-- | | |- per Kevin Reick +#-- | | | +#-- 1.18|baysah |10/20/14|- SW281364 : Use ATTR_PM_SLEEP_ENABLE to enable MCS workaround for L4-CAPI Deadlock for Saphire systems +#-- | | |- The workaround disables speculation for dma_pr_w, pte_updt, ci_pr_w and reserves 1 CL machine for reads. +#-- | | | #-- 1.17|baysah |09/12/14|- SW277283 : MCS FCI Register is not in Murano DD1.x ... Qualify scom 201181c #-- | | | #-- 1.16|baysah |09/03/14|- SW275492 : MCS Command List Timer Needs to be Extended @@ -51,6 +57,7 @@ SyntaxVersion = 1 define ecc_bypass_disable = ((TGT1.ATTR_CHIP_EC_FEATURE_MCS_ECC_BYPASS_DISABLE != 0x0) && (SYS.ATTR_RISK_LEVEL == ENUM_ATTR_RISK_LEVEL_RL0)); + #--****************************************************************************** #-- MCS Mode0 Register #--****************************************************************************** @@ -61,7 +68,9 @@ define ecc_bypass_disable = ((TGT1.ATTR_CHIP_EC_FEATURE_MCS_ECC_BYPASS_DISABLE ! 2 , 0b1 , any ; # MCMODE0Q_ENABLE_NS_RD_AO_SFU_FOR_DCBZ 3 , 0b1 , any ; # MCMODE0Q_ENABLE_CENTAUR_LOCAL_CHECKSTOP_COMMAND 4:7 , 0xF , any ; # MCMODE0Q_L3_PREFETCH_RETRY_THRESHOLD - 8:11 , 0x0 , any ; # MCMODE0Q_Number_of_CL_Entries_Reserved_for_Read + # 8:11 , 0x0 , any ; # MCMODE0Q_Number_of_CL_Entries_Reserved_for_Read + # 8:11 , 0x1 , (SYS.ATTR_PM_SLEEP_ENABLE == 1) ; # CAPI Deadlock workaround + 8:11 , 0x1 , any ; # CAPI Deadlock workaround 12:15, 0x1 , any ; # MCMODE0Q_NUMBER_OF_CL_ENTRIES_RESERVED_FOR_MIRRORED_OPS 16:19, 0x0 , any ; # MCMODE0Q_NUMBER_OF_CL_ENTRIES_RESERVED_FOR_WRITES 20:23, 0x1 , any ; # MCMODE0Q_NUMBER_OF_CL_ENTRIES_RESERVED_FOR_CP_WRITES @@ -102,7 +111,18 @@ define ecc_bypass_disable = ((TGT1.ATTR_CHIP_EC_FEATURE_MCS_ECC_BYPASS_DISABLE ! 18:26, 0b000000000 , any ; # MCMODE1Q_DISABLE_SPEC_OPS_BY_SOURCE_AND_OR_SCOPE 27:30, 0b0000 , any ; # MCMODE1Q_DISABLE_PREFETCH 31 , 0b0 , any ; # MCMODE1Q_DISABLE_ALL_SPEC_OPS - 32:48, 0b00000000000000000 , any ; # MCMODE1Q_DISABLE_SPEC_OPS +# 32:48, 0b00000000000000000 , any ; # MCMODE1Q_DISABLE_SPEC_OPS + 32:40, 0b000000000 , any ; # MCMODE1Q_DISABLE_SPEC_OPS +# 41 , 0b1 , (SYS.ATTR_PM_SLEEP_ENABLE == 1) ; #CAPI Deadlock workaround + 41 , 0b1 , any ; #CAPI Deadlock workaround + 42 , 0b0 , any ; # MCMODE1Q_DISABLE_SPEC_OPS +# 43 , 0b1 , (SYS.ATTR_PM_SLEEP_ENABLE == 1) ; #CAPI Deadlock workaround + 43 , 0b1 , any ; #CAPI Deadlock workaround + 44 , 0b0 , any ; # MCMODE1Q_DISABLE_SPEC_OPS + 45 , 0b0 , any ; # MCMODE1Q_DISABLE_SPEC_OPS +# 46 , 0b1 , (SYS.ATTR_PM_SLEEP_ENABLE == 1) ; #CAPI Deadlock workaround + 46 , 0b1 , any ; #CAPI Deadlock workaround + 47:48, 0b00 , any ; # MCMODE1Q_DISABLE_SPEC_OPS 49 , 0b0 , any ; # MCMODE1Q_DISABLE_OP_SOURCE_AND_SCOPE 50:51, 0b00 , any ; # MCMODE1Q_DISABLE_CACHE_INHIBITED 52 , 0b0 , any ; # MCMODE1Q_DISABLE_ALL_MCS_COMMAND_BYPASS |
