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| author | Thi Tran <thi@us.ibm.com> | 2014-05-21 08:18:52 -0500 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2014-05-21 12:54:18 -0500 |
| commit | 4152092c4bbfab316610e8b91e1bb5cd75e8f0a1 (patch) | |
| tree | 9dd08b48592ec1c2b66ad225d3d9e76013855727 /src/usr/hwpf/hwp/initfiles/p8.nx.scom.initfile | |
| parent | 03c1a966d7711fba64d5d5508869ecfcf73ed74b (diff) | |
| download | talos-hostboot-4152092c4bbfab316610e8b91e1bb5cd75e8f0a1.tar.gz talos-hostboot-4152092c4bbfab316610e8b91e1bb5cd75e8f0a1.zip | |
SW262033: INITPROC: remove redundant write to ATTR_MSS_INIT_STATE in proc_cen_fr
CQ:SW262033
Change-Id: I1b215d0d1fd37f6cdd7123d79f5d95db5d341c13
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/11204
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Tested-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/11205
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/hwpf/hwp/initfiles/p8.nx.scom.initfile')
| -rw-r--r-- | src/usr/hwpf/hwp/initfiles/p8.nx.scom.initfile | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/src/usr/hwpf/hwp/initfiles/p8.nx.scom.initfile b/src/usr/hwpf/hwp/initfiles/p8.nx.scom.initfile index 76cb7451b..0cb1f91f9 100644 --- a/src/usr/hwpf/hwp/initfiles/p8.nx.scom.initfile +++ b/src/usr/hwpf/hwp/initfiles/p8.nx.scom.initfile @@ -1,4 +1,4 @@ -#-- $Id: p8.nx.scom.initfile,v 1.11 2014/04/02 14:42:26 johnre Exp $ +#-- $Id: p8.nx.scom.initfile,v 1.13 2014/05/16 02:56:33 jmcgill Exp $ #------------------------------------------------------------------------------- #-- #-- (C) Copyright International Business Machines Corp. 2011 @@ -170,7 +170,7 @@ scom 0x02013086 { 9 , 0b0 ; #-- 0b00 PowerBus write address error 10 , 0b0 ; #-- 0b01 PowerBus miscellaneous error 11 , 0b0 ; #-- 0b01 MMIO BAR parity error - 12 , 0b0 ; #-- 0b00* CRB kill ISN received while holding ISN with UE error + 12 , 0b1 ; #-- 0b11 CRB kill ISN received while holding ISN with UE error 13 , 0b0 ; #-- 0b01 ACK_DEAD cresp received by read command 14 , 0b0 ; #-- 0b01 ACK_DEAD cresp received by write command 15 , 0b0 ; #-- 0b01 Link check aborted while waiting on data @@ -193,7 +193,7 @@ scom 0x02013087 { 9 , 0b0 ; #-- 0b00 PowerBus write address error 10 , 0b1 ; #-- 0b01 PowerBus miscellaneous error 11 , 0b1 ; #-- 0b01 MMIO BAR parity error - 12 , 0b0 ; #-- 0b00* CRB kill ISN received while holding ISN with UE error + 12 , 0b1 ; #-- 0b11 CRB kill ISN received while holding ISN with UE error 13 , 0b1 ; #-- 0b01 ACK_DEAD cresp received by read command 14 , 0b1 ; #-- 0b01 ACK_DEAD cresp received by write command 15 , 0b1 ; #-- 0b01 Link check aborted while waiting on data @@ -238,7 +238,7 @@ scom 0x02013083 { scom 0x02013106 { bits , scom_data ; #--Action 0 , 0b0 ; #-- 0b00 mask Reserved - 1 , 0b0 ; #-- 0b00* ICS invalid state error FIR bit + 1 , 0b1 ; #-- 0b11 ICS invalid state error FIR bit 2:3 , 0b00 ; #-- 0b00 mask Reserved 4 , 0b0 ; #-- 0b01 Channel 0 842 array corrected ECC error FIR bit" ; 5 , 0b0 ; #-- 0b01 Channel 0 842 array uncorrectable ECC error FIR bit" ; @@ -249,15 +249,15 @@ scom 0x02013106 { 10 , 0b0 ; #-- 0b01 DMA outbound write/inbound read correctable ECC error FIR bit" ; 11:13 , 0b000 ; #-- 0b01 Channel 5,6,7 AMF array corrected ECC error FIR bit" ; 14 , 0b0 ; #-- 0b00 mask Error from other SCOM satellites FIR bit" ; - 15 , 0b0 ; #-- 0b00* DMA invalid state error FIR bit. Unrecoverable despite name" ; - 16 , 0b0 ; #-- 0b00* DMA invalid state error FIR bit" ; + 15 , 0b1 ; #-- 0b11 DMA invalid state error FIR bit. Unrecoverable despite name" ; + 16 , 0b1 ; #-- 0b11 DMA invalid state error FIR bit" ; 17 , 0b0 ; #-- 0b01 DMA array uncorrectable ECC error FIR bit" ; 18 , 0b0 ; #-- 0b01 DMA outbound write/inbound read uncorrectable ECC error FIR bit" ; 19 , 0b0 ; #-- 0b01 DMA inbound read error FIR bit" ; - 20:27 , 0b00000000 ; #-- 0b00* Channel 0-7 invalid state error FIR bit" ; + 20:27 , 0b11111111 ; #-- 0b11 Channel 0-7 invalid state error FIR bit" ; 28:30 , 0b000 ; #-- 0b01 Channel 5,6,7 AMF array uncorrectable ECC error FIR bit" ; - 31 , 0b0 ; #-- 0b00* UE error on CRB(CSB address, CCB) FIR bit" ; - 32 , 0b0 ; #-- 0b00* SUE error on CRB(CSB address, CCB) FIR bit" ; + 31 , 0b1 ; #-- 0b11 UE error on CRB(CSB address, CCB) FIR bit" ; + 32 , 0b1 ; #-- 0b11 SUE error on CRB(CSB address, CCB) FIR bit" ; 33 , 0b0 ; #-- 0b00 mask SUE error on something other than CRB(CSB address, CCB) FIR bit" ; 34 , 0b0 ; #-- 0b00 mask Reserved 35 , 0b0 ; #-- 0b00 mask Reserved @@ -270,7 +270,7 @@ scom 0x02013106 { scom 0x02013107 { bits , scom_data ; #--Action 0 , 0b0 ; #-- 0b00 mask Reserved - 1 , 0b0 ; #-- 0b00* ICS invalid state error FIR bit + 1 , 0b1 ; #-- 0b11 ICS invalid state error FIR bit 2:3 , 0b00 ; #-- 0b00 mask Reserved 4 , 0b1 ; #-- 0b01 Channel 0 842 array corrected ECC error FIR bit" ; 5 , 0b1 ; #-- 0b01 Channel 0 842 array uncorrectable ECC error FIR bit" ; @@ -281,15 +281,15 @@ scom 0x02013107 { 10 , 0b1 ; #-- 0b01 DMA outbound write/inbound read correctable ECC error FIR bit" ; 11:13 , 0b111 ; #-- 0b01 Channel 5,6,7 AMF array corrected ECC error FIR bit" ; 14 , 0b0 ; #-- 0b00 mask Error from other SCOM satellites FIR bit" ; - 15 , 0b0 ; #-- 0b00* DMA invalid state error FIR bit. Unrecoverable despite name" ; - 16 , 0b0 ; #-- 0b00* DMA invalid state error FIR bit" ; + 15 , 0b1 ; #-- 0b11 DMA invalid state error FIR bit. Unrecoverable despite name" ; + 16 , 0b1 ; #-- 0b11 DMA invalid state error FIR bit" ; 17 , 0b1 ; #-- 0b01 DMA array uncorrectable ECC error FIR bit" ; 18 , 0b1 ; #-- 0b01 DMA outbound write/inbound read uncorrectable ECC error FIR bit" ; 19 , 0b1 ; #-- 0b01 DMA inbound read error FIR bit" ; - 20:27 , 0b00000000 ; #-- 0b00* Channel 0-7 invalid state error FIR bit" ; + 20:27 , 0b11111111 ; #-- 0b11 Channel 0-7 invalid state error FIR bit" ; 28:30 , 0b111 ; #-- 0b01 Channel 5,6,7 AMF array uncorrectable ECC error FIR bit" ; - 31 , 0b0 ; #-- 0b00* UE error on CRB(CSB address, CCB) FIR bit" ; - 32 , 0b0 ; #-- 0b00* SUE error on CRB(CSB address, CCB) FIR bit" ; + 31 , 0b1 ; #-- 0b11 UE error on CRB(CSB address, CCB) FIR bit" ; + 32 , 0b1 ; #-- 0b11 SUE error on CRB(CSB address, CCB) FIR bit" ; 33 , 0b0 ; #-- 0b00 mask SUE error on something other than CRB(CSB address, CCB) FIR bit" ; 34 , 0b0 ; #-- 0b00 mask Reserved 35 , 0b0 ; #-- 0b00 mask Reserved |
