SW256005: INITPROC: HWP: RAS code pick up

Change-Id: I948f0cc94a3cdba8507bdc41c54ae1bc69cfee7d
CQ:SW256005
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/10544
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Tested-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/10545
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

2 files changed, 41 insertions, 6 deletions

diff --git a/src/usr/hwpf/hwp/include/cen_scom_addresses.H b/src/usr/hwpf/hwp/include/cen_scom_addresses.H
index c62bc5564..79584349d 100755
--- a/src/usr/hwpf/hwp/include/cen_scom_addresses.H
+++ b/src/usr/hwpf/hwp/include/cen_scom_addresses.H
@@ -20,7 +20,7 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: cen_scom_addresses.H,v 1.68 2014/03/28 21:06:47 jdsloat Exp $
+// $Id: cen_scom_addresses.H,v 1.69 2014/04/07 17:59:13 gollub Exp $
 // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/centaur/working/procedures/cen_scom_addresses.H,v $
 //------------------------------------------------------------------------------
 // *! (C) Copyright International Business Machines Corp. 2011
@@ -44,6 +44,7 @@
 //------------------------------------------------------------------------------
 // Version:|  Author: |  Date:  | Comment:
 //---------|----------|---------|-----------------------------------------------
+//  1.69   | gollub   |07-APR-14| Added MBSCFGQ so we can enable/disable exit point 1
 //  1.64   | jdsloat  |28-MAR-14| ADDED MEM SCOM CCS MODEQ, STATQ, and CAL FIR addresses.
 //  1.63   | mwuu     |18-Jun-13| Fixed naming of IO_FET_SLICE_EN_MAP1_P0_ADR0:3
 //  1.62   | mwuu     |18-Jun-13| Fixed naming of IO_FET_SLICE_EN_MAP1_P0_ADR0_3
@@ -767,6 +768,11 @@ CONST_UINT64_T( MBAXCR01Q_0x0201140B           , ULL(0x0201140B) );
 CONST_UINT64_T( MBAXCR23Q_0x0201140C           , ULL(0x0201140C) );
 
 //------------------------------------------------------------------------------
+//      MBS Configuration Register
+//------------------------------------------------------------------------------
+CONST_UINT64_T( MBSCFGQ_0x02011411             , ULL(0x02011411) );
+
+//------------------------------------------------------------------------------
 //      MBS ECC Decoder FIR Registers
 //------------------------------------------------------------------------------
 CONST_UINT64_T( MBS_ECC0_MBECCFIR_0x02011440           , ULL(0x02011440) );
@@ -1807,6 +1813,10 @@ This section is automatically updated by CVS when you check in this file.
 Be sure to create CVS comments when you commit so that they can be included here.
 
 $Log: cen_scom_addresses.H,v $
+Revision 1.69  2014/04/07 17:59:13  gollub
+
+/!/  1.69   | gollub   |07-APR-14| Added MBSCFGQ so we can enable/disable exit point 1
+
 Revision 1.68  2014/03/28 21:06:47  jdsloat
 ADDED MEM SCOM CCS MODEQ, STATQ, and CAL FIR addresses.
 
diff --git a/src/usr/hwpf/hwp/include/mss_unmask_errors.H b/src/usr/hwpf/hwp/include/mss_unmask_errors.H
index 1060509a1..b3650d76a 100644
--- a/src/usr/hwpf/hwp/include/mss_unmask_errors.H
+++ b/src/usr/hwpf/hwp/include/mss_unmask_errors.H
@@ -1,11 +1,11 @@
 /* IBM_PROLOG_BEGIN_TAG                                                   */
 /* This is an automatically generated prolog.                             */
 /*                                                                        */
-/* $Source: src/usr/hwpf/hwp/dram_initialization/mss_thermal_init/mss_unmask_errors.H $ */
+/* $Source: src/usr/hwpf/hwp/include/mss_unmask_errors.H $                */
 /*                                                                        */
 /* IBM CONFIDENTIAL                                                       */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2012                   */
+/* COPYRIGHT International Business Machines Corp. 2012,2014              */
 /*                                                                        */
 /* p1                                                                     */
 /*                                                                        */
@@ -20,7 +20,7 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: mss_unmask_errors.H,v 1.1 2012/09/05 21:04:20 gollub Exp $
+// $Id: mss_unmask_errors.H,v 1.2 2014/04/09 19:49:26 gollub Exp $
 //------------------------------------------------------------------------------
 // Don't forget to create CVS comments when you check in your changes!
 //------------------------------------------------------------------------------
@@ -29,6 +29,9 @@
 // Version:|   Date:  | Author: | Comment:
 //---------|----------|---------|-----------------------------------------------
 //   1.1   | 09/05/12 | gollub  | Created
+//   1.2   |07-APR-14 | gollub  | Added mss_unmask_pervasive_errors
+//         |          |         | Version was set back from 1.2 to 1.1 when I moved from procedures/ipl/fapi to procedures/
+//   1.2   |09-APR-14 | gollub  | Checked in a second time just to get version to 1.2
 
 #ifndef _MSS_UNMASK_ERRORS_H
 #define _MSS_UNMASK_ERRORS_H
@@ -54,6 +57,28 @@
 
 
 
+//------------------------------------------------------------------------------
+// mss_unmask_pervasive_errors
+//------------------------------------------------------------------------------
+
+
+/**
+ * @brief  To be called at the end of cen_mem_startclocks.C
+ *         Sets action regs and mask settings for pervasive errors to their 
+ *         runtime settings.
+ *
+ * @param  i_target         Centaur target
+ * @param  i_bad_rc         If cen_mem_startclocks.C already has a bad rc
+ *                          before it calls this function, we pass it in as 
+ *                          i_bad_rc. If this function gets it's own bad local 
+ *                          l_rc, i_bad_rc will be commited, and l_rc will be 
+ *                          passed back as return value. Else if no l_rc, 
+ *                          i_bad_rc will be passed back as return value.
+ * @return Non-SUCCESS if i_bad_rc Non_SUCCESS, or if internal function fails, 
+ *         SUCCESS otherwise.
+ */
+fapi::ReturnCode mss_unmask_pervasive_errors( const fapi::Target & i_target,
+                                              fapi::ReturnCode i_bad_rc );
 
 
 
@@ -63,12 +88,12 @@
 
 
 /**
- * @brief  To be called at the end of proc_cen_set_inband_addr.C
+ * @brief  To be called at the end of proc_cen_framelock.C
  *         Sets action regs and mask settings for inband errors to their 
  *         runtime settings.
  *
  * @param  i_target         Centaur target
- * @param  i_bad_rc         If proc_cen_set_inband_addr.C already has a bad rc
+ * @param  i_bad_rc         If proc_cen_framelock.C already has a bad rc
  *                          before it calls this function, we pass it in as 
  *                          i_bad_rc. If this function gets it's own bad local 
  *                          l_rc, i_bad_rc will be commited, and l_rc will be