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authorVan Lee <vanlee@us.ibm.com>2012-04-26 11:39:11 -0500
committerA. Patrick Williams III <iawillia@us.ibm.com>2012-05-09 14:18:49 -0500
commit88f80fc02570873ec8c08f3d30d4f85efd333695 (patch)
tree254622c678ceff71db1024c95ce3f23af40f544a /src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid
parent91d3c3f897bdeb6bab4259eafaa42b24b669b1d2 (diff)
downloadtalos-hostboot-88f80fc02570873ec8c08f3d30d4f85efd333695.tar.gz
talos-hostboot-88f80fc02570873ec8c08f3d30d4f85efd333695.zip
Check in proc_fab_iovalid HWP and enable its istep calling
Change-Id: I4c8df048178487d5b4f8d3a3e197099b7a2723b2 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/947 Tested-by: Jenkins Server Reviewed-by: MIKE J. JONES <mjjones@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid')
-rw-r--r--src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_iovalid.C332
-rw-r--r--src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_iovalid.H123
-rw-r--r--src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_smp.C186
-rw-r--r--src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_smp.H131
-rw-r--r--src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_smp_errors.xml38
5 files changed, 810 insertions, 0 deletions
diff --git a/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_iovalid.C b/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_iovalid.C
new file mode 100644
index 000000000..76c74d518
--- /dev/null
+++ b/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_iovalid.C
@@ -0,0 +1,332 @@
+// IBM_PROLOG_BEGIN_TAG
+// This is an automatically generated prolog.
+//
+// $Source: src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_iovalid.C $
+//
+// IBM CONFIDENTIAL
+//
+// COPYRIGHT International Business Machines Corp. 2012
+//
+// p1
+//
+// Object Code Only (OCO) source materials
+// Licensed Internal Code Source Materials
+// IBM HostBoot Licensed Internal Code
+//
+// The source code for this program is not published or other-
+// wise divested of its trade secrets, irrespective of what has
+// been deposited with the U.S. Copyright Office.
+//
+// Origin: 30
+//
+// IBM_PROLOG_END
+// $Id: proc_fab_iovalid.C,v 1.6 2012/04/16 19:44:55 jmcgill Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_fab_iovalid.C,v $
+//------------------------------------------------------------------------------
+// *|
+// *! (C) Copyright International Business Machines Corp. 2011
+// *! All Rights Reserved -- Property of IBM
+// *! *** IBM Confidential ***
+// *|
+// *! TITLE : proc_fab_iovalid.C
+// *! DESCRIPTION : Manage X/A link iovalid controls (FAPI)
+// *!
+// *! OWNER NAME : Joe McGill Email: jmcgill@us.ibm.com
+// *!
+//------------------------------------------------------------------------------
+
+
+//------------------------------------------------------------------------------
+// Includes
+//------------------------------------------------------------------------------
+#include "proc_fab_iovalid.H"
+
+extern "C"
+{
+
+//------------------------------------------------------------------------------
+// Function definitions
+//------------------------------------------------------------------------------
+
+
+//------------------------------------------------------------------------------
+// function: utility subroutine which writes chiplet GP0 register to
+// set/clear desired iovalid bits
+// parameters: i_target => chip target
+// i_active_link_mask => bit mask defining active links to act on
+// i_set_not_clear => define desired operation
+// (true=set, false=clear)
+// i_gp0_and_mask_addr => SCOM address for chiplet GP0 AND
+// mask register
+// i_gp0_or_mask_addr => SCOM address for chiplet GP0 OR
+// mask register
+// returns: FAPI_RC_SUCCESS if operation was successful, else error
+//------------------------------------------------------------------------------
+fapi::ReturnCode proc_fab_iovalid_write_gp0_mask(
+ const fapi::Target& i_target,
+ ecmdDataBufferBase& i_active_link_mask,
+ bool i_set_not_clear,
+ const uint32_t& i_gp0_and_mask_addr,
+ const uint32_t& i_gp0_or_mask_addr)
+{
+ // data buffer to hold final iovalid bit mask
+ ecmdDataBufferBase mask(64);
+
+ // return codes
+ uint32_t rc_ecmd = 0;
+ fapi::ReturnCode rc;
+
+ // mark function entry
+ FAPI_DBG("proc_fab_iovalid_write_gp0_mask: Start");
+
+ do
+ {
+ // copy input mask
+ rc_ecmd = i_active_link_mask.copy(mask);
+ // form final mask based on desired operation (set/clear)
+ if (!i_set_not_clear)
+ {
+ FAPI_DBG("proc_fab_iovalid_write_gp0_mask: Inverting active link mask");
+ rc_ecmd |= mask.invert();
+ }
+
+ // check return code from buffer manipulation operations
+ rc.setEcmdError(rc_ecmd);
+ if (!rc.ok())
+ {
+ FAPI_ERR("proc_fab_iovalid_write_gp0_mask: Error 0x%x setting up iovalid mask data buffer",
+ rc_ecmd);
+ break;
+ }
+
+ // write GP0 register (use OR mask address for set operation,
+ // AND mask address for clear operation)
+ rc = fapiPutScom(i_target,
+ i_set_not_clear?i_gp0_or_mask_addr:i_gp0_and_mask_addr,
+ mask);
+ if (!rc.ok())
+ {
+ FAPI_ERR("proc_fab_iovalid_write_gp0_mask: fapiPutScom error (GP0 Register 0x%08X)",
+ i_set_not_clear?i_gp0_or_mask_addr:i_gp0_and_mask_addr);
+ break;
+ }
+
+ } while (0);
+
+ // mark function exit
+ FAPI_DBG("proc_fab_iovalid_write_gp0_mask: End");
+ return rc;
+}
+
+
+//------------------------------------------------------------------------------
+// function: utility subroutine to set/clear X bus iovalid bits on one chip
+// parameters: i_smp_proc_chip => pointer to structure providing:
+// o target for this chip
+// o vector of structs representing X bus
+// connections (empty if no connection)
+// i_set_not_clear => define desired operation (true=set, false=clear)
+// returns: FAPI_RC_SUCCESS if operation was successful, else error
+//------------------------------------------------------------------------------
+fapi::ReturnCode proc_fab_iovalid_manage_x_links(
+ proc_fab_smp_proc_chip* i_smp_proc_chip,
+ bool i_set_not_clear)
+{
+ // data buffer to hold iovalid bit mask
+ ecmdDataBufferBase active_link_mask(64);
+
+ // return codes
+ uint32_t rc_ecmd = 0;
+ fapi::ReturnCode rc;
+
+ // mark function entry
+ FAPI_DBG("proc_fab_iovalid_manage_x_links: Start");
+
+ // set mask bit for each link
+ std::vector<proc_fab_smp_x_bus*>::iterator i;
+ for (i = i_smp_proc_chip->x_busses.begin();
+ i != i_smp_proc_chip->x_busses.end();
+ i++)
+ {
+ proc_fab_smp_x_bus_id src_chip_bus_id = (*i)->src_chip_bus_id;
+ FAPI_DBG("proc_fab_iovalid_manage_x_links: Adding link X%d to active link mask",
+ (*i)->src_chip_bus_id);
+ if (src_chip_bus_id == FBC_BUS_X0)
+ {
+ rc_ecmd |= active_link_mask.setBit(X_GP0_X0_IOVALID_BIT);
+ }
+ else if (src_chip_bus_id == FBC_BUS_X1)
+ {
+ rc_ecmd |= active_link_mask.setBit(X_GP0_X1_IOVALID_BIT);
+ }
+ else if (src_chip_bus_id == FBC_BUS_X2)
+ {
+ rc_ecmd |= active_link_mask.setBit(X_GP0_X2_IOVALID_BIT);
+ }
+ else
+ {
+ rc_ecmd |= active_link_mask.setBit(X_GP0_X3_IOVALID_BIT);
+ }
+
+ // check aggregate return code from buffer manipulation operations
+ rc.setEcmdError(rc_ecmd);
+ if (!rc.ok())
+ {
+ FAPI_ERR("proc_fab_iovalid_manage_x_links: Error 0x%x setting up active link mask data buffer",
+ rc_ecmd);
+ break;
+ }
+
+ // write appropriate GP0 mask register to perform desired operation
+ rc = proc_fab_iovalid_write_gp0_mask(i_smp_proc_chip->this_chip,
+ active_link_mask,
+ i_set_not_clear,
+ X_GP0_AND_0x04000004,
+ X_GP0_OR_0x04000005);
+ if (!rc.ok())
+ {
+ FAPI_ERR("proc_fab_iovalid_manage_x_links: Error from proc_fab_iovalid_write_gp0_mask");
+ break;
+ }
+ }
+
+ // mark function exit
+ FAPI_DBG("proc_fab_iovalid_manage_x_links: End");
+ return rc;
+}
+
+
+//------------------------------------------------------------------------------
+// function: utility subroutine to set/clear A bus iovalid bits on one chip
+// parameters: i_smp_proc_chip => pointer to structure providing:
+// o target for this chip
+// o vector of structs representing A bus
+// connections (empty if no connection)
+// i_set_not_clear => define desired operation (true=set, false=clear)
+// returns: FAPI_RC_SUCCESS if operation was successful, else error
+//------------------------------------------------------------------------------
+fapi::ReturnCode proc_fab_iovalid_manage_a_links(
+ proc_fab_smp_proc_chip* i_smp_proc_chip,
+ bool i_set_not_clear)
+{
+ // data buffer to hold iovalid bit mask
+ ecmdDataBufferBase active_link_mask(64);
+
+ // return codes
+ uint32_t rc_ecmd = 0;
+ fapi::ReturnCode rc;
+
+ // mark function entry
+ FAPI_DBG("proc_fab_iovalid_manage_a_links: Start");
+
+ // set mask bit for each link
+ std::vector<proc_fab_smp_a_bus*>::iterator i;
+ for (i = i_smp_proc_chip->a_busses.begin();
+ i != i_smp_proc_chip->a_busses.end();
+ i++)
+ {
+ proc_fab_smp_a_bus_id src_chip_bus_id = (*i)->src_chip_bus_id;
+ FAPI_DBG("proc_fab_iovalid_manage_a_links: Adding link A%d to active link mask",
+ (*i)->src_chip_bus_id);
+ if (src_chip_bus_id == FBC_BUS_A0)
+ {
+ rc_ecmd |= active_link_mask.setBit(A_GP0_A0_IOVALID_BIT);
+ }
+ else if (src_chip_bus_id == FBC_BUS_A1)
+ {
+ rc_ecmd |= active_link_mask.setBit(A_GP0_A1_IOVALID_BIT);
+ }
+ else
+ {
+ rc_ecmd |= active_link_mask.setBit(A_GP0_A2_IOVALID_BIT);
+ }
+
+ // check aggregate return code from buffer manipulation operations
+ rc.setEcmdError(rc_ecmd);
+ if (!rc.ok())
+ {
+ FAPI_ERR("proc_fab_iovalid_manage_a_links: Error 0x%x setting up active link mask data buffer",
+ rc_ecmd);
+ break;
+ }
+
+ // write appropriate GP0 mask register to perform desired operation
+ rc = proc_fab_iovalid_write_gp0_mask(i_smp_proc_chip->this_chip,
+ active_link_mask,
+ i_set_not_clear,
+ A_GP0_AND_0x08000004,
+ A_GP0_OR_0x08000005);
+ if (!rc.ok())
+ {
+ FAPI_ERR("proc_fab_iovalid_manage_a_links: Error from proc_fab_iovalid_write_gp0_mask");
+ break;
+ }
+ }
+
+ // mark function exit
+ FAPI_DBG("proc_fab_iovalid_manage_a_links: End");
+ return rc;
+}
+
+
+//------------------------------------------------------------------------------
+// HWP entry point
+//------------------------------------------------------------------------------
+fapi::ReturnCode proc_fab_iovalid(std::vector<proc_fab_smp_proc_chip *>& i_smp,
+ bool i_manage_x,
+ bool i_manage_a,
+ bool i_set_not_clear)
+{
+ // return code
+ fapi::ReturnCode rc;
+
+ // mark HWP entry
+ FAPI_IMP("proc_fab_iovalid: Entering ...");
+
+ do
+ {
+ // make pass through entire SMP, validate inputs
+ rc = proc_fab_smp_validate_smp(i_smp);
+ if (rc)
+ {
+ FAPI_ERR("proc_fab_iovalid: Error from proc_fab_smp_validate_smp");
+ break;
+ }
+
+ // loop over all chips composing SMP
+ for (std::vector<proc_fab_smp_proc_chip *>::iterator i = i_smp.begin();
+ i != i_smp.end();
+ i++)
+ {
+ // operate on X links?
+ if (i_manage_x)
+ {
+ rc = proc_fab_iovalid_manage_x_links(*i,
+ i_set_not_clear);
+ if (!rc.ok())
+ {
+ FAPI_ERR("proc_fab_iovalid: Error from proc_fab_iovalid_manage_x_links");
+ break;
+ }
+ }
+
+ // operate on A links?
+ if (i_manage_a)
+ {
+ rc = proc_fab_iovalid_manage_a_links(*i,
+ i_set_not_clear);
+ if (!rc.ok())
+ {
+ FAPI_ERR("proc_fab_iovalid: Error from proc_fab_iovalid_manage_a_links");
+ break;
+ }
+ }
+ }
+ } while(0);
+
+ // log function exit
+ FAPI_IMP("proc_fab_iovalid: Exiting ...");
+ return rc;
+}
+
+} // extern "C"
diff --git a/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_iovalid.H b/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_iovalid.H
new file mode 100644
index 000000000..dbef4391d
--- /dev/null
+++ b/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_iovalid.H
@@ -0,0 +1,123 @@
+// IBM_PROLOG_BEGIN_TAG
+// This is an automatically generated prolog.
+//
+// $Source: src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_iovalid.H $
+//
+// IBM CONFIDENTIAL
+//
+// COPYRIGHT International Business Machines Corp. 2012
+//
+// p1
+//
+// Object Code Only (OCO) source materials
+// Licensed Internal Code Source Materials
+// IBM HostBoot Licensed Internal Code
+//
+// The source code for this program is not published or other-
+// wise divested of its trade secrets, irrespective of what has
+// been deposited with the U.S. Copyright Office.
+//
+// Origin: 30
+//
+// IBM_PROLOG_END
+// $Id: proc_fab_iovalid.H,v 1.6 2012/04/16 19:44:57 jmcgill Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_fab_iovalid.H,v $
+//------------------------------------------------------------------------------
+// *|
+// *! (C) Copyright International Business Machines Corp. 2011
+// *! All Rights Reserved -- Property of IBM
+// *! *** IBM Confidential ***
+// *|
+// *! TITLE : proc_fab_iovalid.H
+// *! DESCRIPTION : Manage X/A link iovalid controls (FAPI)
+// *!
+// *! OWNER NAME : Joe McGill Email: jmcgill@us.ibm.com
+// *!
+// *! ADDITIONAL COMMENTS:
+// *!
+// *! Manage fabric SMP (X/A) link iovalid controls, which control the
+// *! logical link layer fabric traffic.
+// *!
+// *! The iovalid controls are intended to be raised in the IPL flow
+// *! after the underlying physical (EI) layer is running, to start the
+// *! flow of fabric frames.
+// *!
+// *! The iovalid controls are intended to be lowered prior to stopping
+// *! the clocks in the dump process (to provide a clean dump state,
+// *! assuming that the logical layer is quiesced).
+// *!
+//------------------------------------------------------------------------------
+
+#ifndef _PROC_FAB_IOVALID_H_
+#define _PROC_FAB_IOVALID_H_
+
+//------------------------------------------------------------------------------
+// Includes
+//------------------------------------------------------------------------------
+
+#include <fapi.H>
+#include "proc_fab_smp.H"
+#include "p8_scom_addresses.H"
+
+//------------------------------------------------------------------------------
+// Structure definitions
+//------------------------------------------------------------------------------
+
+// function pointer typedef definition for HWP call support
+typedef fapi::ReturnCode
+(*proc_fab_iovalid_FP_t)(std::vector<proc_fab_smp_proc_chip *>&,
+ bool,
+ bool,
+ bool);
+
+//------------------------------------------------------------------------------
+// Constant definitions
+//------------------------------------------------------------------------------
+
+// GP0 register bit/field definitions
+const uint8_t X_GP0_X0_IOVALID_BIT = 48;
+const uint8_t X_GP0_X1_IOVALID_BIT = 49;
+const uint8_t X_GP0_X2_IOVALID_BIT = 50;
+const uint8_t X_GP0_X3_IOVALID_BIT = 51;
+
+const uint8_t A_GP0_A0_IOVALID_BIT = 48;
+const uint8_t A_GP0_A1_IOVALID_BIT = 49;
+const uint8_t A_GP0_A2_IOVALID_BIT = 50;
+
+
+extern "C"
+{
+
+//------------------------------------------------------------------------------
+// Function prototypes
+//------------------------------------------------------------------------------
+
+// function: FAPI proc_fab_iovalid HWP entry point
+// operates on chips passed in i_smp argument to perform
+// desired iovalid manipulation (set or clear) on X/A busses
+// parameters: i_smp => vector of pointers to proc_fab_smp_chip
+// structures which defines scope of SMP fabric
+// & bus connectivity
+// i_manage_x => operate on X link iovalids?
+// i_manage_x => operate on A link iovalids?
+// i_set_not_clear => define target iovalid operation (true=set,
+// false=clear)
+// returns: FAPI_RC_SUCCESS if all specified operations complete successfully,
+// RC_PROC_FAB_SMP_INVALID_PROC_FAB_SMP_PROC_CHIP_ARG
+// if invalid/NULL proc_fab_smp_proc_chip argument is passed
+// in HWP argument vector
+// RC_PROC_FAB_SMP_INVALID_PROC_FAB_SMP_A_BUS_ARG
+// if invalid/NULL proc_fab_smp_a_bus argument is passed
+// in HWP argument vector
+// RC_PROC_FAB_SMP_INVALID_PROC_FAB_SMP_X_BUS_ARG
+// if invalid/NULL proc_fab_smp_x_bus argument is passed
+// in HWP argument vector
+// else FAPI getscom/putscom return code for failing operation
+fapi::ReturnCode proc_fab_iovalid(std::vector<proc_fab_smp_proc_chip *>& i_smp,
+ bool i_manage_x,
+ bool i_manage_a,
+ bool i_set_not_clear);
+
+} // extern "C"
+
+#endif // _PROC_FAB_IOVALID_H_
diff --git a/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_smp.C b/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_smp.C
new file mode 100644
index 000000000..d046d869e
--- /dev/null
+++ b/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_smp.C
@@ -0,0 +1,186 @@
+// IBM_PROLOG_BEGIN_TAG
+// This is an automatically generated prolog.
+//
+// $Source: src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_smp.C $
+//
+// IBM CONFIDENTIAL
+//
+// COPYRIGHT International Business Machines Corp. 2012
+//
+// p1
+//
+// Object Code Only (OCO) source materials
+// Licensed Internal Code Source Materials
+// IBM HostBoot Licensed Internal Code
+//
+// The source code for this program is not published or other-
+// wise divested of its trade secrets, irrespective of what has
+// been deposited with the U.S. Copyright Office.
+//
+// Origin: 30
+//
+// IBM_PROLOG_END
+// $Id: proc_fab_smp.C,v 1.3 2012/04/27 18:20:00 jmcgill Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_fab_smp.C,v $
+//------------------------------------------------------------------------------
+// *|
+// *! (C) Copyright International Business Machines Corp. 2011
+// *! All Rights Reserved -- Property of IBM
+// *! *** IBM Confidential ***
+// *|
+// *! TITLE : proc_fab_smp.C
+// *! DESCRIPTION : Common fabric structure defintions/utility functions (FAPI)
+// *!
+// *! OWNER NAME : Joe McGill Email: jmcgill@us.ibm.com
+// *!
+//------------------------------------------------------------------------------
+
+
+//------------------------------------------------------------------------------
+// Includes
+//------------------------------------------------------------------------------
+#include "proc_fab_smp.H"
+
+extern "C" {
+
+//------------------------------------------------------------------------------
+// Function definitions
+//------------------------------------------------------------------------------
+
+fapi::ReturnCode proc_fab_smp_validate_smp(
+ std::vector<proc_fab_smp_proc_chip *>& i_smp)
+{
+ // return code
+ fapi::ReturnCode rc;
+
+ // iterator defintions
+ std::vector<proc_fab_smp_proc_chip *>::iterator smp_chip;
+ std::vector<proc_fab_smp_x_bus *>::iterator x_bus;
+ std::vector<proc_fab_smp_a_bus *>::iterator a_bus;
+
+ do
+ {
+ // mark function entry
+ FAPI_DBG("proc_fab_smp_validate_smp: Start");
+
+ FAPI_DBG("proc_fab_smp_validate_smp: *************************************");
+ for (smp_chip = i_smp.begin(); smp_chip != i_smp.end(); smp_chip++)
+ {
+ // ensure that proc_fab_smp_proc_chip pointer is non NULL
+ if ((*smp_chip) == NULL)
+ {
+ FAPI_ERR("proc_fab_smp_validate_smp: Invalid NULL proc_fab_smp_proc_chip pointer");
+ FAPI_SET_HWP_ERROR(rc,
+ RC_PROC_FAB_SMP_INVALID_PROC_FAB_SMP_PROC_CHIP_ARG);
+ break;
+ }
+
+ // display target information for this chip
+ FAPI_DBG("proc_fab_smp_validate_smp: Target: %s", (*smp_chip)->this_chip.toEcmdString());
+
+ // display information about X bus connections
+ for (x_bus = (*smp_chip)->x_busses.begin();
+ x_bus != (*smp_chip)->x_busses.end();
+ x_bus++)
+ {
+ // ensure that proc_fab_smp_x_bus pointer & enclosed destination
+ // chip pointers are non NULL
+ if ((*x_bus == NULL) ||
+ ((*x_bus)->dest_chip == NULL))
+ {
+ FAPI_ERR("proc_fab_smp_validate_smp: Invalid/NULL proc_fab_smp_x_bus pointer");
+ FAPI_SET_HWP_ERROR(rc,
+ RC_PROC_FAB_SMP_INVALID_PROC_FAB_SMP_X_BUS_ARG);
+ break;
+ }
+ // validate source/destination bus ID values
+ if (((*x_bus)->src_chip_bus_id != FBC_BUS_X0) &&
+ ((*x_bus)->src_chip_bus_id != FBC_BUS_X1) &&
+ ((*x_bus)->src_chip_bus_id != FBC_BUS_X2) &&
+ ((*x_bus)->src_chip_bus_id != FBC_BUS_X3))
+ {
+ FAPI_ERR("proc_fab_smp_validate_smp: Unsupported source X bus ID value 0x%x presented",
+ (*x_bus)->src_chip_bus_id);
+ FAPI_SET_HWP_ERROR(rc,
+ RC_PROC_FAB_SMP_INVALID_PROC_FAB_SMP_X_BUS_ARG);
+ break;
+ }
+ if (((*x_bus)->dest_chip_bus_id != FBC_BUS_X0) &&
+ ((*x_bus)->dest_chip_bus_id != FBC_BUS_X1) &&
+ ((*x_bus)->dest_chip_bus_id != FBC_BUS_X2) &&
+ ((*x_bus)->dest_chip_bus_id != FBC_BUS_X3))
+ {
+ FAPI_ERR("proc_fab_smp_validate_smp: Unsupported destination X bus ID value 0x%x presented",
+ (*x_bus)->dest_chip_bus_id);
+ FAPI_SET_HWP_ERROR(rc,
+ RC_PROC_FAB_SMP_INVALID_PROC_FAB_SMP_X_BUS_ARG);
+ break;
+ }
+ FAPI_DBG("proc_fab_smp_validate_smp: X%d [ Target: %s X%d]",
+ (*x_bus)->src_chip_bus_id,
+ (*x_bus)->dest_chip->toEcmdString(),
+ (*x_bus)->dest_chip_bus_id);
+ }
+ if (!rc.ok())
+ {
+ break;
+ }
+
+ // display information about A bus connections
+ for (a_bus = (*smp_chip)->a_busses.begin();
+ a_bus != (*smp_chip)->a_busses.end();
+ a_bus++)
+ {
+ // ensure that proc_fab_smp_a_bus pointer & enclosed destination
+ // chip pointers are non NULL
+ if ((*a_bus == NULL) ||
+ ((*a_bus)->dest_chip == NULL))
+ {
+ FAPI_ERR("proc_fab_smp_validate_smp: Invalid/NULL proc_fab_smp_a_bus pointer");
+ FAPI_SET_HWP_ERROR(rc,
+ RC_PROC_FAB_SMP_INVALID_PROC_FAB_SMP_A_BUS_ARG);
+ break;
+ }
+ // validate source/destination bus ID values
+ if (((*a_bus)->src_chip_bus_id != FBC_BUS_A0) &&
+ ((*a_bus)->src_chip_bus_id != FBC_BUS_A1) &&
+ ((*a_bus)->src_chip_bus_id != FBC_BUS_A2))
+ {
+ FAPI_ERR("proc_fab_smp_validate_smp: Unsupported source A bus ID value 0x%x presented",
+ (*a_bus)->src_chip_bus_id);
+ FAPI_SET_HWP_ERROR(rc,
+ RC_PROC_FAB_SMP_INVALID_PROC_FAB_SMP_A_BUS_ARG);
+ break;
+ }
+ if (((*a_bus)->dest_chip_bus_id != FBC_BUS_A0) &&
+ ((*a_bus)->dest_chip_bus_id != FBC_BUS_A1) &&
+ ((*a_bus)->dest_chip_bus_id != FBC_BUS_A2))
+ {
+ FAPI_ERR("proc_fab_smp_validate_smp: Unsupported destination A bus ID value 0x%x presented",
+ (*a_bus)->dest_chip_bus_id);
+ FAPI_SET_HWP_ERROR(rc,
+ RC_PROC_FAB_SMP_INVALID_PROC_FAB_SMP_A_BUS_ARG);
+ break;
+ }
+ FAPI_DBG("proc_fab_smp_validate_smp: A%d [ Target: %s A%d]",
+ (*a_bus)->src_chip_bus_id,
+ (*a_bus)->dest_chip->toEcmdString(),
+ (*a_bus)->dest_chip_bus_id);
+ }
+ if (!rc.ok())
+ {
+ break;
+ }
+
+ FAPI_DBG("proc_fab_smp_validate_smp:");
+ }
+ FAPI_DBG("proc_fab_smp_validate_smp: *************************************");
+ } while(0);
+
+ // mark function exit
+ FAPI_DBG("proc_fab_smp_validate_smp: End");
+ return rc;
+}
+
+
+} // extern "C"
diff --git a/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_smp.H b/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_smp.H
new file mode 100644
index 000000000..ae904b1c5
--- /dev/null
+++ b/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_smp.H
@@ -0,0 +1,131 @@
+// IBM_PROLOG_BEGIN_TAG
+// This is an automatically generated prolog.
+//
+// $Source: src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_smp.H $
+//
+// IBM CONFIDENTIAL
+//
+// COPYRIGHT International Business Machines Corp. 2012
+//
+// p1
+//
+// Object Code Only (OCO) source materials
+// Licensed Internal Code Source Materials
+// IBM HostBoot Licensed Internal Code
+//
+// The source code for this program is not published or other-
+// wise divested of its trade secrets, irrespective of what has
+// been deposited with the U.S. Copyright Office.
+//
+// Origin: 30
+//
+// IBM_PROLOG_END
+// $Id: proc_fab_smp.H,v 1.2 2012/03/19 03:18:39 jmcgill Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_fab_smp.H,v $
+//------------------------------------------------------------------------------
+// *|
+// *! (C) Copyright International Business Machines Corp. 2011
+// *! All Rights Reserved -- Property of IBM
+// *! *** IBM Confidential ***
+// *|
+// *! TITLE : proc_fab_smp.H
+// *! DESCRIPTION : Common fabric structure defintions/utility functions (FAPI)
+// *!
+// *! OWNER NAME : Joe McGill Email: jmcgill@us.ibm.com
+// *!
+// *! ADDITIONAL COMMENTS:
+// *!
+// *! Define interface structures which pass SMP connectivity information
+// *! between platform and FAPI HWP code.
+// *!
+//------------------------------------------------------------------------------
+
+#ifndef _PROC_FAB_SMP_H_
+#define _PROC_FAB_SMP_H_
+
+//------------------------------------------------------------------------------
+// Includes
+//------------------------------------------------------------------------------
+
+#include <fapi.H>
+
+//------------------------------------------------------------------------------
+// Structure definitions
+//------------------------------------------------------------------------------
+
+// define set of supported X busses
+enum proc_fab_smp_x_bus_id
+{
+ FBC_BUS_X0 = 0,
+ FBC_BUS_X1 = 1,
+ FBC_BUS_X2 = 2,
+ FBC_BUS_X3 = 3
+};
+
+// define set of supported A busses
+enum proc_fab_smp_a_bus_id
+{
+ FBC_BUS_A0 = 0,
+ FBC_BUS_A1 = 1,
+ FBC_BUS_A2 = 2
+};
+
+// encapsulate X bus connectivity information (relative to source chip):
+// source bus ID
+// destination bus ID, pointer to destination target
+struct proc_fab_smp_x_bus
+{
+ proc_fab_smp_x_bus_id src_chip_bus_id;
+ fapi::Target* dest_chip;
+ proc_fab_smp_x_bus_id dest_chip_bus_id;
+};
+
+// encapsulate A bus connectivity information (relative to source chip):
+// source bus ID
+// destination bus ID, and pointer to destination target
+struct proc_fab_smp_a_bus
+{
+ proc_fab_smp_a_bus_id src_chip_bus_id;
+ fapi::Target* dest_chip;
+ proc_fab_smp_a_bus_id dest_chip_bus_id;
+};
+
+// structure to document target/fabric connectivity for a single chip
+// in the SMP topology
+struct proc_fab_smp_proc_chip
+{
+ // target associated with this chip
+ fapi::Target this_chip;
+ // X bus connections
+ std::vector<proc_fab_smp_x_bus*> x_busses;
+ // A bus connections
+ std::vector<proc_fab_smp_a_bus*> a_busses;
+};
+
+//------------------------------------------------------------------------------
+// Function prototypes
+//------------------------------------------------------------------------------
+
+extern "C"
+{
+
+// function: validate & display SMP topology
+// parameters: i_smp => vector of proc_fab_smp_chip structures which
+// defines scope of SMP fabric & bus connectivity
+// returns: FAPI_RC_SUCCESS if topology is valid,
+// RC_PROC_FAB_SMP_INVALID_PROC_FAB_SMP_PROC_CHIP_ARG
+// if invalid/NULL proc_fab_smp_proc_chip argument is passed
+// in HWP argument vector
+// RC_PROC_FAB_SMP_INVALID_PROC_FAB_SMP_A_BUS_ARG
+// if invalid/NULL proc_fab_smp_a_bus argument is passed
+// in HWP argument vector
+// RC_PROC_FAB_SMP_INVALID_PROC_FAB_SMP_X_BUS_ARG
+// if invalid/NULL proc_fab_smp_x_bus argument is passed
+// in HWP argument vector
+// else FAPI getscom/putscom return code for failing operation
+fapi::ReturnCode proc_fab_smp_validate_smp(
+ std::vector<proc_fab_smp_proc_chip *>& i_smp);
+
+} // extern "C"
+
+#endif // _PROC_FAB_SMP_H_
diff --git a/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_smp_errors.xml b/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_smp_errors.xml
new file mode 100644
index 000000000..9caa67fe8
--- /dev/null
+++ b/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_smp_errors.xml
@@ -0,0 +1,38 @@
+<!-- IBM_PROLOG_BEGIN_TAG
+ This is an automatically generated prolog.
+
+ $Source: src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_smp_errors.xml $
+
+ IBM CONFIDENTIAL
+
+ COPYRIGHT International Business Machines Corp. 2012
+
+ p1
+
+ Object Code Only (OCO) source materials
+ Licensed Internal Code Source Materials
+ IBM HostBoot Licensed Internal Code
+
+ The source code for this program is not published or other-
+ wise divested of its trade secrets, irrespective of what has
+ been deposited with the U.S. Copyright Office.
+
+ Origin: 30
+
+ IBM_PROLOG_END -->
+<!-- Error definitions for proc_fab_smp library -->
+<hwpErrors>
+ <!-- *********************************************************************** -->
+ <hwpError>
+ <rc>RC_PROC_FAB_SMP_INVALID_PROC_FAB_SMP_PROC_CHIP_ARG</rc>
+ <description>Invalid/NULL proc_fab_smp_proc_chip_argument passed in HWP argument vector.</description>
+ </hwpError>
+ <hwpError>
+ <rc>RC_PROC_FAB_SMP_INVALID_PROC_FAB_SMP_A_BUS_ARG</rc>
+ <description>Invalid/NULL proc_fab_smp_a_bus argument passed in HWP argument vector.</description>
+ </hwpError>
+ <hwpError>
+ <rc>RC_PROC_FAB_SMP_INVALID_PROC_FAB_SMP_X_BUS_ARG</rc>
+ <description>Invalid/NULL proc_fab_smp_x_bus argument passed in HWP argument vector.</description>
+ </hwpError>
+</hwpErrors>
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