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authorThi Tran <thi@us.ibm.com>2014-03-13 13:21:57 -0500
committerA. Patrick Williams III <iawillia@us.ibm.com>2014-03-13 23:03:01 -0500
commitd05eda21bf62fe34d0dcbdd786794707c5c9f048 (patch)
treeff39077aece7046aa71e104357eabf51fa28df56 /src/usr/hwpf/hwp/dram_training
parent2bf84ac57e2129aea67a37e6415d4b489ae6fb7f (diff)
downloadtalos-hostboot-d05eda21bf62fe34d0dcbdd786794707c5c9f048.tar.gz
talos-hostboot-d05eda21bf62fe34d0dcbdd786794707c5c9f048.zip
INITPROC: Hostboot SW250240 Misc HWP update week 03/04/2014
Change-Id: Ifb4adc000484271a06fdb3110b62c49f905661d0 CQ:SW250240 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/9617 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/hwpf/hwp/dram_training')
-rw-r--r--src/usr/hwpf/hwp/dram_training/mss_draminit_training/mss_draminit_training.C5
-rw-r--r--src/usr/hwpf/hwp/dram_training/mss_termination_control.C90
2 files changed, 54 insertions, 41 deletions
diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit_training/mss_draminit_training.C b/src/usr/hwpf/hwp/dram_training/mss_draminit_training/mss_draminit_training.C
index b83472316..71a15ed90 100644
--- a/src/usr/hwpf/hwp/dram_training/mss_draminit_training/mss_draminit_training.C
+++ b/src/usr/hwpf/hwp/dram_training/mss_draminit_training/mss_draminit_training.C
@@ -20,7 +20,7 @@
/* Origin: 30 */
/* */
/* IBM_PROLOG_END_TAG */
-// $Id: mss_draminit_training.C,v 1.72 2014/02/15 00:25:56 mwuu Exp $
+// $Id: mss_draminit_training.C,v 1.73 2014/02/25 22:23:13 mwuu Exp $
//------------------------------------------------------------------------------
// Don't forget to create CVS comments when you check in your changes!
//------------------------------------------------------------------------------
@@ -28,6 +28,7 @@
//------------------------------------------------------------------------------
// Version:| Author: | Date: | Comment:
//---------|----------|---------|------------------------------------------------
+// 1.73 | mwuu |25-FEB-14| Fixed ISDIMM spare case for bad bitmap
// 1.72 | mwuu |14-FEB-14| Fixed x4 spare case when mss_c4_phy returns bad
// | | | data with workaround
// 1.71 | mwuu |13-FEB-14| Updated get/setC4dq2reg, mss_set/get_bbm_regs FNs
@@ -3772,7 +3773,7 @@ ReturnCode getC4dq2reg(const Target & i_mba, const uint8_t i_port,
switch (dimm_spare[i_port][i_dimm][i_rank])
{
case ENUM_ATTR_VPD_DIMM_SPARE_NO_SPARE:
- spare_bitmap = 0;
+ continue; // ignore bbm data for nonexistent spare
break;
case ENUM_ATTR_VPD_DIMM_SPARE_LOW_NIBBLE:
spare_bitmap = 0x0F;
diff --git a/src/usr/hwpf/hwp/dram_training/mss_termination_control.C b/src/usr/hwpf/hwp/dram_training/mss_termination_control.C
index 39dd60f11..0daf07004 100644
--- a/src/usr/hwpf/hwp/dram_training/mss_termination_control.C
+++ b/src/usr/hwpf/hwp/dram_training/mss_termination_control.C
@@ -20,8 +20,7 @@
/* Origin: 30 */
/* */
/* IBM_PROLOG_END_TAG */
-
-// $Id: mss_termination_control.C,v 1.26 2014/01/31 13:41:28 sasethur Exp $
+// $Id: mss_termination_control.C,v 1.27 2014/02/25 21:08:15 mwuu Exp $
/* File is created by SARAVANAN SETHURAMAN on Thur 29 Sept 2011. */
//------------------------------------------------------------------------------
@@ -44,6 +43,8 @@
//------------------------------------------------------------------------------
// Version:| Author: | Date: | Comment:
//---------|----------|---------|-----------------------------------------------
+// 1.27 | mwuu |25-Feb-14| Fixed setting opposite port slew values in
+// | | | config_slew_rate
// 1.26 | mjjones |31-Jan-14| RAS Reviewed
// 1.25 | mjjones |22-Jan-14| Removed firmware header
// 1.24 | abhijsau |21-Jan-14| mike and menlo fixed ras review comments
@@ -512,6 +513,8 @@ fapi::ReturnCode config_slew_rate(const fapi::Target & i_target_mba,
FAPI_DBG("port%u type=%u imp_idx=%u slew_idx=%u cal_slew=%u",
i_port, i_slew_type, imp_idx, slew_idx, slew_cal_value);
+ if (i_port == 0) // port 0 dq/dqs slew
+ {
rc = fapiGetScom(i_target_mba,
DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P0_0_0x800000750301143F,
data_buffer); if(rc) return rc;
@@ -523,22 +526,25 @@ fapi::ReturnCode config_slew_rate(const fapi::Target & i_target_mba,
rc.setEcmdError(rc_num);
return rc;
}
- // switch this later to use broadcast address, 0x80003C750301143F P0_[0:4]
- rc = fapiPutScom(i_target_mba,
- DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P0_0_0x800000750301143F,
- data_buffer); if(rc) return rc;
- rc = fapiPutScom(i_target_mba,
- DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P0_1_0x800004750301143F,
- data_buffer); if(rc) return rc;
- rc = fapiPutScom(i_target_mba,
- DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P0_2_0x800008750301143F,
- data_buffer); if(rc) return rc;
- rc = fapiPutScom(i_target_mba,
- DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P0_3_0x80000C750301143F,
- data_buffer); if(rc) return rc;
- rc = fapiPutScom(i_target_mba,
- DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P0_4_0x800010750301143F,
- data_buffer); if(rc) return rc;
+ // switch this later to use broadcast address, 0x80003C750301143F P0_[0:4]
+ rc = fapiPutScom(i_target_mba,
+ DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P0_0_0x800000750301143F,
+ data_buffer); if(rc) return rc;
+ rc = fapiPutScom(i_target_mba,
+ DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P0_1_0x800004750301143F,
+ data_buffer); if(rc) return rc;
+ rc = fapiPutScom(i_target_mba,
+ DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P0_2_0x800008750301143F,
+ data_buffer); if(rc) return rc;
+ rc = fapiPutScom(i_target_mba,
+ DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P0_3_0x80000C750301143F,
+ data_buffer); if(rc) return rc;
+ rc = fapiPutScom(i_target_mba,
+ DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P0_4_0x800010750301143F,
+ data_buffer); if(rc) return rc;
+ }
+ else // port 1 dq/dqs slew
+ {
rc = fapiGetScom(i_target_mba,
DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P1_0_0x800100750301143F,
data_buffer); if(rc) return rc;
@@ -547,25 +553,26 @@ fapi::ReturnCode config_slew_rate(const fapi::Target & i_target_mba,
if (rc_num)
{
FAPI_ERR("Error in setting up DATA slew buffer");
- rc.setEcmdError(rc_num);
- return rc;
+ rc.setEcmdError(rc_num);
+ return rc;
}
- // switch this later to use broadcast address, 0x80013C750301143F P1_[0:4]
- rc = fapiPutScom(i_target_mba,
- DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P1_0_0x800100750301143F,
- data_buffer); if(rc) return rc;
- rc = fapiPutScom(i_target_mba,
- DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P1_1_0x800104750301143F,
- data_buffer); if(rc) return rc;
- rc = fapiPutScom(i_target_mba,
- DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P1_2_0x800108750301143F,
- data_buffer); if(rc) return rc;
- rc = fapiPutScom(i_target_mba,
- DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P1_3_0x80010C750301143F,
- data_buffer); if(rc) return rc;
- rc = fapiPutScom(i_target_mba,
- DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P1_4_0x800110750301143F,
- data_buffer); if(rc) return rc;
+ // switch this later to use broadcast address, 0x80013C750301143F P1_[0:4]
+ rc = fapiPutScom(i_target_mba,
+ DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P1_0_0x800100750301143F,
+ data_buffer); if(rc) return rc;
+ rc = fapiPutScom(i_target_mba,
+ DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P1_1_0x800104750301143F,
+ data_buffer); if(rc) return rc;
+ rc = fapiPutScom(i_target_mba,
+ DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P1_2_0x800108750301143F,
+ data_buffer); if(rc) return rc;
+ rc = fapiPutScom(i_target_mba,
+ DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P1_3_0x80010C750301143F,
+ data_buffer); if(rc) return rc;
+ rc = fapiPutScom(i_target_mba,
+ DPHY01_DDRPHY_DP18_IO_TX_CONFIG0_P1_4_0x800110750301143F,
+ data_buffer); if(rc) return rc;
+ }
} // end DATA
else // Slew type = ADR
{
@@ -642,6 +649,8 @@ fapi::ReturnCode config_slew_rate(const fapi::Target & i_target_mba,
FAPI_DBG("port%u type=%u slew_idx=%u imp_idx=%u cal_slew=%u",
i_port, i_slew_type, slew_idx, imp_idx, slew_cal_value);
+ if (i_port == 0) // port 0 adr slew
+ {
rc = fapiGetScom(i_target_mba,
DPHY01_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR0_0x8000401A0301143F,
data_buffer); if(rc) return rc;
@@ -666,10 +675,12 @@ fapi::ReturnCode config_slew_rate(const fapi::Target & i_target_mba,
rc = fapiPutScom(i_target_mba,
DPHY01_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR3_0x80004C1A0301143F,
data_buffer); if(rc) return rc;
+ }
+ else // port 1 adr slew
+ {
rc = fapiGetScom(i_target_mba,
- DPHY01_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR0_0x8001401A0301143F,
- data_buffer); if(rc) return rc;
-
+ DPHY01_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR0_0x8001401A0301143F,
+ data_buffer); if(rc) return rc;
rc_num |= data_buffer.insertFromRight(slew_cal_value, adr_pos, 4);
if (rc_num)
{
@@ -690,6 +701,7 @@ fapi::ReturnCode config_slew_rate(const fapi::Target & i_target_mba,
rc = fapiPutScom(i_target_mba,
DPHY01_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR3_0x80014C1A0301143F,
data_buffer); if(rc) return rc;
+ }
} // end ADR
return rc;
}
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