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| author | Corey Swenson <cswenson@us.ibm.com> | 2014-10-06 09:31:09 -0500 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2014-10-06 13:14:55 -0500 |
| commit | 48fbeca0d3ddb1077fb84b97592e02f59cbd7eb1 (patch) | |
| tree | 7f1cf15492562a3e99eebb43e14b170ed1178a73 /src/usr/hwpf/hwp/dram_training | |
| parent | 5e8d612185ddcaf6af1c66c9ce4d2a98eebdb1ef (diff) | |
| download | talos-hostboot-48fbeca0d3ddb1077fb84b97592e02f59cbd7eb1.tar.gz talos-hostboot-48fbeca0d3ddb1077fb84b97592e02f59cbd7eb1.zip | |
Add back in the ifdef to prevent DDR4 LRDIMM training
Change-Id: I658d795f050b11a15d9e9da668ff447c5048f5eb
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/13821
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/hwpf/hwp/dram_training')
| -rw-r--r-- | src/usr/hwpf/hwp/dram_training/mss_draminit_training/mss_draminit_training.C | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit_training/mss_draminit_training.C b/src/usr/hwpf/hwp/dram_training/mss_draminit_training/mss_draminit_training.C index e20806255..a6cf22bd7 100644 --- a/src/usr/hwpf/hwp/dram_training/mss_draminit_training/mss_draminit_training.C +++ b/src/usr/hwpf/hwp/dram_training/mss_draminit_training/mss_draminit_training.C @@ -177,6 +177,8 @@ #include <mss_lrdimm_ddr4_funcs.H> #endif +#include <config.h> + #ifndef FAPI_LRDIMM using namespace fapi; fapi::ReturnCode mss_execute_lrdimm_mb_dram_training(Target& i_target) @@ -493,6 +495,7 @@ ReturnCode mss_draminit_training_cloned(Target& i_target) rc = mss_execute_zq_cal(i_target, port); if(rc) return rc; +#ifndef CONFIG_VPD_GETMACRO_USE_EFF_ATTR // Should only be called for DDR4 LRDIMMs, training code is in development. Does not effect any other configs if ( (dram_gen == ENUM_ATTR_EFF_DRAM_GEN_DDR4) && (dimm_type == fapi::ENUM_ATTR_EFF_DIMM_TYPE_LRDIMM) ) @@ -502,7 +505,8 @@ ReturnCode mss_draminit_training_cloned(Target& i_target) rc = mss_mxd_training(i_target,port,0); if(rc) return rc; } - } +#endif + } if ( (dram_gen == ENUM_ATTR_EFF_DRAM_GEN_DDR3) && (dimm_type == fapi::ENUM_ATTR_EFF_DIMM_TYPE_LRDIMM) ) @@ -732,6 +736,7 @@ ReturnCode mss_draminit_training_cloned(Target& i_target) if(rc) return rc; } } +#ifndef CONFIG_VPD_GETMACRO_USE_EFF_ATTR // Should only be called for DDR4 LRDIMMs, training code is in development. Does not effect any other configs else if ( (group == 0) && (cur_cal_step == 1) && (dram_gen == ENUM_ATTR_EFF_DRAM_GEN_DDR4) @@ -740,7 +745,7 @@ ReturnCode mss_draminit_training_cloned(Target& i_target) rc = mss_dram_write_leveling(i_target, port); if(rc) return rc; } - +#endif //Set the config register if(port == 0) { |
