diff options
| author | Thi Tran <thi@us.ibm.com> | 2013-03-03 13:02:38 -0600 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2013-03-05 12:18:09 -0600 |
| commit | 2cd51b10fa1bf295a8b3b35553226aab5d103af7 (patch) | |
| tree | aa256b43d22b0b85b36ecaea8dc0140ff8f02bca /src/usr/hwpf/hwp/dram_training | |
| parent | 6e96f79fbadb624ef2aac82c6f2e4743291c5dd7 (diff) | |
| download | talos-hostboot-2cd51b10fa1bf295a8b3b35553226aab5d103af7.tar.gz talos-hostboot-2cd51b10fa1bf295a8b3b35553226aab5d103af7.zip | |
TULETA Bring Up - HW procedures update 03/03/2013
Revert io_run_training to 1.28
Update from review comment
Change-Id: I2c94f24e3818ae1ffc6c629a5e904681e70205e2
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3405
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/hwpf/hwp/dram_training')
7 files changed, 534 insertions, 3024 deletions
diff --git a/src/usr/hwpf/hwp/dram_training/makefile b/src/usr/hwpf/hwp/dram_training/makefile index e251b81e7..13f468553 100644 --- a/src/usr/hwpf/hwp/dram_training/makefile +++ b/src/usr/hwpf/hwp/dram_training/makefile @@ -48,6 +48,7 @@ EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/dram_training/mem_startclocks EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/dram_training/mss_scominit EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/dram_training/mem_pll_setup EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv +EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build ## NOTE: add new object files when you add a new HWP OBJS = dram_training.o \ diff --git a/src/usr/hwpf/hwp/dram_training/memory_errors.xml b/src/usr/hwpf/hwp/dram_training/memory_errors.xml index 3eb48ee4a..b12665f62 100644 --- a/src/usr/hwpf/hwp/dram_training/memory_errors.xml +++ b/src/usr/hwpf/hwp/dram_training/memory_errors.xml @@ -21,8 +21,7 @@ <!-- --> <!-- IBM_PROLOG_END_TAG --> <hwpErrors> -<!-- DO NOT EDIT THIS FILE DIRECTLY PLEASE UPDATE THE ODS FILE AND FOLLOW THE INSTRUCTION TAB --> -<!-- PLEASE SEE MARK BELLOWS (BELLOWS.IBM.COM) OR OTHERS ON MEMORY TEAM FOR HELP --> +<!-- EDIT THIS FILE DIRECTLY. THE ODS FILE METHOD IS NO LONGER VALID --> <!-- *********************************************************************** --> <hwpError> @@ -613,6 +612,111 @@ </hwpError> <hwpError> + <rc>RC_MSS_MAINT_GET_ADDRESS_RANGE_BAD_INPUT</rc> + <description>i_rank input to mss_get_address_range out of range</description> + <!-- FFDC: MBA target --> + <ffdc>MBA</ffdc> + <!-- FFDC: RANK we are trying to get address range for --> + <ffdc>RANK</ffdc> + <!-- TODO: Callout FW HIGH --> +</hwpError> + + <hwpError> + <rc>RC_MSS_MAINT_GET_MARK_STORE_BAD_INPUT</rc> + <description>i_rank input to mss_get_mark_store out of range</description> + <!-- FFDC: MBA target --> + <ffdc>MBA</ffdc> + <!-- FFDC: RANK we are trying read markstore for --> + <ffdc>RANK</ffdc> + <!-- TODO: Callout FW HIGH --> +</hwpError> + + <hwpError> + <rc>RC_MSS_MAINT_PUT_MARK_STORE_BAD_INPUT</rc> + <description>i_rank input to mss_put_mark_store out of range</description> + <!-- FFDC: MBA target --> + <ffdc>MBA</ffdc> + <!-- FFDC: RANK we are trying write markstore for --> + <ffdc>RANK</ffdc> + <!-- TODO: Callout FW HIGH --> +</hwpError> + + <hwpError> + <rc>RC_MSS_MAINT_GET_STEER_MUX_BAD_INPUT</rc> + <description>i_rank or i_muxType input to mss_get_steer_mux out of range</description> + <!-- FFDC: MBA target --> + <ffdc>MBA</ffdc> + <!-- FFDC: RANK we are reading steer mux for --> + <ffdc>RANK</ffdc> + <!-- FFDC: MUX_TYPE: read or write --> + <ffdc>MUX_TYPE</ffdc> + <!-- TODO: Callout FW HIGH --> +</hwpError> + + <hwpError> + <rc>RC_MSS_MAINT_PUT_STEER_MUX_BAD_INPUT</rc> + <description>i_rank or i_muxType or i_steerType or i_symbol input to mss_get_steer_mux out of range</description> + <!-- FFDC: MBA target --> + <ffdc>MBA</ffdc> + <!-- FFDC: RANK we are writing steer mux for --> + <ffdc>RANK</ffdc> + <!-- FFDC: MUX_TYPE: read or write --> + <ffdc>MUX_TYPE</ffdc> + <!-- FFDC: STEER_TYPE: port0 spare, port1 spare or ecc spare --> + <ffdc>STEER_TYPE</ffdc> + <!-- FFDC: SYMBOL: 0-71 --> + <ffdc>SYMBOL</ffdc> + <!-- TODO: Callout FW HIGH --> +</hwpError> + + <hwpError> + <rc>RC_MSS_MAINT_DO_STEER_INPUT_OUT_OF_RANGE</rc> + <description>i_rank or i_symbol input to mss_do_steer out of range</description> + <!-- FFDC: MBA target --> + <ffdc>MBA</ffdc> + <!-- FFDC: RANK we are writing steer mux for --> + <ffdc>RANK</ffdc> + <!-- FFDC: SYMBOL: 0-71 --> + <ffdc>SYMBOL</ffdc> + <!-- FFDC: X4ECCSPARE: true or false --> + <ffdc>X4ECCSPARE</ffdc> + <!-- TODO: Callout FW HIGH --> +</hwpError> + + <hwpError> + <rc>RC_MSS_MAINT_UNSUCCESSFUL_FORCED_MAINT_CMD_STOP</rc> + <description>MBMSRQ[0] = 1, unsuccessful forced maint cmd stop.</description> + <!-- FFDC: Capture register we used to stop cmd --> + <ffdc>MBMCC</ffdc> + <!-- FFDC: Capture register we are checking --> + <ffdc>MBMSR</ffdc> + <!-- FFDC: Capture command type we are trying to run --> + <ffdc>CMD_TYPE</ffdc> + <!-- Callout MBA HIGH --> + <callout><target>MBA</target><priority>HIGH</priority></callout> + <!-- Deconfigure MBA --> + <deconfigure><target>MBA</target></deconfigure> + <!-- Create GARD record for MASTER_CHIP --> + <gard><target>MBA</target></gard> +</hwpError> + + + <hwpError> + <rc>RC_MSS_MEMDIAGS_RESTORE_REPAIRS_EXCEEDED</rc> + <description>FATAL: Memdiags exiting with error before running patterns, due to DRAM repairs exceeded.</description> + <!-- FFDC: MBA target --> + <ffdc>MBA</ffdc> +</hwpError> + + <hwpError> + <rc>RC_MSS_MEMDIAGS_UE_OR_SUE_IN_LAST_PATTERN</rc> + <description>FATAL: Memdiags exiting with error due to UE, or SUE(in last pattern).</description> + <!-- FFDC: MBA target --> + <ffdc>MBA</ffdc> +</hwpError> + + + <hwpError> <rc>RC_MSS_UNSUPPORTED_SPD_DATA</rc> <description>Invalid SPD data returned.</description> </hwpError> @@ -765,6 +869,32 @@ <description>Invalid input </description> </hwpError> -<!-- DO NOT EDIT THIS FILE DIRECTLY PLEASE UPDATE THE ODS FILE AND FOLLOW THE INSTRUCTION TAB --> -<!-- PLEASE SEE MARK BELLOWS (BELLOWS.IBM.COM) OR OTHERS ON MEMORY TEAM FOR HELP --> +<hwpError> + <rc>RC_MSS_NON_CHECKER_BOARD_MODE_GROUPING_NOT_POSSIBLE</rc> + <description>FABRIC IS IN NON-CHECKER BOARD MODE. SET ATTRIBUTE 'ATTR_MSS_INTERLEAVE_ENABLE' TO SUPPORT '2MCS/GROUP, 4MCS/GROUP AND 8MCS/GROUP'. OR ENABLE CHECKER BOARD, TO SUPPORT '1MCS/GROUP'. MRW NEEDS TO BE UPDATED. </description> +</hwpError> + +<hwpError> + <rc>RC_MSS_CHECKER_BOARD_MODE_GROUPING_NOT_POSSIBLE</rc> + <description>FABRIC IS IN CHECKER BOARD MODE BUT IT DOES NOT SUPPORT 1MCS/GROUP. SET ATTRIBUTE 'ATTR_MSS_INTERLEAVE_ENABLE' TO SUPPORT '1MCS/GROUP'. OR DISABLE CHECKER BOARD, TO SUPPORT '2MCS/GROUP, 4MCS/GROUP AND 8MCS/GROUP'. MRW NEEDS TO BE UPDATED. </description> +</hwpError> + +<hwpError> + <rc>RC_MSS_UNABLE_TO_GROUP_MCS</rc> + <description>MCS COULD NOT BE GROUPED. EITHER SWITCH DIMMS SO GROUPING IS POSSIBLE OR CHANGE SYSTEM POLICY.</description> + <gard><target>TARGET_MCS</target></gard> + <deconfigure><target>TARGET_MCS</target></deconfigure> +</hwpError> + +<hwpError> + <rc>RC_MSS_UNABLE_TO_GROUP_SUMMARY</rc> + <description>MCS COULD NOT BE GROUPED. SEE PREVIOUS ERROR MESSAGES FOR WHICH MCS HAS BEEN RC_MSS_UNABLE_TO_GROUP_MCS</description> +</hwpError> + +<hwpError> + <rc>RC_MSS_BASE_ADDRESS_OVERLAPS_MIRROR_ADDRESS</rc> + <description>MIRROR BASE ADDRESS OVERLAPS WITH MEMORY BASE ADDRESS.</description> +</hwpError> + +<!-- EDIT THIS FILE DIRECTLY. THE ODS FILE METHOD IS NO LONGER VALID --> </hwpErrors> diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit/mss_draminit.C b/src/usr/hwpf/hwp/dram_training/mss_draminit/mss_draminit.C index f5ab3267f..b8d6d9b2f 100755 --- a/src/usr/hwpf/hwp/dram_training/mss_draminit/mss_draminit.C +++ b/src/usr/hwpf/hwp/dram_training/mss_draminit/mss_draminit.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: mss_draminit.C,v 1.44 2013/01/25 15:16:21 jdsloat Exp $ +// $Id: mss_draminit.C,v 1.46 2013/02/12 17:24:16 jdsloat Exp $ //------------------------------------------------------------------------------ // Don't forget to create CVS comments when you check in your changes! //------------------------------------------------------------------------------ @@ -28,6 +28,8 @@ //------------------------------------------------------------------------------ // Version:| Author: | Date: | Comment: //---------|----------|---------|----------------------------------------------- +// 1.46 | jdsloat | 02/12/13| Fixed RTT_WR in MR2 +// 1.45 | jdsloat | 01/28/13| is_sim check for address mirror mode // 1.44 | jdsloat | 01/25/13| Address Mirror Mode added for dual drop CDIMMs // 1.43 | bellows | 12/06/12| Fixed Review Comment // 1.42 | jdsloat | 12/02/12| SHADOW REG PRINT OUT FIX @@ -168,6 +170,7 @@ ReturnCode mss_draminit_cloned(Target& i_target) uint8_t secondary_ranks_array[4][2]; //secondary_ranks_array[group][port] uint8_t tertiary_ranks_array[4][2]; //tertiary_ranks_array[group][port] uint8_t quaternary_ranks_array[4][2]; //quaternary_ranks_array[group][port] + uint8_t is_sim = 0; //populate primary_ranks_arrays_array @@ -212,11 +215,14 @@ ReturnCode mss_draminit_cloned(Target& i_target) if(rc) return rc; rc = FAPI_ATTR_GET(ATTR_EFF_DIMM_TYPE, &i_target, dimm_type); if(rc) return rc; + rc = FAPI_ATTR_GET(ATTR_IS_SIMULATION, NULL, is_sim); + if(rc) return rc; // Check to see if it's Dual drop and needs address mirror mode. Set the approriate flag. if ( (dimm_type == ENUM_ATTR_EFF_DIMM_TYPE_CDIMM) && (num_drops_per_port == ENUM_ATTR_EFF_NUM_DROPS_PER_PORT_DUAL) - && (dram_gen == ENUM_ATTR_EFF_DRAM_GEN_DDR3) ) + && (dram_gen == ENUM_ATTR_EFF_DRAM_GEN_DDR3) + && (is_sim == 0) ) { FAPI_INF( "Setting Address Mirroring in the PHY"); @@ -1017,6 +1023,10 @@ ReturnCode mss_mrs_load( rc = FAPI_ATTR_GET(ATTR_EFF_DIMM_TYPE, &i_target, dimm_type); if(rc) return rc; + uint8_t is_sim = 0; + rc = FAPI_ATTR_GET(ATTR_IS_SIMULATION, NULL, is_sim); + if(rc) return rc; + //Lines commented out in the following section are waiting for xml attribute adds //MRS0 @@ -1427,7 +1437,7 @@ ReturnCode mss_mrs_load( rc_num = rc_num | mrs2.insert((uint8_t) sr_temp, 7, 1); rc_num = rc_num | mrs2.insert((uint8_t) 0x00, 8, 1); rc_num = rc_num | mrs2.insert((uint8_t) dram_rtt_wr[i_port_number][dimm_number][rank_number], 9, 2); - rc_num = rc_num | mrs2.insert((uint8_t) 0x00, 10, 6); + rc_num = rc_num | mrs2.insert((uint8_t) 0x00, 11, 5); rc_num = rc_num | mrs2.extractPreserve(&MRS2, 0, 16, 0); @@ -1487,7 +1497,7 @@ ReturnCode mss_mrs_load( rc_num = rc_num | bank_pre_AMM_3.insert((uint8_t) MRS0_BA, 2, 1, 5); } - if ( (dimm_type == ENUM_ATTR_EFF_DIMM_TYPE_CDIMM) && (dimm_number == 1) ) + if ( (dimm_type == ENUM_ATTR_EFF_DIMM_TYPE_CDIMM) && (dimm_number == 1) && (is_sim == 0)) { FAPI_INF( "ADDRESS MIRRORING ON PORT%d DIMM%d RANK%d", i_port_number, dimm_number, rank_number); diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit_mc/mss_draminit_mc.C b/src/usr/hwpf/hwp/dram_training/mss_draminit_mc/mss_draminit_mc.C index 954849674..f1a1812f5 100644 --- a/src/usr/hwpf/hwp/dram_training/mss_draminit_mc/mss_draminit_mc.C +++ b/src/usr/hwpf/hwp/dram_training/mss_draminit_mc/mss_draminit_mc.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: mss_draminit_mc.C,v 1.31 2013/01/21 16:47:20 lapietra Exp $ +// $Id: mss_draminit_mc.C,v 1.33 2013/02/04 20:04:51 lapietra Exp $ //------------------------------------------------------------------------------ // *! (C) Copyright International Business Machines Corp. 2011 // *! All Rights Reserved -- Property of IBM @@ -44,6 +44,8 @@ //------------------------------------------------------------------------------ // Version:| Author: | Date: | Comment: //---------|----------|---------|----------------------------------------------- +// 1.33 | dcadiga |04-FEB-13| For some reason the main procedure call was commented out in the last commit... commenting it back in +// 1.32 | gollub |31-JAN-13| Uncommenting mss_unmask_maint_errors and mss_unmask_inband_errors // 1.31 | dcadiga |21-JAN-13| Fixed variable name for memcal_interval (coded as memcal_iterval...) // 1.30 | dcadiga |21-JAN-13| Hardcoded memcal interval to 0 (disabled) until attribute for EC is available // 1.29 | jdsloat |14-JAN-13| Owner changed to Dave Cadigan. @@ -124,20 +126,20 @@ ReturnCode mss_draminit_mc(Target& i_target) // Target is centaur.mba fapi::ReturnCode l_rc; - + //Commented back in by dcadiga l_rc = mss_draminit_mc_cloned(i_target); // If mss_unmask_maint_errors gets it's own bad rc, // it will commit the passed in rc (if non-zero), and return it's own bad rc. // Else if mss_unmask_maint_errors runs clean, // it will just return the passed in rc. - //l_rc = mss_unmask_maint_errors(i_target, l_rc); // TODO: uncomment after this can be tested on hw + l_rc = mss_unmask_maint_errors(i_target, l_rc); // If mss_unmask_inband_errors gets it's own bad rc, // it will commit the passed in rc (if non-zero), and return it's own bad rc. // Else if mss_unmask_inband_errors runs clean, // it will just return the passed in rc. - //l_rc = mss_unmask_inband_errors(i_target, l_rc); // TODO: uncomment after this can be tested on hw + l_rc = mss_unmask_inband_errors(i_target, l_rc); return l_rc; } diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_draminit_training_advanced.C b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_draminit_training_advanced.C index 3befd7465..2c317afc3 100644 --- a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_draminit_training_advanced.C +++ b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_draminit_training_advanced.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: mss_draminit_training_advanced.C,v 1.24 2013/01/17 20:55:31 sasethur Exp $ +// $Id: mss_draminit_training_advanced.C,v 1.25 2013/01/31 15:54:58 sasethur Exp $ /* File is created by SARAVANAN SETHURAMAN on Thur 29 Sept 2011. */ //------------------------------------------------------------------------------ @@ -64,6 +64,8 @@ // 1.22 | sasethur |07-Dec-12| Updated for FW review comments - multiple changes // 1.23 | sasethur |14-Dec-12| Updated for FW review comments // 1.24 | sasethur |17-Jan-13| Updated for mss_mcbist_common.C include file +// 1.25 | abhijsau |31-Jan-13| removed mss_mcbist_common.C include file , needs to be included while compiling + // This procedure Schmoo's DRV_IMP, SLEW, VREF (DDR, CEN), RCV_IMP based on attribute from effective config procedure // DQ & DQS Driver impedance, Slew rate, WR_Vref shmoo would call only write_eye shmoo for margin calculation @@ -82,7 +84,7 @@ //Centaur functions //---------------------------------------------------------------------- #include <mss_termination_control.H> -#include <mss_mcbist.H> +#include "mss_mcbist.H" #include <mss_shmoo_common.H> #include <mss_generic_shmoo.H> #include <mss_draminit_training_advanced.H> @@ -272,7 +274,7 @@ fapi::ReturnCode mss_draminit_training_advanced_cloned(const fapi::Target & i_ta { if (( l_num_ranks_per_dimm_u8array[l_port][0] > 0 ) || (l_num_ranks_per_dimm_u8array[l_port][1] > 0)) { - if(l_shmoo_param_valid != PARAM_NONE) + if((l_shmoo_param_valid != PARAM_NONE) || (l_shmoo_type_valid != TEST_NONE)) { if((l_shmoo_param_valid & DRV_IMP) != 0) { @@ -319,7 +321,7 @@ fapi::ReturnCode mss_draminit_training_advanced_cloned(const fapi::Target & i_ta return rc; } } - if ((l_shmoo_param_valid & DELAY_REG) != 0) + if (((l_shmoo_param_valid & DELAY_REG) != 0) || (l_shmoo_type_valid != 0)) { rc = delay_shmoo(i_target_mba, l_port, l_shmoo_type_valid, &l_left_margin, &l_right_margin,i_pattern,i_test_type); if (rc) @@ -962,9 +964,10 @@ fapi::ReturnCode delay_shmoo(const fapi::Target & i_target_mba, uint8_t i_port, uint8_t i_test_type) { fapi::ReturnCode rc; - // FAPI_INF(" Inside the delay shmoo "); + FAPI_INF(" Inside the delay shmoo " ); //Constructor CALL: generic_shmoo::generic_shmoo(uint8_t i_port, uint32_t shmoo_mask,shmoo_algorithm_t shmoo_algorithm) - generic_shmoo mss_shmoo=generic_shmoo(i_port,i_shmoo_type_valid,SEQ_LIN); + //generic_shmoo mss_shmoo=generic_shmoo(i_port,2,SEQ_LIN); + generic_shmoo mss_shmoo=generic_shmoo(i_port,i_shmoo_type_valid,SEQ_LIN); rc = mss_shmoo.run(i_target_mba, o_left_margin, o_right_margin,i_pattern,i_test_type); if(rc) { diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit_training/mss_draminit_training.C b/src/usr/hwpf/hwp/dram_training/mss_draminit_training/mss_draminit_training.C index d8036a84e..1a2f3b8e6 100644 --- a/src/usr/hwpf/hwp/dram_training/mss_draminit_training/mss_draminit_training.C +++ b/src/usr/hwpf/hwp/dram_training/mss_draminit_training/mss_draminit_training.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: mss_draminit_training.C,v 1.51 2013/01/31 22:33:54 gollub Exp $ +// $Id: mss_draminit_training.C,v 1.55 2013/02/25 19:05:31 jdsloat Exp $ //------------------------------------------------------------------------------ // Don't forget to create CVS comments when you check in your changes! //------------------------------------------------------------------------------ @@ -28,6 +28,13 @@ //------------------------------------------------------------------------------ // Version:| Author: | Date: | Comment: //---------|----------|---------|------------------------------------------------ +// 1.55 | jdsloat |25-FEB-13| Added MBA/Port info to debug messages. +// 1.54 | jdsloat |22-FEB-13| Edited WRITE_READ workaround to also edit DQSCLK PHASE +// 1.53 | jdsloat |14-FEB-13| Fixed WRITE_READ workaround so it will execute in a partial substep case +// | | | Edited mss_rtt_nom_rtt_wr_swap to only write rtt_nom with rtt_wr or supplied rtt_nom +// | | | Moved location of mss_rtt_nom_rtt_wr_swap around wr_lvl substep +// | | | Added Address Mirror Mode. +// 1.52 | jdsloat |07-FEB-13| Fixed address typo for RP3 in WRITE_READ workaround. // 1.51 | gollub |31-JAN-13| Uncommenting mss_unmask_draminit_training_errors // 1.50 | jdsloat |16-JAN-13| Fixed rank group enable within PC_INIT_CAL reg // 1.49 | jdsloat |08-JAN-13| Added clearing RD PHASE SELECT values post Read Centering Workaround. @@ -150,7 +157,8 @@ ReturnCode mss_draminit_training(Target& i_target); ReturnCode mss_draminit_training_cloned(Target& i_target); ReturnCode mss_check_cal_status(Target& i_target, uint8_t i_port, uint8_t i_group, mss_draminit_training_result& io_status); ReturnCode mss_check_error_status(Target& i_target, uint8_t i_port, uint8_t i_group, mss_draminit_training_result& io_status); -ReturnCode mss_rtt_nom_rtt_wr_swap( Target& i_target, uint32_t i_port_number, uint8_t i_rank, uint32_t i_rank_pair_group, uint32_t& io_ccs_inst_cnt); +ReturnCode mss_rtt_nom_rtt_wr_swap( Target& i_target, uint32_t i_port_number, uint8_t i_rank, uint32_t i_rank_pair_group, uint32_t& io_ccs_inst_cnt, uint8_t& io_dram_rtt_nom_original); + ReturnCode getC4dq2reg(const Target &i_mba, const uint8_t i_port, const uint8_t i_dimm, const uint8_t i_rank, ecmdDataBufferBase &o_reg); ReturnCode setC4dq2reg(const Target &i_mba, const uint8_t i_port, const uint8_t i_dimm, const uint8_t i_rank, ecmdDataBufferBase &o_reg); ReturnCode mss_set_bbm_regs (const fapi::Target & mba_target); @@ -252,11 +260,16 @@ ReturnCode mss_draminit_training_cloned(Target& i_target) uint8_t cal_steps = 0; uint8_t cur_cal_step = 0; ecmdDataBufferBase cal_steps_8(8); - uint64_t ADDR_0 = 0; - uint64_t ADDR_1 = 0; - uint64_t ADDR_2 = 0; - uint64_t ADDR_3 = 0; - uint64_t ADDR_4 = 0; + uint64_t DQSCLK_RD_PHASE_ADDR_0 = 0; + uint64_t DQSCLK_RD_PHASE_ADDR_1 = 0; + uint64_t DQSCLK_RD_PHASE_ADDR_2 = 0; + uint64_t DQSCLK_RD_PHASE_ADDR_3 = 0; + uint64_t DQSCLK_RD_PHASE_ADDR_4 = 0; + uint8_t l_value_u8 = 0; + uint8_t l_new_value_u8 = 0; + uint8_t l_nwell_misplacement = 0; + + uint8_t dram_rtt_nom_original = 0; enum mss_draminit_training_result cur_complete_status = MSS_INIT_CAL_COMPLETE; enum mss_draminit_training_result cur_error_status = MSS_INIT_CAL_PASS; @@ -264,6 +277,9 @@ ReturnCode mss_draminit_training_cloned(Target& i_target) enum mss_draminit_training_result complete_status = MSS_INIT_CAL_COMPLETE; enum mss_draminit_training_result error_status = MSS_INIT_CAL_PASS; + fapi::Target l_target_centaur; + rc = fapiGetParentChip(i_target, l_target_centaur); if(rc) return rc; + //populate primary_ranks_arrays_array rc = FAPI_ATTR_GET(ATTR_EFF_PRIMARY_RANK_GROUP0, &i_target, primary_ranks_array[0]); if(rc) return rc; @@ -274,9 +290,22 @@ ReturnCode mss_draminit_training_cloned(Target& i_target) rc = FAPI_ATTR_GET(ATTR_EFF_PRIMARY_RANK_GROUP3, &i_target, primary_ranks_array[3]); if(rc) return rc; + rc = FAPI_ATTR_GET(ATTR_MSS_NWELL_MISPLACEMENT, &l_target_centaur, l_nwell_misplacement); + if(rc) return rc; + + uint8_t mbaPosition; + // Get MBA position: 0 = mba01, 1 = mba23 + rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &i_target, mbaPosition); + if(rc) + { + FAPI_ERR("Error getting MBA position"); + return rc; + } + //Get which training steps we are to run rc = FAPI_ATTR_GET(ATTR_MSS_CAL_STEP_ENABLE, &i_target, cal_steps); if(rc) return rc; + rc_num = rc_num | cal_steps_8.insert(cal_steps, 0, 8, 0); //Set up CCS Mode Reg for Init cal @@ -310,7 +339,7 @@ ReturnCode mss_draminit_training_cloned(Target& i_target) (cal_steps_8.isBitClear(4)) && (cal_steps_8.isBitClear(5)) && (cal_steps_8.isBitClear(6)) && (cal_steps_8.isBitClear(7)) )) { - FAPI_INF( "Performing External ZQ Calibration."); + FAPI_INF( "Performing External ZQ Calibration on MBA %d.", mbaPosition); //Execute ZQ_CAL for(port = 0; port < MAX_NUM_PORT; port++) @@ -331,12 +360,6 @@ ReturnCode mss_draminit_training_cloned(Target& i_target) if(primary_ranks_array[group][port] != INVALID) { - // Temporarily disable this function for HW debug - // Change the RTT_NOM to RTT_WR, RTT_WR to RTT_NOM - //rc = mss_rtt_nom_rtt_wr_swap(i_target, port, primary_ranks_array[group][port], group, instruction_number); - if(rc) return rc; - - //Set up for Init Cal - Done per port pair rc_num = rc_num | test_buffer_4.setBit(0, 2); //Init Cal test = 11XX rc_num = rc_num | wen_buffer_1.flushTo1(); //Init Cal ras/cas/we = 1/1/1 @@ -344,7 +367,7 @@ ReturnCode mss_draminit_training_cloned(Target& i_target) rc_num = rc_num | rasn_buffer_1.flushTo1(); rc_num = rc_num | ddr_cal_enable_buffer_1.flushTo1(); //Init cal - FAPI_INF( "+++ Setting up Init Cal on rank group: %d cal_steps: 0x%02X +++", group, cal_steps); + FAPI_INF( "+++ Setting up Init Cal on MBA: %d Port: %d rank group: %d cal_steps: 0x%02X +++", mbaPosition, port, group, cal_steps); for(cur_cal_step = 1; cur_cal_step < MAX_CAL_STEPS; cur_cal_step++) //Cycle through all possible cal steps { @@ -466,7 +489,7 @@ ReturnCode mss_draminit_training_cloned(Target& i_target) (cal_steps_8.isBitClear(4)) && (cal_steps_8.isBitClear(5)) && (cal_steps_8.isBitClear(6)) && (cal_steps_8.isBitClear(7)) ) { - FAPI_INF( "+++ Executing ALL Cal Steps at the same time on rank group: %d +++", group); + FAPI_INF( "+++ Executing ALL Cal Steps at the same time on MBA: %d Port: %d rank group: %d +++", mbaPosition, port, group); rc_num = rc_num | data_buffer_64.setBit(48); rc_num = rc_num | data_buffer_64.setBit(50); rc_num = rc_num | data_buffer_64.setBit(51); @@ -477,42 +500,42 @@ ReturnCode mss_draminit_training_cloned(Target& i_target) } else if ( (cur_cal_step == 1) && (cal_steps_8.isBitSet(1)) ) { - FAPI_INF( "+++ Write Leveling (WR_LVL) on rank group: %d +++", group); + FAPI_INF( "+++ Write Leveling (WR_LVL) on MBA: %d Port %d rank group: %d +++", mbaPosition, port, group); rc_num = rc_num | data_buffer_64.setBit(48); } else if ( (cur_cal_step == 2) && (cal_steps_8.isBitSet(2)) ) { - FAPI_INF( "+++ DQS Align (DQS_ALIGN) on rank group: %d +++", group); + FAPI_INF( "+++ DQS Align (DQS_ALIGN) on MBA: %d Port: %d rank group: %d +++", mbaPosition, port, group); rc_num = rc_num | data_buffer_64.setBit(50); } else if ( (cur_cal_step == 3) && (cal_steps_8.isBitSet(3)) ) { - FAPI_INF( "+++ RD CLK Align (RDCLK_ALIGN) on rank group: %d +++", group); + FAPI_INF( "+++ RD CLK Align (RDCLK_ALIGN) on MBA: %d Port: %d rank group: %d +++", mbaPosition, port, group); rc_num = rc_num | data_buffer_64.setBit(51); } else if ( (cur_cal_step == 4) && (cal_steps_8.isBitSet(4)) ) { - FAPI_INF( "+++ Read Centering (READ_CTR) on rank group: %d +++", group); + FAPI_INF( "+++ Read Centering (READ_CTR) on MBA: %d Port: %d rank group: %d +++", mbaPosition, port, group); rc_num = rc_num | data_buffer_64.setBit(52); } else if ( (cur_cal_step == 5) && (cal_steps_8.isBitSet(5)) ) { - FAPI_INF( "+++ Write Centering (WRITE_CTR) on rank group: %d +++", group); + FAPI_INF( "+++ Write Centering (WRITE_CTR) on MBA: %d Port: %d rank group: %d +++", mbaPosition, port, group); rc_num = rc_num | data_buffer_64.setBit(53); } else if ( (cur_cal_step == 6) && (cal_steps_8.isBitSet(6)) && (cal_steps_8.isBitClear(7)) ) { - FAPI_INF( "+++ Initial Course Write (COURSE_WR) on rank group: %d +++", group); + FAPI_INF( "+++ Initial Course Write (COURSE_WR) on MBA: %d Port: %d rank group: %d +++", mbaPosition, port, group); rc_num = rc_num | data_buffer_64.setBit(54); } else if ( (cur_cal_step == 6) && (cal_steps_8.isBitClear(6)) && (cal_steps_8.isBitSet(7)) ) { - FAPI_INF( "+++ Course Read (COURSE_RD) on rank group: %d +++", group); + FAPI_INF( "+++ Course Read (COURSE_RD) on MBA: %d Port: %d rank group: %d +++", mbaPosition, port, group); rc_num = rc_num | data_buffer_64.setBit(55); } else if ( (cur_cal_step == 6) && (cal_steps_8.isBitSet(6)) && (cal_steps_8.isBitSet(7)) ) { - FAPI_INF( "+++ Initial Course Write (COURSE_WR) and Course Read (COURSE_RD) simultaneously on rank group: %d +++", group); + FAPI_INF( "+++ Initial Course Write (COURSE_WR) and Course Read (COURSE_RD) simultaneously on MBA: %d Port: %d rank group: %d +++", mbaPosition, port, group); rc_num = rc_num | data_buffer_64.setBit(54); rc_num = rc_num | data_buffer_64.setBit(55); } @@ -526,6 +549,20 @@ ReturnCode mss_draminit_training_cloned(Target& i_target) if ( !( data_buffer_64.isBitClear(48, 8) ) ) // Only execute if we are doing a Cal Step { + // Before WR_LVL --- Change the RTT_NOM to RTT_WR pre-WR_LVL + if (cur_cal_step == 1) + { + dram_rtt_nom_original = 0; + rc = mss_rtt_nom_rtt_wr_swap(i_target, + port, + primary_ranks_array[group][port], + group, + instruction_number, + dram_rtt_nom_original); + if(rc) return rc; + } + + //Set the config register if(port == 0) { @@ -571,6 +608,7 @@ ReturnCode mss_draminit_training_cloned(Target& i_target) if(rc) return rc; //Error handling for mss_ccs_inst built into mss_funcs + rc = mss_execute_ccs_inst_array( i_target, NUM_POLL, 60); if(rc) return rc; //Error handling for mss_ccs_inst built into mss_funcs @@ -592,125 +630,196 @@ ReturnCode mss_draminit_training_cloned(Target& i_target) error_status = cur_error_status; } - if ( (cur_cal_step == 4) && (cal_steps_8.isBitSet(5)) ) + // Following WR_LVL -- Restore RTT_NOM to orignal value post-wr_lvl + if (cur_cal_step == 1) + { + rc = mss_rtt_nom_rtt_wr_swap(i_target, + port, + primary_ranks_array[group][port], + group, + instruction_number, + dram_rtt_nom_original); + if(rc) return rc; + + } + + // Following Read Centering -- Enter into READ CENTERING WORKAROUND + // Adding a switch in anticipation of depending on the NWELL state. + // Currently will execute in either case + if ( (cur_cal_step == 4) && + ( ( l_nwell_misplacement == fapi::ENUM_ATTR_MSS_NWELL_MISPLACEMENT_TRUE ) + ||( l_nwell_misplacement == fapi::ENUM_ATTR_MSS_NWELL_MISPLACEMENT_FALSE ) ) ) { FAPI_INF( "+++ Read Centering Workaround on rank group: %d +++", group); FAPI_INF( "+++ Clearing values from RD PHASE SELECT regs. +++"); + FAPI_INF( "+++ Incrementing by 2 values from DQS CLK PHASE SELECT regs. +++"); if ( port == 0 ) { if ( group == 0 ) { - ADDR_0 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_0_0x800000090301143F; - ADDR_1 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_1_0x800004090301143F; - ADDR_2 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_2_0x800008090301143F; - ADDR_3 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_3_0x80000C090301143F; - ADDR_4 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_4_0x800010090301143F; + DQSCLK_RD_PHASE_ADDR_0 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_0_0x800000090301143F; + DQSCLK_RD_PHASE_ADDR_1 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_1_0x800004090301143F; + DQSCLK_RD_PHASE_ADDR_2 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_2_0x800008090301143F; + DQSCLK_RD_PHASE_ADDR_3 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_3_0x80000C090301143F; + DQSCLK_RD_PHASE_ADDR_4 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_4_0x800010090301143F; + } else if ( group == 1 ) { - ADDR_0 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_0_0x800001090301143F; - ADDR_1 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_1_0x800005090301143F; - ADDR_2 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_2_0x800009090301143F; - ADDR_3 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_3_0x80000D090301143F; - ADDR_4 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_4_0x800011090301143F; + DQSCLK_RD_PHASE_ADDR_0 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_0_0x800001090301143F; + DQSCLK_RD_PHASE_ADDR_1 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_1_0x800005090301143F; + DQSCLK_RD_PHASE_ADDR_2 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_2_0x800009090301143F; + DQSCLK_RD_PHASE_ADDR_3 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_3_0x80000D090301143F; + DQSCLK_RD_PHASE_ADDR_4 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_4_0x800011090301143F; + } else if ( group == 2 ) { - ADDR_0 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_0_0x800002090301143F; - ADDR_1 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_1_0x800006090301143F; - ADDR_2 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_2_0x80000A090301143F; - ADDR_3 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_3_0x80000E090301143F; - ADDR_4 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_4_0x800012090301143F; + DQSCLK_RD_PHASE_ADDR_0 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_0_0x800002090301143F; + DQSCLK_RD_PHASE_ADDR_1 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_1_0x800006090301143F; + DQSCLK_RD_PHASE_ADDR_2 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_2_0x80000A090301143F; + DQSCLK_RD_PHASE_ADDR_3 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_3_0x80000E090301143F; + DQSCLK_RD_PHASE_ADDR_4 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_4_0x800012090301143F; + } else if ( group == 3 ) { - ADDR_0 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_0_0x800002090301143F; - ADDR_1 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_1_0x800006090301143F; - ADDR_2 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_2_0x80000A090301143F; - ADDR_3 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_3_0x80000E090301143F; - ADDR_4 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_4_0x800012090301143F; + DQSCLK_RD_PHASE_ADDR_0 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_0_0x800003090301143F; + DQSCLK_RD_PHASE_ADDR_1 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_1_0x800007090301143F; + DQSCLK_RD_PHASE_ADDR_2 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_2_0x80000B090301143F; + DQSCLK_RD_PHASE_ADDR_3 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_3_0x80000F090301143F; + DQSCLK_RD_PHASE_ADDR_4 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_4_0x800013090301143F; + } } else if (port == 1 ) { if ( group == 0 ) { - ADDR_0 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_0_0x800100090301143F; - ADDR_1 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_1_0x800104090301143F; - ADDR_2 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_2_0x800108090301143F; - ADDR_3 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_3_0x80010C090301143F; - ADDR_4 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_4_0x800110090301143F; + DQSCLK_RD_PHASE_ADDR_0 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_0_0x800100090301143F; + DQSCLK_RD_PHASE_ADDR_1 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_1_0x800104090301143F; + DQSCLK_RD_PHASE_ADDR_2 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_2_0x800108090301143F; + DQSCLK_RD_PHASE_ADDR_3 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_3_0x80010C090301143F; + DQSCLK_RD_PHASE_ADDR_4 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_4_0x800110090301143F; + } else if ( group == 1 ) { - ADDR_0 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_0_0x800101090301143F; - ADDR_1 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_1_0x800105090301143F; - ADDR_2 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_2_0x800109090301143F; - ADDR_3 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_3_0x80010D090301143F; - ADDR_4 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_4_0x800111090301143F; + DQSCLK_RD_PHASE_ADDR_0 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_0_0x800101090301143F; + DQSCLK_RD_PHASE_ADDR_1 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_1_0x800105090301143F; + DQSCLK_RD_PHASE_ADDR_2 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_2_0x800109090301143F; + DQSCLK_RD_PHASE_ADDR_3 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_3_0x80010D090301143F; + DQSCLK_RD_PHASE_ADDR_4 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_4_0x800111090301143F; + + } else if ( group == 2 ) { - ADDR_0 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_0_0x800102090301143F; - ADDR_1 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_1_0x800106090301143F; - ADDR_2 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_2_0x80010A090301143F; - ADDR_3 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_3_0x80010E090301143F; - ADDR_4 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_4_0x800112090301143F; + DQSCLK_RD_PHASE_ADDR_0 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_0_0x800102090301143F; + DQSCLK_RD_PHASE_ADDR_1 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_1_0x800106090301143F; + DQSCLK_RD_PHASE_ADDR_2 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_2_0x80010A090301143F; + DQSCLK_RD_PHASE_ADDR_3 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_3_0x80010E090301143F; + DQSCLK_RD_PHASE_ADDR_4 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_4_0x800112090301143F; + } else if ( group == 3 ) { - ADDR_0 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_0_0x800103090301143F; - ADDR_1 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_1_0x800107090301143F; - ADDR_2 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_2_0x80010B090301143F; - ADDR_3 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_3_0x80010F090301143F; - ADDR_4 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_4_0x800113090301143F; + DQSCLK_RD_PHASE_ADDR_0 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_0_0x800103090301143F; + DQSCLK_RD_PHASE_ADDR_1 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_1_0x800107090301143F; + DQSCLK_RD_PHASE_ADDR_2 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_2_0x80010B090301143F; + DQSCLK_RD_PHASE_ADDR_3 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_3_0x80010F090301143F; + DQSCLK_RD_PHASE_ADDR_4 = DPHY01_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_4_0x800113090301143F; + } } - rc = fapiGetScom(i_target, ADDR_0, data_buffer_64); + // Set Read Phase to 0. + //Increment dqs clk 2. 4 is the limit, wrap around (IE 5 = 1, 6 = 2) + rc = fapiGetScom(i_target, DQSCLK_RD_PHASE_ADDR_0, data_buffer_64); + if (rc) return rc; rc_num = rc_num | data_buffer_64.clearBit(50, 2); rc_num = rc_num | data_buffer_64.clearBit(54, 2); rc_num = rc_num | data_buffer_64.clearBit(58, 2); rc_num = rc_num | data_buffer_64.clearBit(62, 2); - rc = fapiPutScom(i_target, ADDR_0, data_buffer_64); - rc = fapiGetScom(i_target, ADDR_1, data_buffer_64); + for ( uint8_t l_element_u8 = 0; l_element_u8 < 4; l_element_u8 += 1 ) { + l_value_u8 = 0; + data_buffer_64.extractToRight(&l_value_u8, (48 + (l_element_u8 * 4)), 2); + l_new_value_u8 = (l_value_u8 + 2) % 4; + data_buffer_64.insertFromRight(&l_new_value_u8, (48 + (l_element_u8 * 4)), 2); + } + rc = fapiPutScom(i_target, DQSCLK_RD_PHASE_ADDR_0, data_buffer_64); + if (rc) return rc; + + rc = fapiGetScom(i_target, DQSCLK_RD_PHASE_ADDR_1, data_buffer_64); + if (rc) return rc; rc_num = rc_num | data_buffer_64.clearBit(50, 2); rc_num = rc_num | data_buffer_64.clearBit(54, 2); rc_num = rc_num | data_buffer_64.clearBit(58, 2); rc_num = rc_num | data_buffer_64.clearBit(62, 2); - rc = fapiPutScom(i_target, ADDR_1, data_buffer_64); - rc = fapiGetScom(i_target, ADDR_2, data_buffer_64); + for ( uint8_t l_element_u8 = 0; l_element_u8 < 4; l_element_u8 += 1 ) { + l_value_u8 = 0; + data_buffer_64.extractToRight(&l_value_u8, (48 + (l_element_u8 * 4)), 2); + l_new_value_u8 = (l_value_u8 + 2) % 4; + data_buffer_64.insertFromRight(&l_new_value_u8, (48 + (l_element_u8 * 4)), 2); + } + rc = fapiPutScom(i_target, DQSCLK_RD_PHASE_ADDR_1, data_buffer_64); + if (rc) return rc; + + rc = fapiGetScom(i_target, DQSCLK_RD_PHASE_ADDR_2, data_buffer_64); + if (rc) return rc; rc_num = rc_num | data_buffer_64.clearBit(50, 2); rc_num = rc_num | data_buffer_64.clearBit(54, 2); rc_num = rc_num | data_buffer_64.clearBit(58, 2); rc_num = rc_num | data_buffer_64.clearBit(62, 2); - rc = fapiPutScom(i_target, ADDR_2, data_buffer_64); - rc = fapiGetScom(i_target, ADDR_3, data_buffer_64); + for ( uint8_t l_element_u8 = 0; l_element_u8 < 4; l_element_u8 += 1 ) { + l_value_u8 = 0; + data_buffer_64.extractToRight(&l_value_u8, (48 + (l_element_u8 * 4)), 2); + l_new_value_u8 = (l_value_u8 + 2) % 4; + data_buffer_64.insertFromRight(&l_new_value_u8, (48 + (l_element_u8 * 4)), 2); + } + rc = fapiPutScom(i_target, DQSCLK_RD_PHASE_ADDR_2, data_buffer_64); + if (rc) return rc; + + rc = fapiGetScom(i_target, DQSCLK_RD_PHASE_ADDR_3, data_buffer_64); + if (rc) return rc; rc_num = rc_num | data_buffer_64.clearBit(50, 2); rc_num = rc_num | data_buffer_64.clearBit(54, 2); rc_num = rc_num | data_buffer_64.clearBit(58, 2); rc_num = rc_num | data_buffer_64.clearBit(62, 2); - rc = fapiPutScom(i_target, ADDR_3, data_buffer_64); - rc = fapiGetScom(i_target, ADDR_4, data_buffer_64); + for ( uint8_t l_element_u8 = 0; l_element_u8 < 4; l_element_u8 += 1 ) { + l_value_u8 = 0; + data_buffer_64.extractToRight(&l_value_u8, (48 + (l_element_u8 * 4)), 2); + l_new_value_u8 = (l_value_u8 + 2) % 4; + data_buffer_64.insertFromRight(&l_new_value_u8, (48 + (l_element_u8 * 4)), 2); + } + rc = fapiPutScom(i_target, DQSCLK_RD_PHASE_ADDR_3, data_buffer_64); + if (rc) return rc; + + rc = fapiGetScom(i_target, DQSCLK_RD_PHASE_ADDR_4, data_buffer_64); + if (rc) return rc; rc_num = rc_num | data_buffer_64.clearBit(50, 2); rc_num = rc_num | data_buffer_64.clearBit(54, 2); rc_num = rc_num | data_buffer_64.clearBit(58, 2); rc_num = rc_num | data_buffer_64.clearBit(62, 2); - rc = fapiPutScom(i_target, ADDR_4, data_buffer_64); + + for ( uint8_t l_element_u8 = 0; l_element_u8 < 4; l_element_u8 += 1 ) { + l_value_u8 = 0; + data_buffer_64.extractToRight(&l_value_u8, (48 + (l_element_u8 * 4)), 2); + l_new_value_u8 = (l_value_u8 + 2) % 4; + data_buffer_64.insertFromRight(&l_new_value_u8, (48 + (l_element_u8 * 4)), 2); + } + rc = fapiPutScom(i_target, DQSCLK_RD_PHASE_ADDR_4, data_buffer_64); + if (rc) return rc; } } }//end of step loop - - // Temporarily disable this function for HW debug - // Change the RTT_NOM to RTT_WR, RTT_WR to RTT_NOM - //rc = mss_rtt_nom_rtt_wr_swap(i_target, port, primary_ranks_array[group][port], group, instruction_number); } }//end of group loop }//end of port loop @@ -876,9 +985,17 @@ ReturnCode mss_rtt_nom_rtt_wr_swap( uint32_t i_port_number, uint8_t i_rank, uint32_t i_rank_pair_group, - uint32_t& io_ccs_inst_cnt + uint32_t& io_ccs_inst_cnt, + uint8_t& io_dram_rtt_nom_original ) { + // Target MBA level + // This is a function written specifically for mss_draminit_training + // Meant for placing RTT_WR into RTT_NOM within MR1 before wr_lvl + // If the function argument dram_rtt_nom_original is 0 it will put the original rtt_nom there + // and write rtt_wr to the rtt_nom value + // If the function argument dram_rtt_nom_original has a value it will write that value to rtt_nom. + ReturnCode rc; ReturnCode rc_buff; @@ -886,6 +1003,8 @@ ReturnCode mss_rtt_nom_rtt_wr_swap( ecmdDataBufferBase address_16(16); ecmdDataBufferBase bank_3(3); + ecmdDataBufferBase address_pre_AMM_16(16); + ecmdDataBufferBase bank_pre_AMM_3(3); ecmdDataBufferBase activate_1(1); ecmdDataBufferBase rasn_1(1); rc_num = rc_num | rasn_1.clearBit(0); @@ -916,6 +1035,16 @@ ReturnCode mss_rtt_nom_rtt_wr_swap( uint16_t MRS1 = 0; uint16_t MRS2 = 0; + uint16_t mirror_mode_ba = 0; + uint16_t mirror_mode_ad = 0; + + uint8_t dimm_type; + rc = FAPI_ATTR_GET(ATTR_EFF_DIMM_TYPE, &i_target, dimm_type); + if(rc) return rc; + + uint8_t is_sim = 0; + rc = FAPI_ATTR_GET(ATTR_IS_SIMULATION, NULL, is_sim); + if(rc) return rc; // Raise CKE high with NOPS, waiting min Reset CKE exit time (tXPR) - 400 cycles rc_num = rc_num | csn_8.setBit(0,8); @@ -964,11 +1093,27 @@ ReturnCode mss_rtt_nom_rtt_wr_swap( { rc_num = rc_num | csn_8.clearBit(3); } + else if (i_rank == 4) + { + rc_num = rc_num | csn_8.clearBit(4); + } + else if (i_rank == 5) + { + rc_num = rc_num | csn_8.clearBit(5); + } + else if (i_rank == 6) + { + rc_num = rc_num | csn_8.clearBit(6); + } + else if (i_rank == 7) + { + rc_num = rc_num | csn_8.clearBit(7); + } // MRS CMD to CMD spacing = 12 cycles rc_num = rc_num | num_idles_16.insertFromRight((uint32_t) 12, 0, 16); - FAPI_INF( "SWAPPING RTT_NOM AND RTT_WR FOR PORT%d RP%d", i_port_number, i_rank_pair_group); + FAPI_INF( "Editing RTT_NOM during wr_lvl for PORT%d RP%d", i_port_number, i_rank_pair_group); //MRS1 // Get contents of MRS 1 Shadow Reg @@ -1013,7 +1158,7 @@ ReturnCode mss_rtt_nom_rtt_wr_swap( rc_num = rc_num | data_buffer_64.reverse(); rc_num = rc_num | mrs1_16.insert(data_buffer_64, 0, 16, 0); rc_num = rc_num | mrs1_16.extractPreserve(&MRS1, 0, 16, 0); - FAPI_INF( "ORIGINAL MRS 1: 0x%04X", MRS1); + FAPI_INF( "CURRENT MRS 1: 0x%04X", MRS1); uint8_t dll_enable = 0x00; //DLL Enable if (mrs1_16.isBitSet(0)) @@ -1039,44 +1184,45 @@ ReturnCode mss_rtt_nom_rtt_wr_swap( out_drv_imp_cntl = 0x80; } - uint8_t dram_rtt_wr = 0x00; + uint8_t dram_rtt_nom = 0x00; if ( (mrs1_16.isBitClear(2)) && (mrs1_16.isBitClear(6)) && (mrs1_16.isBitClear(9)) ) { // RTT_NOM set to disabled - //RTT WR Disabled - dram_rtt_wr = 0x00; + FAPI_INF( "DRAM_RTT_NOM orignally set to Disabled."); + dram_rtt_nom = 0x00; + } else if ( (mrs1_16.isBitClear(2)) && (mrs1_16.isBitClear(6)) && (mrs1_16.isBitSet(9)) ) { // RTT_NOM set to 20 - //RTT WR 60 OHM - dram_rtt_wr = 0x80; + FAPI_INF( "DRAM_RTT_NOM orignally set to 20 Ohm."); + dram_rtt_nom = 0x20; } else if ( (mrs1_16.isBitSet(2)) && (mrs1_16.isBitClear(6)) && (mrs1_16.isBitSet(9)) ) { // RTT_NOM set to 30 - //RTT WR 60 OHM - dram_rtt_wr = 0x80; + FAPI_INF( "DRAM_RTT_NOM orignally set to 30 Ohm."); + dram_rtt_nom = 0xA0; } else if ( (mrs1_16.isBitSet(2)) && (mrs1_16.isBitSet(6)) && (mrs1_16.isBitClear(9)) ) { // RTT_NOM set to 40 - //RTT WR 60 OHM - dram_rtt_wr = 0x80; + FAPI_INF( "DRAM_RTT_NOM orignally set to 40 Ohm."); + dram_rtt_nom = 0xC0; } else if ( (mrs1_16.isBitSet(2)) && (mrs1_16.isBitSet(6)) && (mrs1_16.isBitClear(9)) ) { // RTT_NOM set to 60 - //RTT WR 60 OHM - dram_rtt_wr = 0x80; + FAPI_INF( "DRAM_RTT_NOM orignally set to 60 Ohm."); + dram_rtt_nom = 0x80; } else if ( (mrs1_16.isBitClear(2)) && (mrs1_16.isBitSet(6)) && (mrs1_16.isBitClear(9)) ) { // RTT_NOM set to 120 - // RTT_WR set to 120 - dram_rtt_wr = 0x40; + FAPI_INF( "DRAM_RTT_NOM orignally set to 120 Ohm."); + dram_rtt_nom = 0x40; } - + uint8_t dram_al = 0x00; if ( (mrs1_16.isBitClear(3)) && (mrs1_16.isBitClear(4)) ) { @@ -1130,11 +1276,8 @@ ReturnCode mss_rtt_nom_rtt_wr_swap( q_off = 0x00; } - //MRS2 - // MRS CMD to CMD spacing = 12 cycles - rc_num = rc_num | num_idles_16.insertFromRight((uint32_t) 12, 0, 16); - // Get contents of MRS 1 Shadow Reg + // Get contents of MRS 2 Shadow Reg if (i_port_number == 0){ if (i_rank_pair_group == 0) { @@ -1175,136 +1318,99 @@ ReturnCode mss_rtt_nom_rtt_wr_swap( rc_num = rc_num | data_buffer_64.reverse(); rc_num = rc_num | mrs2_16.insert(data_buffer_64, 0, 16, 0); rc_num = rc_num | mrs2_16.extractPreserve(&MRS2, 0, 16, 0); - FAPI_INF( "ORIGINAL MRS 2: 0x%04X", MRS2); + FAPI_INF( "MRS 2: 0x%04X", MRS2); - uint8_t pt_arr_sr = 0x00; //Partial Array Self Refresh - if ( (mrs2_16.isBitClear(0)) && (mrs2_16.isBitClear(1)) && (mrs2_16.isBitClear(2)) ) - { - //PASR FULL - pt_arr_sr = 0x00; - } - else if ( (mrs2_16.isBitSet(0)) && (mrs2_16.isBitClear(1)) && (mrs2_16.isBitClear(2)) ) - { - //PASR FIRST HALF - pt_arr_sr = 0x80; - } - else if ( (mrs2_16.isBitClear(0)) && (mrs2_16.isBitSet(1)) && (mrs2_16.isBitClear(2)) ) - { - // PASR FIRST QUARTER - pt_arr_sr = 0x40; - } - else if ( (mrs2_16.isBitSet(0)) && (mrs2_16.isBitSet(1)) && (mrs2_16.isBitClear(2)) ) - { - // PASR FIRST EIGHTH - pt_arr_sr = 0xC0; - } - else if ( (mrs2_16.isBitClear(0)) && (mrs2_16.isBitClear(1)) && (mrs2_16.isBitSet(2)) ) - { - // PASR LAST FOURTH - pt_arr_sr = 0x20; - } - else if ( (mrs2_16.isBitSet(0)) && (mrs2_16.isBitClear(1)) && (mrs2_16.isBitSet(2)) ) - { - // PASR LAST HALF - pt_arr_sr = 0xA0; - } - else if ( (mrs2_16.isBitClear(0)) && (mrs2_16.isBitSet(1)) && (mrs2_16.isBitSet(2)) ) - { - // PASR LAST QUARTER - pt_arr_sr = 0x60; - } - else if ( (mrs2_16.isBitSet(0)) && (mrs2_16.isBitSet(1)) && (mrs2_16.isBitSet(2)) ) + uint8_t dram_rtt_wr = 0x00; + if ( (mrs2_16.isBitClear(9)) && (mrs2_16.isBitClear(10)) ) { - // PASR LAST EIGHTH - pt_arr_sr = 0xE0; - } + //RTT WR DISABLE + FAPI_INF( "DRAM_RTT_WR currently set to disable."); + dram_rtt_wr = 0x00; - uint8_t cwl = 0x00; // CAS Write Latency - if ( (mrs2_16.isBitClear(3)) && (mrs2_16.isBitClear(4)) && (mrs2_16.isBitClear(5)) ) - { - // CWL = 5 - cwl = 0x00; - } - else if ( (mrs2_16.isBitSet(3)) && (mrs2_16.isBitClear(4)) && (mrs2_16.isBitClear(5)) ) - { - // CWL = 6 - cwl = 0x80; - } - else if ( (mrs2_16.isBitClear(3)) && (mrs2_16.isBitSet(4)) && (mrs2_16.isBitClear(5)) ) - { - // CWL = 7 - cwl = 0x40; - } - else if ( (mrs2_16.isBitSet(3)) && (mrs2_16.isBitSet(4)) && (mrs2_16.isBitClear(5)) ) - { - // CWL = 8 - cwl = 0xC0; - } - else if ( (mrs2_16.isBitClear(3)) && (mrs2_16.isBitClear(4)) && (mrs2_16.isBitSet(5)) ) - { - // CWL = 9 - cwl = 0x20; - } - else if ( (mrs2_16.isBitSet(3)) && (mrs2_16.isBitClear(4)) && (mrs2_16.isBitSet(5)) ) - { - // CWL = 10 - cwl = 0xA0; - } - else if ( (mrs2_16.isBitClear(3)) && (mrs2_16.isBitSet(4)) && (mrs2_16.isBitSet(5)) ) - { - // CWL = 11 - cwl = 0x60; - } - else if ( (mrs2_16.isBitSet(3)) && (mrs2_16.isBitSet(4)) && (mrs2_16.isBitSet(5)) ) - { - // CWL = 12 - cwl = 0xE0; - } + //RTT NOM CODE FOR THIS VALUE IS + // dram_rtt_nom = 0x00 - uint8_t auto_sr = 0x00; // Auto Self-Refresh - if ( (mrs2_16.isBitClear(6)) ) - { - //AUTO SR = SRT - auto_sr = 0x00; } - else if ( (mrs2_16.isBitSet(6)) ) + else if ( (mrs2_16.isBitSet(9)) && (mrs2_16.isBitClear(10)) ) { - //AUTO SR = ASR ENABLE - auto_sr = 0xFF; - } + //RTT WR 60 OHM + FAPI_INF( "DRAM_RTT_WR currently set to 60 Ohm."); + dram_rtt_wr = 0x80; + + //RTT NOM CODE FOR THIS VALUE IS + // dram_rtt_nom = 0x80 - uint8_t sr_temp = 0x00; // Self-Refresh Temp Range - if ( (mrs2_16.isBitClear(7)) ) - { - //SRT NORMAL - sr_temp = 0x00; } - else if ( (mrs2_16.isBitSet(7)) ) + else if ( (mrs2_16.isBitClear(9)) && (mrs2_16.isBitSet(10)) ) { - //SRT EXTEND - sr_temp = 0xFF; - } + //RTT WR 120 OHM + FAPI_INF( "DRAM_RTT_WR currently set to 120 Ohm."); + dram_rtt_wr = 0x40; + + //RTT NOM CODE FOR THIS VALUE IS + // dram_rtt_nom = 0x40 - uint8_t dram_rtt_nom = 0x00; - if ( (mrs2_16.isBitClear(9)) && (mrs2_16.isBitClear(10)) ) - { - //RTT WR DISABLE - // RTT_NOM set to disabled - dram_rtt_nom = 0x00; } - else if ( (mrs2_16.isBitSet(9)) && (mrs2_16.isBitClear(10)) ) + + + // If you have a 0 value in dram_rtt_nom_orignal + // you will use dram_rtt_nom_original to save the original value + if (io_dram_rtt_nom_original == 0) { - //RTT WR 60 OHM - // RTT_NOM set to 60 - dram_rtt_nom = 0x80; + io_dram_rtt_nom_original = dram_rtt_nom; + dram_rtt_nom = dram_rtt_wr; + + if (dram_rtt_wr == 0x00) + { + FAPI_INF( "DRAM_RTT_NOM to be set to DRAM_RTT_WR which is disable."); + } + else if (dram_rtt_wr == 0x80) + { + FAPI_INF( "DRAM_RTT_NOM to be set to DRAM_RTT_WR which is 60 Ohm."); + } + else if (dram_rtt_wr == 0x40) + { + FAPI_INF( "DRAM_RTT_NOM to be set to DRAM_RTT_WR which is 120 Ohm."); + } } - else if ( (mrs2_16.isBitClear(9)) && (mrs2_16.isBitSet(10)) ) + else if (io_dram_rtt_nom_original != 0) { - //RTT WR 120 OHM - // RTT_NOM set to 120 - dram_rtt_nom = 0x40; + dram_rtt_nom = io_dram_rtt_nom_original; + + if ( dram_rtt_nom == 0x00 ) + { + // RTT_NOM set to disabled + FAPI_INF( "DRAM_RTT_NOM being set back to Disabled."); + + } + else if ( dram_rtt_nom == 0x20 ) + { + // RTT_NOM set to 20 + FAPI_INF( "DRAM_RTT_NOM being set back to 20 Ohm."); + } + else if ( dram_rtt_nom == 0xA0 ) + { + // RTT_NOM set to 30 + FAPI_INF( "DRAM_RTT_NOM being set back to 30 Ohm."); + } + else if ( dram_rtt_nom == 0xC0 ) + { + // RTT_NOM set to 40 + FAPI_INF( "DRAM_RTT_NOM being set back to 40 Ohm."); + } + else if ( dram_rtt_nom == 0x80 ) + { + // RTT_NOM set to 60 + FAPI_INF( "DRAM_RTT_NOM being set back to 60 Ohm."); + } + else if ( dram_rtt_nom == 0x40 ) + { + // RTT_NOM set to 120 + FAPI_INF( "DRAM_RTT_NOM being set back to 120 Ohm."); + } } + rc_num = rc_num | mrs1_16.insert((uint8_t) dll_enable, 0, 1, 0); rc_num = rc_num | mrs1_16.insert((uint8_t) out_drv_imp_cntl, 1, 1, 0); rc_num = rc_num | mrs1_16.insert((uint8_t) dram_rtt_nom, 2, 1, 0); @@ -1322,61 +1428,55 @@ ReturnCode mss_rtt_nom_rtt_wr_swap( rc_num = rc_num | mrs1_16.extractPreserve(&MRS1, 0, 16, 0); FAPI_INF( "NEW MRS 1: 0x%04X", MRS1); - rc_num = rc_num | address_16.insert(mrs1_16, 0, 16, 0); - rc_num = rc_num | bank_3.insert((uint8_t) MRS1_BA, 0, 1, 7); - rc_num = rc_num | bank_3.insert((uint8_t) MRS1_BA, 1, 1, 6); - rc_num = rc_num | bank_3.insert((uint8_t) MRS1_BA, 2, 1, 5); + // Copying the current MRS into address buffer matching the MRS_array order + // Setting the bank address - if (rc_num) + rc_num = rc_num | address_pre_AMM_16.insert(mrs1_16, 0, 16, 0); + rc_num = rc_num | bank_pre_AMM_3.insert((uint8_t) MRS1_BA, 0, 1, 7); + rc_num = rc_num | bank_pre_AMM_3.insert((uint8_t) MRS1_BA, 1, 1, 6); + rc_num = rc_num | bank_pre_AMM_3.insert((uint8_t) MRS1_BA, 2, 1, 5); + + if ( (dimm_type == ENUM_ATTR_EFF_DIMM_TYPE_CDIMM) && (i_rank > 3) && (is_sim == 0)) { - FAPI_ERR( "mss_mrs_load: Error setting up buffers"); - rc_buff.setEcmdError(rc_num); - return rc_buff; - } + FAPI_INF( "MUST USE ADDRESS MIRRORING ON PORT%d RANK%d", i_port_number, i_rank); - // Send out to the CCS array - rc = mss_ccs_inst_arry_0( i_target, - io_ccs_inst_cnt, - address_16, - bank_3, - activate_1, - rasn_1, - casn_1, - wen_1, - cke_4, - csn_8, - odt_4, - ddr_cal_type_4, - i_port_number); - if(rc) return rc; - rc = mss_ccs_inst_arry_1( i_target, - io_ccs_inst_cnt, - num_idles_16, - num_repeat_16, - data_20, - read_compare_1, - rank_cal_4, - ddr_cal_enable_1, - ccs_end_1); - if(rc) return rc; - io_ccs_inst_cnt++; + rc_num = rc_num | address_pre_AMM_16.extractPreserve(&mirror_mode_ad, 0, 16, 0); + FAPI_INF( "PRE - MIRROR MODE ADDRESS: 0x%04X", mirror_mode_ad); + rc_num = rc_num | bank_pre_AMM_3.extractPreserve(&mirror_mode_ba, 0, 3, 0); + FAPI_INF( "PRE - MIRROR MODE BANK ADDRESS: 0x%04X", mirror_mode_ba); + //Initialize address and bank address as the same pre mirror mode swizzle + rc_num = rc_num | address_16.insert(address_pre_AMM_16, 0, 16, 0); + rc_num = rc_num | bank_3.insert(bank_pre_AMM_3, 0, 3, 0); - rc_num = rc_num | mrs2_16.insert((uint8_t) pt_arr_sr, 0, 3); - rc_num = rc_num | mrs2_16.insert((uint8_t) cwl, 3, 3); - rc_num = rc_num | mrs2_16.insert((uint8_t) auto_sr, 6, 1); - rc_num = rc_num | mrs2_16.insert((uint8_t) sr_temp, 7, 1); - rc_num = rc_num | mrs2_16.insert((uint8_t) 0x00, 8, 1); - rc_num = rc_num | mrs2_16.insert((uint8_t) dram_rtt_wr, 9, 2); - rc_num = rc_num | mrs2_16.insert((uint8_t) 0x00, 10, 6); + //Swap A3 and A4 + rc_num = rc_num | address_16.insert(address_pre_AMM_16, 4, 1, 3); + rc_num = rc_num | address_16.insert(address_pre_AMM_16, 3, 1, 4); - rc_num = rc_num | mrs2_16.extractPreserve(&MRS2, 0, 16, 0); - FAPI_INF( "NEW MRS 2: 0x%04X", MRS2); + //Swap A5 and A6 + rc_num = rc_num | address_16.insert(address_pre_AMM_16, 6, 1, 5); + rc_num = rc_num | address_16.insert(address_pre_AMM_16, 5, 1, 6); + + //Swap A7 and A8 + rc_num = rc_num | address_16.insert(address_pre_AMM_16, 8, 1, 7); + rc_num = rc_num | address_16.insert(address_pre_AMM_16, 7, 1, 8); - rc_num = rc_num | address_16.insert(mrs2_16, 0, 16, 0); - rc_num = rc_num | bank_3.insert((uint8_t) MRS2_BA, 0, 1, 7); - rc_num = rc_num | bank_3.insert((uint8_t) MRS2_BA, 1, 1, 6); - rc_num = rc_num | bank_3.insert((uint8_t) MRS2_BA, 2, 1, 5); + //Swap BA0 and BA1 + rc_num = rc_num | bank_3.insert(bank_pre_AMM_3, 1, 1, 0); + rc_num = rc_num | bank_3.insert(bank_pre_AMM_3, 0, 1, 1); + + rc_num = rc_num | address_16.extractPreserve(&mirror_mode_ad, 0, 16, 0); + FAPI_INF( "POST - MIRROR MODE ADDRESS: 0x%04X", mirror_mode_ad); + rc_num = rc_num | bank_3.extractPreserve(&mirror_mode_ba, 0, 3, 0); + FAPI_INF( "POST - MIRROR MODE BANK ADDRESS: 0x%04X", mirror_mode_ba); + + } + else + { + // No need to worry about swizzle + rc_num = rc_num | address_16.insert(address_pre_AMM_16, 0, 16, 0); + rc_num = rc_num | bank_3.insert(bank_pre_AMM_3, 0, 3, 0); + } if (rc_num) { @@ -1385,6 +1485,8 @@ ReturnCode mss_rtt_nom_rtt_wr_swap( return rc_buff; } + ccs_end_1.setBit(0); + // Send out to the CCS array rc = mss_ccs_inst_arry_0( i_target, io_ccs_inst_cnt, @@ -1410,7 +1512,12 @@ ReturnCode mss_rtt_nom_rtt_wr_swap( ddr_cal_enable_1, ccs_end_1); if(rc) return rc; - io_ccs_inst_cnt++; + + uint32_t NUM_POLL = 100; + rc = mss_execute_ccs_inst_array( i_target, NUM_POLL, 60); + if(rc) return rc; //Error handling for mss_ccs_inst built into mss_funcs + + io_ccs_inst_cnt = 0; return rc; diff --git a/src/usr/hwpf/hwp/dram_training/mss_unmask_errors.C b/src/usr/hwpf/hwp/dram_training/mss_unmask_errors.C deleted file mode 100644 index 5efa72815..000000000 --- a/src/usr/hwpf/hwp/dram_training/mss_unmask_errors.C +++ /dev/null @@ -1,2743 +0,0 @@ -/* IBM_PROLOG_BEGIN_TAG */ -/* This is an automatically generated prolog. */ -/* */ -/* $Source: src/usr/hwpf/hwp/dram_training/mss_unmask_errors.C $ */ -/* */ -/* IBM CONFIDENTIAL */ -/* */ -/* COPYRIGHT International Business Machines Corp. 2012 */ -/* */ -/* p1 */ -/* */ -/* Object Code Only (OCO) source materials */ -/* Licensed Internal Code Source Materials */ -/* IBM HostBoot Licensed Internal Code */ -/* */ -/* The source code for this program is not published or otherwise */ -/* divested of its trade secrets, irrespective of what has been */ -/* deposited with the U.S. Copyright Office. */ -/* */ -/* Origin: 30 */ -/* */ -/* IBM_PROLOG_END_TAG */ -// $Id: mss_unmask_errors.C,v 1.1 2012/09/05 21:04:52 gollub Exp $ -//------------------------------------------------------------------------------ -// Don't forget to create CVS comments when you check in your changes! -//------------------------------------------------------------------------------ -// CHANGE HISTORY: -//------------------------------------------------------------------------------ -// Version:| Date: | Author: | Comment: -//---------|----------|---------|----------------------------------------------- -// 1.1 | 09/05/12 | gollub | Created - - -//------------------------------------------------------------------------------ -// Includes -//------------------------------------------------------------------------------ - -#include <mss_unmask_errors.H> -#include <cen_scom_addresses.H> -using namespace fapi; - - -//------------------------------------------------------------------------------ -// Constants and enums -//------------------------------------------------------------------------------ - - -//------------------------------------------------------------------------------ -// mss_unmask_inband_errors -//------------------------------------------------------------------------------ - -fapi::ReturnCode mss_unmask_inband_errors( const fapi::Target & i_target, - fapi::ReturnCode i_bad_rc ) - -{ - - FAPI_INF("ENTER mss_unmask_inband_errors()"); - - fapi::ReturnCode l_rc; - uint32_t l_ecmd_rc = 0; - - //************************* - //************************* - // MBS_FIR_REG - //************************* - //************************* - - ecmdDataBufferBase l_mbs_fir_mask(64); - ecmdDataBufferBase l_mbs_fir_mask_or(64); - ecmdDataBufferBase l_mbs_fir_mask_and(64); - ecmdDataBufferBase l_mbs_fir_action0(64); - ecmdDataBufferBase l_mbs_fir_action1(64); - - // Read mask - l_rc = fapiGetScom_w_retry(i_target, MBS_FIR_MASK_REG_0x02011403, l_mbs_fir_mask); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - // TODO: Here is where I could clear bits that were bogus, before I unmask - // them. But typically we are expecting the bit set at this point - // to be valid errors for PRD to log. - - - //(Action0, Action1, Mask) - // - // (0,0,0) = checkstop - // (0,1,0) = recoverable error - // (1,0,0) = report unused - // (1,1,0) = machine check - // (x,x,1) = error is masked - - l_ecmd_rc |= l_mbs_fir_action0.flushTo0(); - l_ecmd_rc |= l_mbs_fir_action1.flushTo0(); - l_ecmd_rc |= l_mbs_fir_mask_or.flushTo0(); - l_ecmd_rc |= l_mbs_fir_mask_and.flushTo1(); - - // 0 host_protocol_error channel checkstop unmask - l_ecmd_rc |= l_mbs_fir_action0.clearBit(0); - l_ecmd_rc |= l_mbs_fir_action1.clearBit(0); - l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(0); - - // 1 int_protocol_error channel checkstop unmask - l_ecmd_rc |= l_mbs_fir_action0.clearBit(1); - l_ecmd_rc |= l_mbs_fir_action1.clearBit(1); - l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(1); - - // 2 invalid_address_error channel checkstop mask (until unmask_fetch_errors) - l_ecmd_rc |= l_mbs_fir_action0.clearBit(2); - l_ecmd_rc |= l_mbs_fir_action1.clearBit(2); - l_ecmd_rc |= l_mbs_fir_mask_or.setBit(2); - - // 3 external_timeout channel checkstop mask (until unmask_fetch_errors) - l_ecmd_rc |= l_mbs_fir_action0.clearBit(3); - l_ecmd_rc |= l_mbs_fir_action1.clearBit(3); - l_ecmd_rc |= l_mbs_fir_mask_or.setBit(3); - - // 4 internal_timeout channel checkstop mask (until unmask_fetch_errors) - l_ecmd_rc |= l_mbs_fir_action0.clearBit(4); - l_ecmd_rc |= l_mbs_fir_action1.clearBit(4); - l_ecmd_rc |= l_mbs_fir_mask_or.setBit(4); - - // 5 int_buffer_ce recoverable unmask - l_ecmd_rc |= l_mbs_fir_action0.clearBit(5); - l_ecmd_rc |= l_mbs_fir_action1.setBit(5); - l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(5); - - // 6 int_buffer_ue recoverable unmask - l_ecmd_rc |= l_mbs_fir_action0.clearBit(6); - l_ecmd_rc |= l_mbs_fir_action1.setBit(6); - l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(6); - - // 7 int_buffer_sue recoverable mask (forever) - l_ecmd_rc |= l_mbs_fir_action0.clearBit(7); - l_ecmd_rc |= l_mbs_fir_action1.setBit(7); - l_ecmd_rc |= l_mbs_fir_mask_or.setBit(7); - - // 8 int_parity_error channel checkstop unmask - l_ecmd_rc |= l_mbs_fir_action0.clearBit(8); - l_ecmd_rc |= l_mbs_fir_action1.clearBit(8); - l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(8); - - // 9 cache_srw_ce recoverable mask (until unmask_fetch_errors) - l_ecmd_rc |= l_mbs_fir_action0.clearBit(9); - l_ecmd_rc |= l_mbs_fir_action1.setBit(9); - l_ecmd_rc |= l_mbs_fir_mask_or.setBit(9); - - // 10 cache_srw_ue recoverable mask (until unmask_fetch_errors) - l_ecmd_rc |= l_mbs_fir_action0.clearBit(10); - l_ecmd_rc |= l_mbs_fir_action1.setBit(10); - l_ecmd_rc |= l_mbs_fir_mask_or.setBit(10); - - // 11 cache_srw_sue recoverable mask (forever) - l_ecmd_rc |= l_mbs_fir_action0.clearBit(11); - l_ecmd_rc |= l_mbs_fir_action1.setBit(11); - l_ecmd_rc |= l_mbs_fir_mask_or.setBit(11); - - // 12 cache_co_ce recoverable mask (until unmask_fetch_errors) - l_ecmd_rc |= l_mbs_fir_action0.clearBit(12); - l_ecmd_rc |= l_mbs_fir_action1.setBit(12); - l_ecmd_rc |= l_mbs_fir_mask_or.setBit(12); - - // 13 cache_co_ue recoverable mask (until unmask_fetch_errors) - l_ecmd_rc |= l_mbs_fir_action0.clearBit(13); - l_ecmd_rc |= l_mbs_fir_action1.setBit(13); - l_ecmd_rc |= l_mbs_fir_mask_or.setBit(13); - - // 14 cache_co_sue recoverable mask (forever) - l_ecmd_rc |= l_mbs_fir_action0.clearBit(14); - l_ecmd_rc |= l_mbs_fir_action1.setBit(14); - l_ecmd_rc |= l_mbs_fir_mask_or.setBit(14); - - // 15 dir_ce recoverable mask (until unmask_fetch_errors) - l_ecmd_rc |= l_mbs_fir_action0.clearBit(15); - l_ecmd_rc |= l_mbs_fir_action1.setBit(15); - l_ecmd_rc |= l_mbs_fir_mask_or.setBit(15); - - // 16 dir_ue channel checkstop mask (until unmask_fetch_errors) - l_ecmd_rc |= l_mbs_fir_action0.clearBit(16); - l_ecmd_rc |= l_mbs_fir_action1.clearBit(16); - l_ecmd_rc |= l_mbs_fir_mask_or.setBit(16); - - // 17 dir_member_deleted recoverable mask (forever) - l_ecmd_rc |= l_mbs_fir_action0.clearBit(17); - l_ecmd_rc |= l_mbs_fir_action1.setBit(17); - l_ecmd_rc |= l_mbs_fir_mask_or.setBit(17); - - // 18 dir_all_members_deleted channel checkstop mask (until unmask_fetch_errors) - l_ecmd_rc |= l_mbs_fir_action0.clearBit(18); - l_ecmd_rc |= l_mbs_fir_action1.clearBit(18); - l_ecmd_rc |= l_mbs_fir_mask_or.setBit(18); - - // 19 lru_error recoverable mask (until unmask_fetch_errors) - l_ecmd_rc |= l_mbs_fir_action0.clearBit(19); - l_ecmd_rc |= l_mbs_fir_action1.setBit(19); - l_ecmd_rc |= l_mbs_fir_mask_or.setBit(19); - - // 20 eDRAM error channel checkstop mask (until unmask_fetch_errors) - l_ecmd_rc |= l_mbs_fir_action0.clearBit(20); - l_ecmd_rc |= l_mbs_fir_action1.clearBit(20); - l_ecmd_rc |= l_mbs_fir_mask_or.setBit(20); - - // 21 emergency_throttle_set recoverable mask (forever) - l_ecmd_rc |= l_mbs_fir_action0.clearBit(21); - l_ecmd_rc |= l_mbs_fir_action1.setBit(21); - l_ecmd_rc |= l_mbs_fir_mask_or.setBit(21); - - // 22 Host Inband Read Error recoverable mask (forever) - l_ecmd_rc |= l_mbs_fir_action0.clearBit(22); - l_ecmd_rc |= l_mbs_fir_action1.setBit(22); - l_ecmd_rc |= l_mbs_fir_mask_or.setBit(22); - - // 23 Host Inband Write Error recoverable mask (forever) - l_ecmd_rc |= l_mbs_fir_action0.clearBit(23); - l_ecmd_rc |= l_mbs_fir_action1.setBit(23); - l_ecmd_rc |= l_mbs_fir_mask_or.setBit(23); - - // 24 OCC Inband Read Error recoverable mask (forever) - l_ecmd_rc |= l_mbs_fir_action0.clearBit(24); - l_ecmd_rc |= l_mbs_fir_action1.setBit(24); - l_ecmd_rc |= l_mbs_fir_mask_or.setBit(24); - - // 25 OCC Inband Write Error recoverable mask (forever) - l_ecmd_rc |= l_mbs_fir_action0.clearBit(25); - l_ecmd_rc |= l_mbs_fir_action1.setBit(25); - l_ecmd_rc |= l_mbs_fir_mask_or.setBit(25); - - // 26 srb_buffer_ce recoverable mask (until unmask_fetch_errors) - l_ecmd_rc |= l_mbs_fir_action0.clearBit(26); - l_ecmd_rc |= l_mbs_fir_action1.setBit(26); - l_ecmd_rc |= l_mbs_fir_mask_or.setBit(26); - - // 27 srb_buffer_ue recoverable mask (until unmask_fetch_errors) - l_ecmd_rc |= l_mbs_fir_action0.clearBit(27); - l_ecmd_rc |= l_mbs_fir_action1.setBit(27); - l_ecmd_rc |= l_mbs_fir_mask_or.setBit(27); - - // 28 srb_buffer_sue recoverable mask (forever) - l_ecmd_rc |= l_mbs_fir_action0.clearBit(28); - l_ecmd_rc |= l_mbs_fir_action1.setBit(28); - l_ecmd_rc |= l_mbs_fir_mask_or.setBit(28); - - // 29 internal_scom_error recoverable mask (tbd) - l_ecmd_rc |= l_mbs_fir_action0.clearBit(29); - l_ecmd_rc |= l_mbs_fir_action1.setBit(29); - l_ecmd_rc |= l_mbs_fir_mask_or.setBit(29); - - // 30 internal_scom_error_copy recoverable mask (tbd) - l_ecmd_rc |= l_mbs_fir_action0.clearBit(30); - l_ecmd_rc |= l_mbs_fir_action1.setBit(30); - l_ecmd_rc |= l_mbs_fir_mask_or.setBit(30); - - // 31:63 Reserved not implemented, so won't touch these - - if(l_ecmd_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - - l_rc.setEcmdError(l_ecmd_rc); - return l_rc; - } - - // Write action0 - l_rc = fapiPutScom_w_retry(i_target, MBS_FIR_ACTION0_REG_0x02011406, l_mbs_fir_action0); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - // Write action1 - l_rc = fapiPutScom_w_retry(i_target, MBS_FIR_ACTION1_REG_0x02011407, l_mbs_fir_action1); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - - // Write mask OR - l_rc = fapiPutScom_w_retry(i_target, MBS_FIR_MASK_REG_OR_0x02011405, l_mbs_fir_mask_or); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - // Write mask AND - l_rc = fapiPutScom_w_retry(i_target, MBS_FIR_MASK_REG_AND_0x02011404, l_mbs_fir_mask_and); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - - //************************************************ - // DEBUG: read them all back to verify - l_rc = fapiGetScom_w_retry(i_target, MBS_FIR_ACTION0_REG_0x02011406, l_mbs_fir_action0); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - l_rc = fapiGetScom_w_retry(i_target, MBS_FIR_ACTION1_REG_0x02011407, l_mbs_fir_action1); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - l_rc = fapiGetScom_w_retry(i_target, MBS_FIR_MASK_REG_0x02011403, l_mbs_fir_mask); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - //************************************************ - - - FAPI_INF("EXIT mss_unmask_inband_errors()"); - - return i_bad_rc; -} - - - -//------------------------------------------------------------------------------ -// mss_unmask_ddrphy_errors -//------------------------------------------------------------------------------ - -fapi::ReturnCode mss_unmask_ddrphy_errors( const fapi::Target & i_target, - fapi::ReturnCode i_bad_rc ) - -{ - - FAPI_INF("ENTER mss_unmask ddrphy_errors()"); - - fapi::ReturnCode l_rc; - uint32_t l_ecmd_rc = 0; - - //************************* - //************************* - // DDRPHY_FIR_REG - //************************* - //************************* - - ecmdDataBufferBase l_ddrphy_fir_mask(64); - ecmdDataBufferBase l_ddrphy_fir_mask_or(64); - ecmdDataBufferBase l_ddrphy_fir_mask_and(64); - ecmdDataBufferBase l_ddrphy_fir_action0(64); - ecmdDataBufferBase l_ddrphy_fir_action1(64); - - - // TODO: Here is where I could clear bits that were bogus, before I unmask - // them. But typically we are expecting the bit set at this point - // to be valid errors for PRD to log. - - - //(Action0, Action1, Mask) - // - // (0,0,0) = checkstop - // (0,1,0) = recoverable error - // (1,0,0) = report unused - // (1,1,0) = machine check - // (x,x,1) = error is masked - - l_ecmd_rc |= l_ddrphy_fir_action0.flushTo0(); - l_ecmd_rc |= l_ddrphy_fir_action1.flushTo0(); - l_ecmd_rc |= l_ddrphy_fir_mask_or.flushTo0(); - l_ecmd_rc |= l_ddrphy_fir_mask_and.flushTo0(); - l_ecmd_rc |= l_ddrphy_fir_mask_and.setBit(48,16); - - // 0:47 Reserved not implemented, so won't touch these - - // 48 ddr0_fsm_ckstp channel checkstop unmask - l_ecmd_rc |= l_ddrphy_fir_action0.clearBit(48); - l_ecmd_rc |= l_ddrphy_fir_action1.clearBit(48); - l_ecmd_rc |= l_ddrphy_fir_mask_and.clearBit(48); - - // 49 ddr0_parity_ckstp channel checkstop unmask - l_ecmd_rc |= l_ddrphy_fir_action0.clearBit(49); - l_ecmd_rc |= l_ddrphy_fir_action1.clearBit(49); - l_ecmd_rc |= l_ddrphy_fir_mask_and.clearBit(49); - - // 50 ddr0_calibration_error recoverable mask (forever) - l_ecmd_rc |= l_ddrphy_fir_action0.clearBit(50); - l_ecmd_rc |= l_ddrphy_fir_action1.setBit(50); - l_ecmd_rc |= l_ddrphy_fir_mask_or.setBit(50); - - // 51 ddr0_fsm_err recoverable unmask - l_ecmd_rc |= l_ddrphy_fir_action0.clearBit(51); - l_ecmd_rc |= l_ddrphy_fir_action1.setBit(51); - l_ecmd_rc |= l_ddrphy_fir_mask_and.clearBit(51); - - // 52 ddr0_parity_err recoverable unmask - l_ecmd_rc |= l_ddrphy_fir_action0.clearBit(52); - l_ecmd_rc |= l_ddrphy_fir_action1.setBit(52); - l_ecmd_rc |= l_ddrphy_fir_mask_and.clearBit(52); - - // 53 ddr01_fir_parity_err recoverable mask (forever) - l_ecmd_rc |= l_ddrphy_fir_action0.clearBit(53); - l_ecmd_rc |= l_ddrphy_fir_action1.setBit(53); - l_ecmd_rc |= l_ddrphy_fir_mask_or.setBit(53); - - // 54 Reserved recoverable mask (forever) - l_ecmd_rc |= l_ddrphy_fir_action0.clearBit(54); - l_ecmd_rc |= l_ddrphy_fir_action1.setBit(54); - l_ecmd_rc |= l_ddrphy_fir_mask_or.setBit(54); - - // 55 Reserved recoverable mask (forever) - l_ecmd_rc |= l_ddrphy_fir_action0.clearBit(55); - l_ecmd_rc |= l_ddrphy_fir_action1.setBit(55); - l_ecmd_rc |= l_ddrphy_fir_mask_or.setBit(55); - - // 56 ddr1_fsm_ckstp channel checkstop unmask - l_ecmd_rc |= l_ddrphy_fir_action0.clearBit(56); - l_ecmd_rc |= l_ddrphy_fir_action1.clearBit(56); - l_ecmd_rc |= l_ddrphy_fir_mask_and.clearBit(56); - - // 57 ddr1_parity_ckstp channel checkstop unmask - l_ecmd_rc |= l_ddrphy_fir_action0.clearBit(57); - l_ecmd_rc |= l_ddrphy_fir_action1.clearBit(57); - l_ecmd_rc |= l_ddrphy_fir_mask_and.clearBit(57); - - // 58 ddr1_calibration_error recoverable mask (forever) - l_ecmd_rc |= l_ddrphy_fir_action0.clearBit(58); - l_ecmd_rc |= l_ddrphy_fir_action1.setBit(58); - l_ecmd_rc |= l_ddrphy_fir_mask_or.setBit(58); - - // 59 ddr1_fsm_err recoverable unmask - l_ecmd_rc |= l_ddrphy_fir_action0.clearBit(59); - l_ecmd_rc |= l_ddrphy_fir_action1.setBit(59); - l_ecmd_rc |= l_ddrphy_fir_mask_and.clearBit(59); - - // 60 ddr1_parity_err recoverable unmask - l_ecmd_rc |= l_ddrphy_fir_action0.clearBit(60); - l_ecmd_rc |= l_ddrphy_fir_action1.setBit(60); - l_ecmd_rc |= l_ddrphy_fir_mask_and.clearBit(60); - - // 61 Reserved recoverable mask (forever) - l_ecmd_rc |= l_ddrphy_fir_action0.clearBit(61); - l_ecmd_rc |= l_ddrphy_fir_action1.setBit(61); - l_ecmd_rc |= l_ddrphy_fir_mask_or.setBit(61); - - // 62 Reserved recoverable mask (forever) - l_ecmd_rc |= l_ddrphy_fir_action0.clearBit(62); - l_ecmd_rc |= l_ddrphy_fir_action1.setBit(62); - l_ecmd_rc |= l_ddrphy_fir_mask_or.setBit(62); - - // 63 Reserved recoverable mask (forever) - l_ecmd_rc |= l_ddrphy_fir_action0.clearBit(63); - l_ecmd_rc |= l_ddrphy_fir_action1.setBit(63); - l_ecmd_rc |= l_ddrphy_fir_mask_or.setBit(63); - - - - if(l_ecmd_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - - l_rc.setEcmdError(l_ecmd_rc); - return l_rc; - } - - // Write action0 - l_rc = fapiPutScom_w_retry(i_target, PHY01_DDRPHY_FIR_ACTION0_REG_0x800200960301143f, l_ddrphy_fir_action0); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - // Write action1 - l_rc = fapiPutScom_w_retry(i_target, PHY01_DDRPHY_FIR_ACTION1_REG_0x800200970301143f, l_ddrphy_fir_action1); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - - // Write mask OR - l_rc = fapiPutScom_w_retry(i_target, PHY01_DDRPHY_FIR_MASK_REG_OR_0x800200950301143f, l_ddrphy_fir_mask_or); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - // Write mask AND - l_rc = fapiPutScom_w_retry(i_target, PHY01_DDRPHY_FIR_MASK_REG_AND_0x800200940301143f, l_ddrphy_fir_mask_and); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - - //************************************************ - // DEBUG: read them all back to verify - l_rc = fapiGetScom_w_retry(i_target, PHY01_DDRPHY_FIR_ACTION0_REG_0x800200960301143f, l_ddrphy_fir_action0); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - l_rc = fapiGetScom_w_retry(i_target, PHY01_DDRPHY_FIR_ACTION1_REG_0x800200970301143f, l_ddrphy_fir_action1); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - l_rc = fapiGetScom_w_retry(i_target, PHY01_DDRPHY_FIR_MASK_REG_0x800200930301143f, l_ddrphy_fir_mask); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - //************************************************ - - - //************************* - //************************* - // MBAFIR - //************************* - //************************* - - ecmdDataBufferBase l_mbafir_mask(64); - ecmdDataBufferBase l_mbafir_mask_or(64); - ecmdDataBufferBase l_mbafir_mask_and(64); - ecmdDataBufferBase l_mbafir_action0(64); - ecmdDataBufferBase l_mbafir_action1(64); - - - // Read mask - l_rc = fapiGetScom_w_retry(i_target, - MBA01_MBAFIRMASK_0x03010603, - l_mbafir_mask); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - // TODO: Here is where I could clear bits that were bogus, before I unmask - // them. But typically we are expecting the bit set at this point - // to be valid errors for PRD to log. - - - //(Action0, Action1, Mask) - // - // (0,0,0) = checkstop - // (0,1,0) = recoverable error - // (1,0,0) = report unused - // (1,1,0) = machine check - // (x,x,1) = error is masked - - l_ecmd_rc |= l_mbafir_action0.flushTo0(); - l_ecmd_rc |= l_mbafir_action1.flushTo0(); - l_ecmd_rc |= l_mbafir_mask_or.flushTo0(); - l_ecmd_rc |= l_mbafir_mask_and.flushTo1(); - - - // 0 Invalid_Maint_Cmd recoverable masked (forever) - l_ecmd_rc |= l_mbafir_action0.clearBit(0); - l_ecmd_rc |= l_mbafir_action1.setBit(0); - l_ecmd_rc |= l_mbafir_mask_or.setBit(0); - - // 1 Invalid_Maint_Address recoverable masked (forever) - l_ecmd_rc |= l_mbafir_action0.clearBit(1); - l_ecmd_rc |= l_mbafir_action1.setBit(1); - l_ecmd_rc |= l_mbafir_mask_or.setBit(1); - - // 2 Multi_address_Maint_timeout recoverable masked (until mss_unmask_maint_errors) - l_ecmd_rc |= l_mbafir_action0.clearBit(2); - l_ecmd_rc |= l_mbafir_action1.setBit(2); - l_ecmd_rc |= l_mbafir_mask_or.setBit(2); - - // 3 Internal_fsm_error recoverable unmask - l_ecmd_rc |= l_mbafir_action0.clearBit(3); - l_ecmd_rc |= l_mbafir_action1.setBit(3); - l_ecmd_rc |= l_mbafir_mask_and.clearBit(3); - - // 4 MCBIST_Error recoverable mask (forever) - l_ecmd_rc |= l_mbafir_action0.clearBit(4); - l_ecmd_rc |= l_mbafir_action1.setBit(4); - l_ecmd_rc |= l_mbafir_mask_or.setBit(4); - - // 5 scom_cmd_reg_pe recoverable unmask - l_ecmd_rc |= l_mbafir_action0.clearBit(5); - l_ecmd_rc |= l_mbafir_action1.setBit(5); - l_ecmd_rc |= l_mbafir_mask_and.clearBit(5); - - // 6 channel_chkstp_err channel checkstop unmask - l_ecmd_rc |= l_mbafir_action0.clearBit(6); - l_ecmd_rc |= l_mbafir_action1.clearBit(6); - l_ecmd_rc |= l_mbafir_mask_and.clearBit(6); - - // 7 wrd_caw2_data_ce_ue_err recoverable masked (until mss_unmask_maint_errors) - l_ecmd_rc |= l_mbafir_action0.clearBit(7); - l_ecmd_rc |= l_mbafir_action1.setBit(7); - l_ecmd_rc |= l_mbafir_mask_or.setBit(7); - - // 8:14 RESERVED recoverable mask (forever) - l_ecmd_rc |= l_mbafir_action0.clearBit(8,7); - l_ecmd_rc |= l_mbafir_action1.setBit(8,7); - l_ecmd_rc |= l_mbafir_mask_or.setBit(8,7); - - // 15 internal scom error recoverable mask (tbd) - l_ecmd_rc |= l_mbafir_action0.clearBit(15); - l_ecmd_rc |= l_mbafir_action1.setBit(15); - l_ecmd_rc |= l_mbafir_mask_or.setBit(15); - - // 16 internal scom error clone recoverable mask (tbd) - l_ecmd_rc |= l_mbafir_action0.clearBit(16); - l_ecmd_rc |= l_mbafir_action1.setBit(16); - l_ecmd_rc |= l_mbafir_mask_or.setBit(16); - - - // 17:63 RESERVED not implemented, so won't touch these - - if(l_ecmd_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - - l_rc.setEcmdError(l_ecmd_rc); - return l_rc; - } - - // Write action0 - l_rc = fapiPutScom_w_retry(i_target, - MBA01_MBAFIRACT0_0x03010606, - l_mbafir_action0); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - // Write action1 - l_rc = fapiPutScom_w_retry(i_target, - MBA01_MBAFIRACT1_0x03010607, - l_mbafir_action1); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - - // Write mask OR - l_rc = fapiPutScom_w_retry(i_target, - MBA01_MBAFIRMASK_OR_0x03010605, - l_mbafir_mask_or); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - - // Write mask AND - l_rc = fapiPutScom_w_retry(i_target, - MBA01_MBAFIRMASK_AND_0x03010604, - l_mbafir_mask_and); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - - //************************************************ - // DEBUG: read them all back to verify - l_rc = fapiGetScom_w_retry(i_target, - MBA01_MBAFIRACT0_0x03010606, - l_mbafir_action0); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - l_rc = fapiGetScom_w_retry(i_target, - MBA01_MBAFIRACT1_0x03010607, - l_mbafir_action1); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - l_rc = fapiGetScom_w_retry(i_target, - MBA01_MBAFIRMASK_0x03010603, - l_mbafir_mask); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - //************************************************ - - - FAPI_INF("EXIT mss_unmask_ddrphy_errors()"); - - return i_bad_rc; -} - - -//------------------------------------------------------------------------------ -// mss_unmask_draminit_errors -//------------------------------------------------------------------------------ - -fapi::ReturnCode mss_unmask_draminit_errors( const fapi::Target & i_target, - fapi::ReturnCode i_bad_rc ) - -{ - - FAPI_INF("ENTER mss_unmask_draminit_errors()"); - - fapi::ReturnCode l_rc; - uint32_t l_ecmd_rc = 0; - - //************************* - //************************* - // MBACALFIR - //************************* - //************************* - - ecmdDataBufferBase l_mbacalfir_mask(64); - ecmdDataBufferBase l_mbacalfir_mask_or(64); - ecmdDataBufferBase l_mbacalfir_mask_and(64); - ecmdDataBufferBase l_mbacalfir_action0(64); - ecmdDataBufferBase l_mbacalfir_action1(64); - - - // Read mask - l_rc = fapiGetScom_w_retry(i_target, MBA01_MBACALFIR_MASK_0x03010403, l_mbacalfir_mask); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - // TODO: Here is where I could clear bits that were bogus, before I unmask - // them. But typically we are expecting the bit set at this point - // to be valid errors for PRD to log. - - - //(Action0, Action1, Mask) - // - // (0,0,0) = checkstop - // (0,1,0) = recoverable error - // (1,0,0) = report unused - // (1,1,0) = machine check - // (x,x,1) = error is masked - - l_ecmd_rc |= l_mbacalfir_action0.flushTo0(); - l_ecmd_rc |= l_mbacalfir_action1.flushTo0(); - l_ecmd_rc |= l_mbacalfir_mask_or.flushTo0(); - l_ecmd_rc |= l_mbacalfir_mask_and.flushTo1(); - - // 0 MBA Recoverable Error recoverable mask - l_ecmd_rc |= l_mbacalfir_action0.clearBit(0); - l_ecmd_rc |= l_mbacalfir_action1.setBit(0); - l_ecmd_rc |= l_mbacalfir_mask_or.setBit(0); - - // 1 MBA Nonrecoverable Error channel checkstop mask - l_ecmd_rc |= l_mbacalfir_action0.clearBit(1); - l_ecmd_rc |= l_mbacalfir_action1.clearBit(1); - l_ecmd_rc |= l_mbacalfir_mask_or.setBit(1); - - // 2 Refresh Overrun recoverable mask - l_ecmd_rc |= l_mbacalfir_action0.clearBit(2); - l_ecmd_rc |= l_mbacalfir_action1.setBit(2); - l_ecmd_rc |= l_mbacalfir_mask_or.setBit(2); - - // 3 WAT error recoverable mask (forever) - l_ecmd_rc |= l_mbacalfir_action0.clearBit(3); - l_ecmd_rc |= l_mbacalfir_action1.setBit(3); - l_ecmd_rc |= l_mbacalfir_mask_or.setBit(3); - - // 4 RCD Parity Error 0 recoverable unmask (only if set) - // TODO: Unmask, only if set, only if ISD DIMM - l_ecmd_rc |= l_mbacalfir_action0.clearBit(4); - l_ecmd_rc |= l_mbacalfir_action1.setBit(4); - l_ecmd_rc |= l_mbacalfir_mask_or.setBit(4); - - // 5 ddr0_cal_timeout_err recoverable mask - l_ecmd_rc |= l_mbacalfir_action0.clearBit(5); - l_ecmd_rc |= l_mbacalfir_action1.setBit(5); - l_ecmd_rc |= l_mbacalfir_mask_or.setBit(5); - - // 6 ddr1_cal_timeout_err recoverable mask - l_ecmd_rc |= l_mbacalfir_action0.clearBit(6); - l_ecmd_rc |= l_mbacalfir_action1.setBit(6); - l_ecmd_rc |= l_mbacalfir_mask_or.setBit(6); - - // 7 RCD Parity Error 1 recoverable unmask (only if set) - // TODO: Unmask, only if set, only if ISD DIMM - l_ecmd_rc |= l_mbacalfir_action0.clearBit(7); - l_ecmd_rc |= l_mbacalfir_action1.setBit(7); - l_ecmd_rc |= l_mbacalfir_mask_or.setBit(7); - - - // 8 mbx to mba par error channel checkstop mask - l_ecmd_rc |= l_mbacalfir_action0.clearBit(8); - l_ecmd_rc |= l_mbacalfir_action1.clearBit(8); - l_ecmd_rc |= l_mbacalfir_mask_or.setBit(8); - - // 9 mba_wrd ue recoverable mask - l_ecmd_rc |= l_mbacalfir_action0.clearBit(9); - l_ecmd_rc |= l_mbacalfir_action1.setBit(9); - l_ecmd_rc |= l_mbacalfir_mask_or.setBit(9); - - // 10 mba_wrd ce recoverable mask - l_ecmd_rc |= l_mbacalfir_action0.clearBit(10); - l_ecmd_rc |= l_mbacalfir_action1.setBit(10); - l_ecmd_rc |= l_mbacalfir_mask_or.setBit(10); - - // 11 mba_maint ue recoverable mask - l_ecmd_rc |= l_mbacalfir_action0.clearBit(11); - l_ecmd_rc |= l_mbacalfir_action1.setBit(11); - l_ecmd_rc |= l_mbacalfir_mask_or.setBit(11); - - // 12 mba_maint ce recoverable mask - l_ecmd_rc |= l_mbacalfir_action0.clearBit(12); - l_ecmd_rc |= l_mbacalfir_action1.setBit(12); - l_ecmd_rc |= l_mbacalfir_mask_or.setBit(12); - - // 13 ddr_cal_reset_timeout channel checkstop mask - // TODO: Leaving masked until I find proper spot to unmask this - l_ecmd_rc |= l_mbacalfir_action0.clearBit(13); - l_ecmd_rc |= l_mbacalfir_action1.clearBit(13); - l_ecmd_rc |= l_mbacalfir_mask_or.setBit(13); - - // 14 wrq_data_ce recoverable mask - l_ecmd_rc |= l_mbacalfir_action0.clearBit(14); - l_ecmd_rc |= l_mbacalfir_action1.setBit(14); - l_ecmd_rc |= l_mbacalfir_mask_or.setBit(14); - - // 15 wrq_data_ue recoverable mask - l_ecmd_rc |= l_mbacalfir_action0.clearBit(15); - l_ecmd_rc |= l_mbacalfir_action1.setBit(15); - l_ecmd_rc |= l_mbacalfir_mask_or.setBit(15); - - // 16 wrq_data_sue recoverable mask - l_ecmd_rc |= l_mbacalfir_action0.clearBit(16); - l_ecmd_rc |= l_mbacalfir_action1.setBit(16); - l_ecmd_rc |= l_mbacalfir_mask_or.setBit(16); - - // 17 wrq_rrq_hang_err recoverable mask - l_ecmd_rc |= l_mbacalfir_action0.clearBit(17); - l_ecmd_rc |= l_mbacalfir_action1.setBit(17); - l_ecmd_rc |= l_mbacalfir_mask_or.setBit(17); - - // 18 sm_1hot_err recoverable unmask - l_ecmd_rc |= l_mbacalfir_action0.clearBit(18); - l_ecmd_rc |= l_mbacalfir_action1.setBit(18); - l_ecmd_rc |= l_mbacalfir_mask_and.clearBit(18); - - // 19 wrd_scom_error recoverable mask (tbd) - l_ecmd_rc |= l_mbacalfir_action0.clearBit(19); - l_ecmd_rc |= l_mbacalfir_action1.setBit(19); - l_ecmd_rc |= l_mbacalfir_mask_or.setBit(19); - - // 20 internal_scom_error recoverable mask (tbd) - l_ecmd_rc |= l_mbacalfir_action0.clearBit(20); - l_ecmd_rc |= l_mbacalfir_action1.setBit(20); - l_ecmd_rc |= l_mbacalfir_mask_or.setBit(20); - - // 21 internal_scom_error_copy recoverable mask (tbd) - l_ecmd_rc |= l_mbacalfir_action0.clearBit(21); - l_ecmd_rc |= l_mbacalfir_action1.setBit(21); - l_ecmd_rc |= l_mbacalfir_mask_or.setBit(21); - - // 22-63 Reserved not implemented, so won't touch these - - - if(l_ecmd_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - - l_rc.setEcmdError(l_ecmd_rc); - return l_rc; - } - - // Write action0 - l_rc = fapiPutScom_w_retry(i_target, MBA01_MBACALFIR_ACTION0_0x03010406, l_mbacalfir_action0); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - // Write action1 - l_rc = fapiPutScom_w_retry(i_target, MBA01_MBACALFIR_ACTION1_0x03010407, l_mbacalfir_action1); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - - // Write mask OR - l_rc = fapiPutScom_w_retry(i_target, MBA01_MBACALFIR_MASK_OR_0x03010405, l_mbacalfir_mask_or); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - // Write mask AND - l_rc = fapiPutScom_w_retry(i_target, MBA01_MBACALFIR_MASK_AND_0x03010404, l_mbacalfir_mask_and); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - - //************************************************ - // DEBUG: read them all back to verify - l_rc = fapiGetScom_w_retry(i_target, MBA01_MBACALFIR_ACTION0_0x03010406, l_mbacalfir_action0); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - l_rc = fapiGetScom_w_retry(i_target, MBA01_MBACALFIR_ACTION1_0x03010407, l_mbacalfir_action1); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - l_rc = fapiGetScom_w_retry(i_target, MBA01_MBACALFIR_MASK_0x03010403, l_mbacalfir_mask); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - //************************************************ - - - FAPI_INF("EXIT mss_unmask_draminit_errors()"); - - return i_bad_rc; -} - - -//------------------------------------------------------------------------------ -// mss_unmask_draminit_training_errors -//------------------------------------------------------------------------------ - -fapi::ReturnCode mss_unmask_draminit_training_errors( - const fapi::Target & i_target, - fapi::ReturnCode i_bad_rc ) - -{ - - FAPI_INF("ENTER mss_unmask_draminit_training_errors()"); - - fapi::ReturnCode l_rc; - uint32_t l_ecmd_rc = 0; - - //************************* - //************************* - // MBACALFIR - //************************* - //************************* - - ecmdDataBufferBase l_mbacalfir_mask(64); - ecmdDataBufferBase l_mbacalfir_mask_and(64); - - // NOTE: In the IPL sequence, mss_unmask_draminit_errors has already been - // called, which has already set the MBACALFIR action regs to their runtime - // values, so no need to touch the action regs here. - - // NOTE: In the IPL sequence, mss_unmask_draminit_errors has already been - // called, which has already unmasked the approproiate MBACALFIR errors - // following mss_draminit. So all we will do here is unmask a few more - // errors that would be considered valid after the mss_draminit_training - // procedure. - - - // Read mask - l_rc = fapiGetScom_w_retry(i_target, MBA01_MBACALFIR_MASK_0x03010403, l_mbacalfir_mask); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - // TODO: Here is where I could clear bits that were bogus, before I unmask - // them. But typically we are expecting the bit set at this point - // to be valid errors for PRD to log. - - - //(Action0, Action1, Mask) - // - // (0,0,0) = checkstop - // (0,1,0) = recoverable error - // (1,0,0) = report unused - // (1,1,0) = machine check - // (x,x,1) = error is masked - - l_ecmd_rc |= l_mbacalfir_mask_and.flushTo1(); - - // 0 MBA Recoverable Error recoverable umask - l_ecmd_rc |= l_mbacalfir_mask_and.clearBit(0); - - // 4 RCD Parity Error 0 recoverable unmask (only if set) - // TODO: Unmask, only if set, only if ISD DIMM - - // 7 RCD Parity Error 1 recoverable unmask (only if set) - // TODO: Unmask, only if set, only if ISD DIMM - - if(l_ecmd_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - - l_rc.setEcmdError(l_ecmd_rc); - return l_rc; - } - - - // Write mask AND - l_rc = fapiPutScom_w_retry(i_target, MBA01_MBACALFIR_MASK_AND_0x03010404, l_mbacalfir_mask_and); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - //************************************************ - // DEBUG: read them all back to verify - l_rc = fapiGetScom_w_retry(i_target, MBA01_MBACALFIR_MASK_0x03010403, l_mbacalfir_mask); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - //************************************************ - - - FAPI_INF("EXIT mss_unmask_draminit_training_errors()"); - - return i_bad_rc; -} - - -//------------------------------------------------------------------------------ -// mss_unmask_draminit_training_advanced_errors -//------------------------------------------------------------------------------ - -fapi::ReturnCode mss_unmask_draminit_training_advanced_errors( - const fapi::Target & i_target, - fapi::ReturnCode i_bad_rc ) - -{ - - FAPI_INF("ENTER mss_unmask_draminit_training_advanced_errors()"); - - fapi::ReturnCode l_rc; - uint32_t l_ecmd_rc = 0; - - //************************* - //************************* - // MBACALFIR - //************************* - //************************* - - ecmdDataBufferBase l_mbacalfir_mask(64); - ecmdDataBufferBase l_mbacalfir_mask_and(64); - - // NOTE: In the IPL sequence, mss_unmask_draminit_errors has already been - // called, which has already set the MBACALFIR action regs to their runtime - // values, so no need to touch the action regs here. - - // NOTE: In the IPL sequence, mss_unmask_draminit_errors and - // mss_unmask_draminit_training has already been - // called, which has already unmasked the approproiate MBACALFIR errors - // following mss_draminit and mss_draminit_training. So all we will do here - // is unmask a few more errors that would be considered valid after the - // mss_draminit_training_advanced procedure. - - - // Read mask - l_rc = fapiGetScom_w_retry(i_target, MBA01_MBACALFIR_MASK_0x03010403, l_mbacalfir_mask); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - // TODO: Here is where I could clear bits that were bogus, before I unmask - // them. But typically we are expecting the bit set at this point - // to be valid errors for PRD to log. - - - //(Action0, Action1, Mask) - // - // (0,0,0) = checkstop - // (0,1,0) = recoverable error - // (1,0,0) = report unused - // (1,1,0) = machine check - // (x,x,1) = error is masked - - l_ecmd_rc |= l_mbacalfir_mask_and.flushTo1(); - - // 4 RCD Parity Error 0 recoverable unmask - // TODO: Unmask, only if ISD DIMM - - // 7 RCD Parity Error 1 recoverable unmask - // TODO: Unmask, only if ISD DIMM - - // 8 mbx to mba par error channel checkstop unmask - l_ecmd_rc |= l_mbacalfir_mask_and.clearBit(8); - - // 11 mba_maint ue recoverable unmask - l_ecmd_rc |= l_mbacalfir_mask_and.clearBit(11); - - // 12 mba_maint ce recoverable unmask - l_ecmd_rc |= l_mbacalfir_mask_and.clearBit(12); - - // 17 wrq_rrq_hang_err recoverable unmask - l_ecmd_rc |= l_mbacalfir_mask_and.clearBit(17); - - - if(l_ecmd_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - - l_rc.setEcmdError(l_ecmd_rc); - return l_rc; - } - - - // Write mask AND - l_rc = fapiPutScom_w_retry(i_target, MBA01_MBACALFIR_MASK_AND_0x03010404, l_mbacalfir_mask_and); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - //************************************************ - // DEBUG: read them all back to verify - l_rc = fapiGetScom_w_retry(i_target, MBA01_MBACALFIR_MASK_0x03010403, l_mbacalfir_mask); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - //************************************************ - - - //************************* - //************************* - // MBSFIR - //************************* - //************************* - - fapi::Target l_targetCentaur; - uint8_t l_mbaPosition; // 0 = mba01, 1 = mba23 - - uint32_t l_mbsfir_mask_address[2]={ - // port0/1 port2/3 - MBS01_MBSFIRMASK_0x02011603, MBS23_MBSFIRMASK_0x02011703}; - - uint32_t l_mbsfir_mask_or_address[2]={ - // port0/1 port2/3 - MBS01_MBSFIRMASK_OR_0x02011605, MBS23_MBSFIRMASK_OR_0x02011705}; - - uint32_t l_mbsfir_mask_and_address[2]={ - // port0/1 port2/3 - MBS01_MBSFIRMASK_AND_0x02011604, MBS23_MBSFIRMASK_AND_0x02011704}; - - uint32_t l_mbsfir_action0_address[2]={ - // port0/1 port2/3 - MBS01_MBSFIRACT0_0x02011606, MBS23_MBSFIRACT0_0x02011706}; - - uint32_t l_mbsfir_action1_address[2]={ - // port0/1 port2/3 - MBS01_MBSFIRACT1_0x02011607, MBS23_MBSFIRACT1_0x02011707}; - - ecmdDataBufferBase l_mbsfir_mask(64); - ecmdDataBufferBase l_mbsfir_mask_or(64); - ecmdDataBufferBase l_mbsfir_mask_and(64); - ecmdDataBufferBase l_mbsfir_action0(64); - ecmdDataBufferBase l_mbsfir_action1(64); - - // Get Centaur target for the given MBA - l_rc = fapiGetParentChip(i_target, l_targetCentaur); - if(l_rc) - { - FAPI_ERR("Error getting Centaur parent target for the given MBA"); - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - // Get MBA position: 0 = mba01, 1 = mba23 - l_rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &i_target, l_mbaPosition); - if(l_rc) - { - FAPI_ERR("Error getting MBA position"); - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - // Read mask - l_rc = fapiGetScom_w_retry(l_targetCentaur, - l_mbsfir_mask_address[l_mbaPosition], - l_mbsfir_mask); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - // TODO: Here is where I could clear bits that were bogus, before I unmask - // them. But typically we are expecting the bit set at this point - // to be valid errors for PRD to log. - - - //(Action0, Action1, Mask) - // - // (0,0,0) = checkstop - // (0,1,0) = recoverable error - // (1,0,0) = report unused - // (1,1,0) = machine check - // (x,x,1) = error is masked - - l_ecmd_rc |= l_mbsfir_action0.flushTo0(); - l_ecmd_rc |= l_mbsfir_action1.flushTo0(); - l_ecmd_rc |= l_mbsfir_mask_or.flushTo0(); - l_ecmd_rc |= l_mbsfir_mask_and.flushTo1(); - - // 0 scom_par_errors recoverable unmask - l_ecmd_rc |= l_mbsfir_action0.clearBit(0); - l_ecmd_rc |= l_mbsfir_action1.setBit(0); - l_ecmd_rc |= l_mbsfir_mask_and.clearBit(0); - - // 1 mbx_par_errors channel checkstop unmask - l_ecmd_rc |= l_mbsfir_action0.clearBit(1); - l_ecmd_rc |= l_mbsfir_action1.clearBit(1); - l_ecmd_rc |= l_mbsfir_mask_and.clearBit(1); - - // 2:14 RESERVED recoverable mask (forever) - l_ecmd_rc |= l_mbsfir_action0.clearBit(2,13); - l_ecmd_rc |= l_mbsfir_action1.setBit(2,13); - l_ecmd_rc |= l_mbsfir_mask_or.setBit(2,13); - - // 15 internal scom error recoverable mask (tbd) - l_ecmd_rc |= l_mbsfir_action0.clearBit(15); - l_ecmd_rc |= l_mbsfir_action1.setBit(15); - l_ecmd_rc |= l_mbsfir_mask_or.setBit(15); - - // 16 internal scom error clone recoverable mask (tbd) - l_ecmd_rc |= l_mbsfir_action0.clearBit(16); - l_ecmd_rc |= l_mbsfir_action1.setBit(16); - l_ecmd_rc |= l_mbsfir_mask_or.setBit(16); - - // 17:63 RESERVED not implemented, so won't touch these - - - if(l_ecmd_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - - l_rc.setEcmdError(l_ecmd_rc); - return l_rc; - } - - // Write action0 - l_rc = fapiPutScom_w_retry(l_targetCentaur, - l_mbsfir_action0_address[l_mbaPosition], - l_mbsfir_action0); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - // Write action1 - l_rc = fapiPutScom_w_retry(l_targetCentaur, - l_mbsfir_action1_address[l_mbaPosition], - l_mbsfir_action1); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - - // Write mask OR - l_rc = fapiPutScom_w_retry(l_targetCentaur, - l_mbsfir_mask_or_address[l_mbaPosition], - l_mbsfir_mask_or); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - - // Write mask AND - l_rc = fapiPutScom_w_retry(l_targetCentaur, - l_mbsfir_mask_and_address[l_mbaPosition], - l_mbsfir_mask_and); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - - //************************************************ - // DEBUG: read them all back to verify - l_rc = fapiGetScom_w_retry(l_targetCentaur, - l_mbsfir_action0_address[l_mbaPosition], - l_mbsfir_action0); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - l_rc = fapiGetScom_w_retry(l_targetCentaur, - l_mbsfir_action1_address[l_mbaPosition], - l_mbsfir_action1); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - l_rc = fapiGetScom_w_retry(l_targetCentaur, - l_mbsfir_mask_address[l_mbaPosition], - l_mbsfir_mask); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - //************************************************ - - - FAPI_INF("EXIT mss_unmask_draminit_training_advanced_errors()"); - - return i_bad_rc; -} - - - -//------------------------------------------------------------------------------ -// mss_unmask_maint_errors -//------------------------------------------------------------------------------ - -fapi::ReturnCode mss_unmask_maint_errors(const fapi::Target & i_target, - fapi::ReturnCode i_bad_rc ) - -{ - - // Target: Centaur - - FAPI_INF("ENTER mss_unmask_maint_errors()"); - - fapi::ReturnCode l_rc; - uint32_t l_ecmd_rc = 0; - std::vector<fapi::Target> l_mbaChiplets; - uint8_t l_mbaPosition; // 0 = mba01, 1 = mba23 - - ecmdDataBufferBase l_mbacalfir_mask(64); - ecmdDataBufferBase l_mbacalfir_mask_and(64); - - ecmdDataBufferBase l_mbafir_mask(64); - ecmdDataBufferBase l_mbafir_mask_and(64); - - ecmdDataBufferBase l_mbaspa_mask(64); - - uint32_t l_mbeccfir_mask_address[2]={ - // port0/1 port2/3 - MBS_ECC0_MBECCFIR_MASK_0x02011443, MBS_ECC1_MBECCFIR_MASK_0x02011483}; - - uint32_t l_mbeccfir_mask_or_address[2]={ - // port0/1 port2/3 - MBS_ECC0_MBECCFIR_MASK_OR_0x02011445, MBS_ECC1_MBECCFIR_MASK_OR_0x02011485}; - - uint32_t l_mbeccfir_mask_and_address[2]={ - // port0/1 port2/3 - MBS_ECC0_MBECCFIR_MASK_AND_0x02011444,MBS_ECC1_MBECCFIR_MASK_AND_0x02011484}; - - uint32_t l_mbeccfir_action0_address[2]={ - // port0/1 port2/3 - MBS_ECC0_MBECCFIR_ACTION0_0x02011446, MBS_ECC1_MBECCFIR_ACTION0_0x02011486}; - - uint32_t l_mbeccfir_action1_address[2]={ - // port0/1 port2/3 - MBS_ECC0_MBECCFIR_ACTION1_0x02011447, MBS_ECC1_MBECCFIR_ACTION1_0x02011487}; - - ecmdDataBufferBase l_mbeccfir_mask(64); - ecmdDataBufferBase l_mbeccfir_mask_or(64); - ecmdDataBufferBase l_mbeccfir_mask_and(64); - ecmdDataBufferBase l_mbeccfir_action0(64); - ecmdDataBufferBase l_mbeccfir_action1(64); - - - - // Get associated functional MBAs on this centaur - l_rc = fapiGetChildChiplets(i_target, - fapi::TARGET_TYPE_MBA_CHIPLET, - l_mbaChiplets); - if(l_rc) - { - FAPI_ERR("Error getting functional MBAs on this Centaur"); - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - // Loop through functional MBAs on this Centaur - for (uint32_t i=0; i < l_mbaChiplets.size(); i++) - { - - // Get MBA position: 0 = mba01, 1 = mba23 - l_rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_mbaChiplets[i], l_mbaPosition); - if(l_rc) - { - FAPI_ERR("Error getting MBA position"); - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - - - - //************************* - //************************* - // MBACALFIR - //************************* - //************************* - - - // NOTE: In the IPL sequence, mss_unmask_draminit_errors has already been - // called, which has already set the MBACALFIR action regs to their runtime - // values, so no need to touch the action regs here. - - // NOTE: In the IPL sequence, mss_unmask_draminit_errors, - // mss_unmask_draminit_training and mss_unmask_draminit_training_advanced - // have already been called, which have already unmasked the approproiate - // MBACALFIR errors following mss_draminit, mss_draminit_training, and - // mss_unmask_draminit_training_advanced. So all we will do here - // is unmask a few more errors that would be considered valid after the - // mss_draminit_mc procedure. - - // Read mask - l_rc = fapiGetScom_w_retry(l_mbaChiplets[i], - MBA01_MBACALFIR_MASK_0x03010403, - l_mbacalfir_mask); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - // TODO: Here is where I could clear bits that were bogus, before I unmask - // them. But typically we are expecting the bit set at this point - // to be valid errors for PRD to log. - - - //(Action0, Action1, Mask) - // - // (0,0,0) = checkstop - // (0,1,0) = recoverable error - // (1,0,0) = report unused - // (1,1,0) = machine check - // (x,x,1) = error is masked - - l_ecmd_rc |= l_mbacalfir_mask_and.flushTo1(); - - // 1 MBA Nonrecoverable Error channel checkstop unmask - l_ecmd_rc |= l_mbacalfir_mask_and.clearBit(1); - - // 2 Refresh Overrun recoverable unmask - l_ecmd_rc |= l_mbacalfir_mask_and.clearBit(2); - - // 5 ddr0_cal_timeout_err recoverable unmask - l_ecmd_rc |= l_mbacalfir_mask_and.clearBit(5); - - // 6 ddr1_cal_timeout_err recoverable unmask - l_ecmd_rc |= l_mbacalfir_mask_and.clearBit(6); - - if(l_ecmd_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - - l_rc.setEcmdError(l_ecmd_rc); - return l_rc; - } - - // Write mask AND - l_rc = fapiPutScom_w_retry(l_mbaChiplets[i], - MBA01_MBACALFIR_MASK_AND_0x03010404, - l_mbacalfir_mask_and); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - //************************************************ - // DEBUG: read them all back to verify - l_rc = fapiGetScom_w_retry(l_mbaChiplets[i], - MBA01_MBACALFIR_MASK_0x03010403, - l_mbacalfir_mask); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - //************************************************ - - - //************************* - //************************* - // MBAFIR - //************************* - //************************* - - // NOTE: In the IPL sequence, mss_unmask_ddr_phy_errors has already been - // called, which has already set the MBAFIR action regs to their runtime - // values, so no need to touch the action regs here. - - // NOTE: In the IPL sequence, mss_unmask_ddr_phy_errors, - // has already been called, which has already unmasked the approproiate - // MBAFIR errors following mss_ddr_phy_reset. So all we will do here - // is unmask a few more errors that would be considered valid after the - // mss_draminit_mc procedure. - - // Read mask - l_rc = fapiGetScom_w_retry(l_mbaChiplets[i], - MBA01_MBAFIRMASK_0x03010603, - l_mbafir_mask); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - // TODO: Here is where I could clear bits that were bogus, before I unmask - // them. But typically we are expecting the bit set at this point - // to be valid errors for PRD to log. - - - //(Action0, Action1, Mask) - // - // (0,0,0) = checkstop - // (0,1,0) = recoverable error - // (1,0,0) = report unused - // (1,1,0) = machine check - // (x,x,1) = error is masked - - l_ecmd_rc |= l_mbafir_mask_and.flushTo1(); - - // 2 Multi_address_Maint_timeout recoverable unmask - l_ecmd_rc |= l_mbafir_mask_and.clearBit(2); - - - // 7 wrd_caw2_data_ce_ue_err recoverable unmask - l_ecmd_rc |= l_mbafir_mask_and.clearBit(7); - - if(l_ecmd_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - - l_rc.setEcmdError(l_ecmd_rc); - return l_rc; - } - - // Write mask AND - l_rc = fapiPutScom_w_retry(l_mbaChiplets[i], - MBA01_MBAFIRMASK_AND_0x03010604, - l_mbafir_mask_and); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - - //************************************************ - // DEBUG: read them all back to verify - l_rc = fapiGetScom_w_retry(l_mbaChiplets[i], - MBA01_MBAFIRMASK_0x03010603, - l_mbafir_mask); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - //************************************************ - - - //************************* - //************************* - // MBASPA - //************************* - //************************* - - - // Read mask - l_rc = fapiGetScom_w_retry(l_mbaChiplets[i], - MBA01_MBSPAMSKQ_0x03010614, - l_mbaspa_mask); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - // TODO: Here is where I could clear bits that were bogus, before I unmask - // them. But typically we are expecting the bit set at this point - // to be valid errors for PRD to log. - - - // 0 Command_Complete masked (DD1 broken) - l_ecmd_rc |= l_mbaspa_mask.setBit(0); - - // 1 Hard_CE_ETE_Attn unmask - // NOTE: FW memdiags may want to mask this if they want to wait till - // cmd gets to end of rank before getting any attention. - // NOTE: Hards counted during super fast read, but can't be called - // true hard CEs since super fast read doesn't write back and read again. - l_ecmd_rc |= l_mbaspa_mask.clearBit(1); - - // 2 Soft_CE_ETE_Attn unmask - // NOTE: FW memdiags may want to mask this if they want to wait till - // cmd gets to end of rank before getting any attention. - // NOTE: Softs not counted during super fast read. - l_ecmd_rc |= l_mbaspa_mask.clearBit(2); - - // 3 Intermittent_ETE_Attn unmask - // NOTE: FW memdiags may want to mask this if they want to wait till - // cmd gets to end of rank before getting any attention. - // NOTE: Intermittents not counted during super fast read. - l_ecmd_rc |= l_mbaspa_mask.clearBit(3); - - // 4 RCE_ETE_Attn unmask - // NOTE: FW memdiags may want to mask this if they want to wait till - // cmd gets to end of rank before getting any attention. - l_ecmd_rc |= l_mbaspa_mask.clearBit(4); - - // 5 Emergency_Throttle_Attn masked - l_ecmd_rc |= l_mbaspa_mask.setBit(5); - - // 6 Firmware_Attn0 masked - l_ecmd_rc |= l_mbaspa_mask.setBit(6); - - // 7 Firmware_Attn1 masked - l_ecmd_rc |= l_mbaspa_mask.setBit(7); - - // 8 wat_debug_attn unmask (DD1 workaround) - l_ecmd_rc |= l_mbaspa_mask.clearBit(8); - - // 9 Spare_Attn1 masked - l_ecmd_rc |= l_mbaspa_mask.setBit(9); - - // 10 MCBIST_Done masked - l_ecmd_rc |= l_mbaspa_mask.setBit(10); - - // 11:63 RESERVED not implemented, so won't touch these - - - if(l_ecmd_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - - l_rc.setEcmdError(l_ecmd_rc); - return l_rc; - } - - // Write mask - l_rc = fapiPutScom_w_retry(l_mbaChiplets[i], - MBA01_MBSPAMSKQ_0x03010614, - l_mbaspa_mask); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - //************************************************ - // DEBUG: read them all back to verify - l_rc = fapiGetScom_w_retry(l_mbaChiplets[i], - MBA01_MBSPAMSKQ_0x03010614, - l_mbaspa_mask); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - //************************************************ - - - - //************************* - //************************* - // MBECCFIR - //************************* - //************************* - - // Get MBA position: 0 = mba01, 1 = mba23 - l_rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_mbaChiplets[i], l_mbaPosition); - if(l_rc) - { - FAPI_ERR("Error getting MBA position"); - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - // Read mask - l_rc = fapiGetScom_w_retry(i_target, - l_mbeccfir_mask_address[l_mbaPosition], - l_mbeccfir_mask); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - // TODO: Here is where I could clear bits that were bogus, before I unmask - // them. But typically we are expecting the bit set at this point - // to be valid errors for PRD to log. - - - //(Action0, Action1, Mask) - // - // (0,0,0) = checkstop - // (0,1,0) = recoverable error - // (1,0,0) = report unused - // (1,1,0) = machine check - // (x,x,1) = error is masked - - l_ecmd_rc |= l_mbeccfir_action0.flushTo0(); - l_ecmd_rc |= l_mbeccfir_action1.flushTo0(); - l_ecmd_rc |= l_mbeccfir_mask_or.flushTo0(); - l_ecmd_rc |= l_mbeccfir_mask_and.flushTo1(); - - // 0:7 Memory MPE Rank 0:7 recoverable mask - l_ecmd_rc |= l_mbeccfir_action0.clearBit(0,8); - l_ecmd_rc |= l_mbeccfir_action1.setBit(0,8); - l_ecmd_rc |= l_mbeccfir_mask_or.setBit(0,8); - - // 8:15 Reserved recoverable mask (forever) - l_ecmd_rc |= l_mbeccfir_action0.clearBit(8,8); - l_ecmd_rc |= l_mbeccfir_action1.setBit(8,8); - l_ecmd_rc |= l_mbeccfir_mask_or.setBit(8,8); - - // 16 Memory NCE recoverable mask - l_ecmd_rc |= l_mbeccfir_action0.clearBit(16); - l_ecmd_rc |= l_mbeccfir_action1.setBit(16); - l_ecmd_rc |= l_mbeccfir_mask_or.setBit(16); - - // 17 Memory RCE recoverable mask - l_ecmd_rc |= l_mbeccfir_action0.clearBit(17); - l_ecmd_rc |= l_mbeccfir_action1.setBit(17); - l_ecmd_rc |= l_mbeccfir_mask_or.setBit(17); - - // 18 Memory SUE recoverable mask (forever) - l_ecmd_rc |= l_mbeccfir_action0.clearBit(18); - l_ecmd_rc |= l_mbeccfir_action1.setBit(18); - l_ecmd_rc |= l_mbeccfir_mask_or.setBit(18); - - // 19 Memory UE recoverable mask - l_ecmd_rc |= l_mbeccfir_action0.clearBit(19); - l_ecmd_rc |= l_mbeccfir_action1.setBit(19); - l_ecmd_rc |= l_mbeccfir_mask_or.setBit(19); - - // 20:27 Maint MPE Rank 0:7 recoverable unmask - // NOTE: FW memdiags may want to mask this if they want to wait till - // cmd gets to end of rank before getting any attention. - l_ecmd_rc |= l_mbeccfir_action0.clearBit(20,8); - l_ecmd_rc |= l_mbeccfir_action1.setBit(20,8); - l_ecmd_rc |= l_mbeccfir_mask_and.clearBit(20,8); - - // 28:35 Reserved recoverable mask (forever) - l_ecmd_rc |= l_mbeccfir_action0.clearBit(28,8); - l_ecmd_rc |= l_mbeccfir_action1.setBit(28,8); - l_ecmd_rc |= l_mbeccfir_mask_or.setBit(28,8); - - // 36 Maintenance NCE recoverable mask (tbd) - l_ecmd_rc |= l_mbeccfir_action0.clearBit(36); - l_ecmd_rc |= l_mbeccfir_action1.setBit(36); - l_ecmd_rc |= l_mbeccfir_mask_or.setBit(36); - - // 37 Maintenance SCE recoverable mask (tbd) - l_ecmd_rc |= l_mbeccfir_action0.clearBit(37); - l_ecmd_rc |= l_mbeccfir_action1.setBit(37); - l_ecmd_rc |= l_mbeccfir_mask_or.setBit(37); - - // 38 Maintenance MCE recoverable mask (tbd) - l_ecmd_rc |= l_mbeccfir_action0.clearBit(38); - l_ecmd_rc |= l_mbeccfir_action1.setBit(38); - l_ecmd_rc |= l_mbeccfir_mask_or.setBit(38); - - // 39 Maintenance RCE recoverable mask (tbd) - l_ecmd_rc |= l_mbeccfir_action0.clearBit(39); - l_ecmd_rc |= l_mbeccfir_action1.setBit(39); - l_ecmd_rc |= l_mbeccfir_mask_or.setBit(39); - - // 40 Maintenance SUE recoverable mask (forever) - l_ecmd_rc |= l_mbeccfir_action0.clearBit(40); - l_ecmd_rc |= l_mbeccfir_action1.setBit(40); - l_ecmd_rc |= l_mbeccfir_mask_or.setBit(40); - - // 41 Maintenance UE recoverable unmask (tbd) - // NOTE: FW memdiags may want to mask this if they want to wait till - // cmd gets to end of rank before getting any attention. - l_ecmd_rc |= l_mbeccfir_action0.clearBit(41); - l_ecmd_rc |= l_mbeccfir_action1.setBit(41); - l_ecmd_rc |= l_mbeccfir_mask_and.clearBit(41); - - // 42 MPE during maintenance mark mode recoverable mask (forever) - l_ecmd_rc |= l_mbeccfir_action0.clearBit(42); - l_ecmd_rc |= l_mbeccfir_action1.setBit(42); - l_ecmd_rc |= l_mbeccfir_mask_or.setBit(42); - - // 43 Prefetch Memory UE recoverable mask - l_ecmd_rc |= l_mbeccfir_action0.clearBit(43); - l_ecmd_rc |= l_mbeccfir_action1.setBit(43); - l_ecmd_rc |= l_mbeccfir_mask_or.setBit(43); - - // 44 Memory RCD parity error recoverable mask (forever) - l_ecmd_rc |= l_mbeccfir_action0.clearBit(44); - l_ecmd_rc |= l_mbeccfir_action1.setBit(44); - l_ecmd_rc |= l_mbeccfir_mask_or.setBit(44); - - // 45 Maint RCD parity error. recoverable mask (forever) - l_ecmd_rc |= l_mbeccfir_action0.clearBit(45); - l_ecmd_rc |= l_mbeccfir_action1.setBit(45); - l_ecmd_rc |= l_mbeccfir_mask_or.setBit(45); - - // 46 Recoverable reg parity recoverable unmask - l_ecmd_rc |= l_mbeccfir_action0.clearBit(46); - l_ecmd_rc |= l_mbeccfir_action1.setBit(46); - l_ecmd_rc |= l_mbeccfir_mask_and.clearBit(46); - - - // 47 Unrecoverable reg parity channel checkstop unmask - l_ecmd_rc |= l_mbeccfir_action0.clearBit(47); - l_ecmd_rc |= l_mbeccfir_action1.clearBit(47); - l_ecmd_rc |= l_mbeccfir_mask_and.clearBit(47); - - // 48 Maskable reg parity error recoverable mask (forever) - l_ecmd_rc |= l_mbeccfir_action0.clearBit(48); - l_ecmd_rc |= l_mbeccfir_action1.setBit(48); - l_ecmd_rc |= l_mbeccfir_mask_or.setBit(48); - - // 49 ecc datapath parity error channel checkstop unmask - l_ecmd_rc |= l_mbeccfir_action0.clearBit(49); - l_ecmd_rc |= l_mbeccfir_action1.clearBit(49); - l_ecmd_rc |= l_mbeccfir_mask_and.clearBit(49); - - // 50 internal scom error recovereble mask (tbd) - l_ecmd_rc |= l_mbeccfir_action0.clearBit(50); - l_ecmd_rc |= l_mbeccfir_action1.setBit(50); - l_ecmd_rc |= l_mbeccfir_mask_or.setBit(50); - - // 51 internal scom error clone recovereble mask (tbd) - l_ecmd_rc |= l_mbeccfir_action0.clearBit(51); - l_ecmd_rc |= l_mbeccfir_action1.setBit(51); - l_ecmd_rc |= l_mbeccfir_mask_or.setBit(51); - - // 52:63 Reserved not implemented, so won't touch these - - - - - if(l_ecmd_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - - l_rc.setEcmdError(l_ecmd_rc); - return l_rc; - } - - // Write action0 - l_rc = fapiPutScom_w_retry(i_target, - l_mbeccfir_action0_address[l_mbaPosition], - l_mbeccfir_action0); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - // Write action1 - l_rc = fapiPutScom_w_retry(i_target, - l_mbeccfir_action1_address[l_mbaPosition], - l_mbeccfir_action1); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - - // Write mask OR - l_rc = fapiPutScom_w_retry(i_target, - l_mbeccfir_mask_or_address[l_mbaPosition], - l_mbeccfir_mask_or); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - // Write mask AND - l_rc = fapiPutScom_w_retry(i_target, - l_mbeccfir_mask_and_address[l_mbaPosition], - l_mbeccfir_mask_and); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - - //************************************************ - // DEBUG: read them all back to verify - l_rc = fapiGetScom_w_retry(i_target, - l_mbeccfir_action0_address[l_mbaPosition], - l_mbeccfir_action0); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - l_rc = fapiGetScom_w_retry(i_target, - l_mbeccfir_action1_address[l_mbaPosition], - l_mbeccfir_action1); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - l_rc = fapiGetScom_w_retry(i_target, - l_mbeccfir_mask_address[l_mbaPosition], - l_mbeccfir_mask); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - //************************************************ - - } // End for loop through functional MBAs on this Centaur - - FAPI_INF("EXIT mss_unmask_maint_errors()"); - - return i_bad_rc; -} - - - - -//------------------------------------------------------------------------------ -// mss_unmask_fetch_errors -//------------------------------------------------------------------------------ - -fapi::ReturnCode mss_unmask_fetch_errors(const fapi::Target & i_target, - fapi::ReturnCode i_bad_rc ) - -{ - - // Target: Centaur - - FAPI_INF("ENTER mss_unmask_fetch_errors()"); - - fapi::ReturnCode l_rc; - uint32_t l_ecmd_rc = 0; - - - //************************* - //************************* - // SCAC_LFIR - //************************* - //************************* - - ecmdDataBufferBase l_scac_lfir_mask(64); - ecmdDataBufferBase l_scac_lfir_mask_or(64); - ecmdDataBufferBase l_scac_lfir_mask_and(64); - ecmdDataBufferBase l_scac_lfir_action0(64); - ecmdDataBufferBase l_scac_lfir_action1(64); - - // Read mask - l_rc = fapiGetScom_w_retry(i_target, SCAC_FIRMASK_0x020115C3, l_scac_lfir_mask); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - // TODO: Here is where I could clear bits that were bogus, before I unmask - // them. But typically we are expecting the bit set at this point - // to be valid errors for PRD to log. - - - //(Action0, Action1, Mask) - // - // (0,0,0) = checkstop - // (0,1,0) = recoverable error - // (1,0,0) = report unused - // (1,1,0) = machine check - // (x,x,1) = error is masked - - l_ecmd_rc |= l_scac_lfir_action0.flushTo0(); - l_ecmd_rc |= l_scac_lfir_action1.flushTo0(); - l_ecmd_rc |= l_scac_lfir_mask_or.flushTo0(); - l_ecmd_rc |= l_scac_lfir_mask_and.flushTo1(); - - // 0 I2CMInvAddr recoverable masked (forever) - l_ecmd_rc |= l_scac_lfir_action0.clearBit(0); - l_ecmd_rc |= l_scac_lfir_action1.setBit(0); - l_ecmd_rc |= l_scac_lfir_mask_or.setBit(0); - - // 1 I2CMInvWrite recoverable masked (forever) - l_ecmd_rc |= l_scac_lfir_action0.clearBit(1); - l_ecmd_rc |= l_scac_lfir_action1.setBit(1); - l_ecmd_rc |= l_scac_lfir_mask_or.setBit(1); - - // 2 I2CMInvRead recoverable masked (forever) - l_ecmd_rc |= l_scac_lfir_action0.clearBit(2); - l_ecmd_rc |= l_scac_lfir_action1.setBit(2); - l_ecmd_rc |= l_scac_lfir_mask_or.setBit(2); - - // 3 I2CMApar recoverable masked (forever) - l_ecmd_rc |= l_scac_lfir_action0.clearBit(3); - l_ecmd_rc |= l_scac_lfir_action1.setBit(3); - l_ecmd_rc |= l_scac_lfir_mask_or.setBit(3); - - // 4 I2CMPar recoverable masked (forever) - l_ecmd_rc |= l_scac_lfir_action0.clearBit(4); - l_ecmd_rc |= l_scac_lfir_action1.setBit(4); - l_ecmd_rc |= l_scac_lfir_mask_or.setBit(4); - - // 5 I2CMLBPar recoverable masked (forever) - l_ecmd_rc |= l_scac_lfir_action0.clearBit(5); - l_ecmd_rc |= l_scac_lfir_action1.setBit(5); - l_ecmd_rc |= l_scac_lfir_mask_or.setBit(5); - - // 6:9 Expansion recoverable masked (forever) - l_ecmd_rc |= l_scac_lfir_action0.clearBit(6,4); - l_ecmd_rc |= l_scac_lfir_action1.setBit(6,4); - l_ecmd_rc |= l_scac_lfir_mask_or.setBit(6,4); - - // 10 I2CMInvCmd recoverable masked (forever) - l_ecmd_rc |= l_scac_lfir_action0.clearBit(10); - l_ecmd_rc |= l_scac_lfir_action1.setBit(10); - l_ecmd_rc |= l_scac_lfir_mask_or.setBit(10); - - // 11 I2CMPErr recoverable masked (forever) - l_ecmd_rc |= l_scac_lfir_action0.clearBit(11); - l_ecmd_rc |= l_scac_lfir_action1.setBit(11); - l_ecmd_rc |= l_scac_lfir_mask_or.setBit(11); - - // 12 I2CMOverrun recoverable masked (forever) - l_ecmd_rc |= l_scac_lfir_action0.clearBit(12); - l_ecmd_rc |= l_scac_lfir_action1.setBit(12); - l_ecmd_rc |= l_scac_lfir_mask_or.setBit(12); - - // 13 I2CMAccess recoverable masked (forever) - l_ecmd_rc |= l_scac_lfir_action0.clearBit(13); - l_ecmd_rc |= l_scac_lfir_action1.setBit(13); - l_ecmd_rc |= l_scac_lfir_mask_or.setBit(13); - - // 14 I2CMArb recoverable masked (forever) - l_ecmd_rc |= l_scac_lfir_action0.clearBit(14); - l_ecmd_rc |= l_scac_lfir_action1.setBit(14); - l_ecmd_rc |= l_scac_lfir_mask_or.setBit(14); - - // 15 I2CMNack recoverable masked (forever) - l_ecmd_rc |= l_scac_lfir_action0.clearBit(15); - l_ecmd_rc |= l_scac_lfir_action1.setBit(15); - l_ecmd_rc |= l_scac_lfir_mask_or.setBit(15); - - // 16 I2CMStop recoverable masked (forever) - l_ecmd_rc |= l_scac_lfir_action0.clearBit(16); - l_ecmd_rc |= l_scac_lfir_action1.setBit(16); - l_ecmd_rc |= l_scac_lfir_mask_or.setBit(16); - - // 17 LocalPib1 recoverable masked (forever) - l_ecmd_rc |= l_scac_lfir_action0.clearBit(17); - l_ecmd_rc |= l_scac_lfir_action1.setBit(17); - l_ecmd_rc |= l_scac_lfir_mask_or.setBit(17); - - // 18 LocalPib2 recoverable masked (forever) - l_ecmd_rc |= l_scac_lfir_action0.clearBit(18); - l_ecmd_rc |= l_scac_lfir_action1.setBit(18); - l_ecmd_rc |= l_scac_lfir_mask_or.setBit(18); - - // 19 LocalPib3 recoverable masked (forever) - l_ecmd_rc |= l_scac_lfir_action0.clearBit(19); - l_ecmd_rc |= l_scac_lfir_action1.setBit(19); - l_ecmd_rc |= l_scac_lfir_mask_or.setBit(19); - - // 20 LocalPib4 recoverable masked (forever) - l_ecmd_rc |= l_scac_lfir_action0.clearBit(20); - l_ecmd_rc |= l_scac_lfir_action1.setBit(20); - l_ecmd_rc |= l_scac_lfir_mask_or.setBit(20); - - // 21 LocalPib5 recoverable masked (forever) - l_ecmd_rc |= l_scac_lfir_action0.clearBit(21); - l_ecmd_rc |= l_scac_lfir_action1.setBit(21); - l_ecmd_rc |= l_scac_lfir_mask_or.setBit(21); - - // 22 LocalPib6 recoverable masked (forever) - l_ecmd_rc |= l_scac_lfir_action0.clearBit(22); - l_ecmd_rc |= l_scac_lfir_action1.setBit(22); - l_ecmd_rc |= l_scac_lfir_mask_or.setBit(22); - - // 23 LocalPib7 recoverable masked (forever) - l_ecmd_rc |= l_scac_lfir_action0.clearBit(23); - l_ecmd_rc |= l_scac_lfir_action1.setBit(23); - l_ecmd_rc |= l_scac_lfir_mask_or.setBit(23); - - // 24 StallError recoverable masked (forever) - l_ecmd_rc |= l_scac_lfir_action0.clearBit(24); - l_ecmd_rc |= l_scac_lfir_action1.setBit(24); - l_ecmd_rc |= l_scac_lfir_mask_or.setBit(24); - - // 25 RegParErr channel checkstop unmask - l_ecmd_rc |= l_scac_lfir_action0.clearBit(25); - l_ecmd_rc |= l_scac_lfir_action1.clearBit(25); - l_ecmd_rc |= l_scac_lfir_mask_and.clearBit(25); - - // 26 RegParErrX channel checkstop unmask - l_ecmd_rc |= l_scac_lfir_action0.clearBit(26); - l_ecmd_rc |= l_scac_lfir_action1.clearBit(26); - l_ecmd_rc |= l_scac_lfir_mask_and.clearBit(26); - - // 27:31 Reserved recoverable masked (forever) - l_ecmd_rc |= l_scac_lfir_action0.clearBit(27,5); - l_ecmd_rc |= l_scac_lfir_action1.setBit(27,5); - l_ecmd_rc |= l_scac_lfir_mask_or.setBit(27,5); - - // 32 SMErr recoverable unmask - l_ecmd_rc |= l_scac_lfir_action0.clearBit(32); - l_ecmd_rc |= l_scac_lfir_action1.setBit(32); - l_ecmd_rc |= l_scac_lfir_mask_and.clearBit(32); - - // 33 RegAccErr recoverable unmask - l_ecmd_rc |= l_scac_lfir_action0.clearBit(33); - l_ecmd_rc |= l_scac_lfir_action1.setBit(33); - l_ecmd_rc |= l_scac_lfir_mask_and.clearBit(33); - - // 34 ResetErr recoverable masked (forever) - l_ecmd_rc |= l_scac_lfir_action0.clearBit(34); - l_ecmd_rc |= l_scac_lfir_action1.setBit(34); - l_ecmd_rc |= l_scac_lfir_mask_or.setBit(34); - - // 35 internal_scom_error recoverable masked (tbd) - l_ecmd_rc |= l_scac_lfir_action0.clearBit(35); - l_ecmd_rc |= l_scac_lfir_action1.setBit(35); - l_ecmd_rc |= l_scac_lfir_mask_or.setBit(35); - - // 36 internal_scom_error_clone recoverable masked (tbd) - l_ecmd_rc |= l_scac_lfir_action0.clearBit(36); - l_ecmd_rc |= l_scac_lfir_action1.setBit(36); - l_ecmd_rc |= l_scac_lfir_mask_or.setBit(36); - - // 37:63 Reserved - // Can we write to these bits? - - - if(l_ecmd_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - - l_rc.setEcmdError(l_ecmd_rc); - return l_rc; - } - - // Write action0 - l_rc = fapiPutScom_w_retry(i_target, SCAC_FIRACTION0_0x020115C6, l_scac_lfir_action0); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - // Write action1 - l_rc = fapiPutScom_w_retry(i_target, SCAC_FIRACTION1_0x020115C7, l_scac_lfir_action1); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - - // Write mask OR - l_rc = fapiPutScom_w_retry(i_target, SCAC_FIRMASK_OR_0x020115C5, l_scac_lfir_mask_or); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - // Write mask AND - l_rc = fapiPutScom_w_retry(i_target, SCAC_FIRMASK_AND_0x020115C4, l_scac_lfir_mask_and); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - - - //************************************************ - // DEBUG: read them all back to verify - l_rc = fapiGetScom_w_retry(i_target, SCAC_FIRACTION0_0x020115C6, l_scac_lfir_action0); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - l_rc = fapiGetScom_w_retry(i_target, SCAC_FIRACTION1_0x020115C7, l_scac_lfir_action1); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - l_rc = fapiGetScom_w_retry(i_target, SCAC_FIRMASK_0x020115C3, l_scac_lfir_mask); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - //************************************************ - - - //************************* - //************************* - // MBS_FIR_REG - //************************* - //************************* - - - // NOTE: In the IPL sequence, mss_unmask_inband_errors has already been - // called, which has already set the MBS_FIR_REG action regs to their - // runtime values, so no need to touch the action regs here. - - // NOTE: In the IPL sequence, mss_unmask_inband_errors, - // has already been called, which has already unmasked the approproiate - // MBS_FIR_REG errors following mss_unmask_inband_errors. So all we will do - // here is unmask errors requiring mainline traffic which would be - // considered valid after the mss_thermal_init procedure. - - - ecmdDataBufferBase l_mbs_fir_mask(64); - ecmdDataBufferBase l_mbs_fir_mask_and(64); - - // Read mask - l_rc = fapiGetScom_w_retry(i_target, MBS_FIR_MASK_REG_0x02011403, l_mbs_fir_mask); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - // TODO: Here is where I could clear bits that were bogus, before I unmask - // them. But typically we are expecting the bit set at this point - // to be valid errors for PRD to log. - - l_ecmd_rc |= l_mbs_fir_mask_and.flushTo1(); - - // 2 invalid_address_error channel checkstop unmask - l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(2); - - // 3 external_timeout channel checkstop unmask - l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(3); - - // 4 internal_timeout channel checkstop unmask - l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(4); - - // 9 cache_srw_ce recoverable unmask - l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(9); - - // 10 cache_srw_ue recoverable unmask - l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(10); - - // 12 cache_co_ce recoverable unmask - l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(12); - - // 13 cache_co_ue recoverable unmask - l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(13); - - // 15 dir_ce recoverable unmask - l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(15); - - // 16 dir_ue channel checkstop unmask - l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(16); - - // 18 dir_all_members_deleted channel checkstop unmask - l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(18); - - // 19 lru_error recoverable unmask - l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(19); - - // 20 eDRAM error channel checkstop unmask - l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(20); - - // 26 srb_buffer_ce recoverable unmask - l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(26); - - // 27 srb_buffer_ue recoverable unmask - l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(27); - - if(l_ecmd_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - - l_rc.setEcmdError(l_ecmd_rc); - return l_rc; - } - - // Write mask AND - l_rc = fapiPutScom_w_retry(i_target, MBS_FIR_MASK_REG_AND_0x02011404, l_mbs_fir_mask_and); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - - //************************************************ - // DEBUG: read them all back to verify - l_rc = fapiGetScom_w_retry(i_target, MBS_FIR_MASK_REG_0x02011403, l_mbs_fir_mask); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - //************************************************ - - - //************************* - //************************* - // MBECCFIR - //************************* - //************************* - - std::vector<fapi::Target> l_mbaChiplets; - uint8_t l_mbaPosition; // 0 = mba01, 1 = mba23 - - - uint32_t l_mbeccfir_mask_address[2]={ - // port0/1 port2/3 - MBS_ECC0_MBECCFIR_MASK_0x02011443,MBS_ECC1_MBECCFIR_MASK_0x02011483}; - - uint32_t l_mbeccfir_mask_and_address[2]={ - // port0/1 port2/3 - MBS_ECC0_MBECCFIR_MASK_AND_0x02011444,MBS_ECC1_MBECCFIR_MASK_AND_0x02011484}; - - ecmdDataBufferBase l_mbeccfir_mask(64); - ecmdDataBufferBase l_mbeccfir_mask_and(64); - - - // Get associated functional MBAs on this centaur - l_rc = fapiGetChildChiplets(i_target, - fapi::TARGET_TYPE_MBA_CHIPLET, - l_mbaChiplets); - if(l_rc) - { - FAPI_ERR("Error getting functional MBAs on this Centaur"); - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - // Loop through functional MBAs on this Centaur - for (uint32_t i=0; i < l_mbaChiplets.size(); i++) - { - - // Get MBA position: 0 = mba01, 1 = mba23 - l_rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_mbaChiplets[i], l_mbaPosition); - if(l_rc) - { - FAPI_ERR("Error getting MBA position"); - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - // Read mask - l_rc = fapiGetScom_w_retry(i_target, - l_mbeccfir_mask_address[l_mbaPosition], - l_mbeccfir_mask); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - // TODO: Here is where I could clear bits that were bogus, before I unmask - // them. But typically we are expecting the bit set at this point - // to be valid errors for PRD to log. - - // NOTE: In the IPL sequence, mss_unmask_maint_errors has already been - // called, which has already set the MBECCFIR action regs to their runtime - // values, so no need to touch the action regs here. - - // NOTE: In the IPL sequence, mss_unmask_maint_errors, - // has already been called, which has already unmasked the approproiate - // MBECCFIR errors following mss_unmask_maint_errors. So all we will do - // here is unmask errors requiring mainline traffic which would be - // considered valid after the mss_thermal_init procedure. - - l_ecmd_rc |= l_mbeccfir_mask_and.flushTo1(); - - // 0:7 Memory MPE Rank 0:7 recoverable unmask - l_ecmd_rc |= l_mbeccfir_mask_and.clearBit(0,8); - - // 16 Memory NCE recoverable unmask - l_ecmd_rc |= l_mbeccfir_mask_and.clearBit(16); - - // 17 Memory RCE recoverable unmask - l_ecmd_rc |= l_mbeccfir_mask_and.clearBit(17); - - // 19 Memory UE recoverable unmask - l_ecmd_rc |= l_mbeccfir_mask_and.clearBit(19); - - // 43 Prefetch Memory UE recoverable unmask - l_ecmd_rc |= l_mbeccfir_mask_and.clearBit(43); - - - if(l_ecmd_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - - l_rc.setEcmdError(l_ecmd_rc); - return l_rc; - } - - // Write mask AND - l_rc = fapiPutScom_w_retry(i_target, - l_mbeccfir_mask_and_address[l_mbaPosition], - l_mbeccfir_mask_and); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - //************************************************ - // DEBUG: read them all back to verify - l_rc = fapiGetScom_w_retry(i_target, - l_mbeccfir_mask_address[l_mbaPosition], - l_mbeccfir_mask); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - //************************************************ - } - - - //************************* - //************************* - // MBACALFIR - //************************* - //************************* - - ecmdDataBufferBase l_mbacalfir_mask(64); - ecmdDataBufferBase l_mbacalfir_mask_and(64); - - // NOTE: In the IPL sequence, mss_unmask_draminit_errors has already been - // called, which has already set the MBACALFIR action regs to their runtime - // values, so no need to touch the action regs here. - - // NOTE: In the IPL sequence, various bits have already been unmasked - // after the approproiate procedures. So all we will do here is unmask - // errors requiring mainline traffic which would be considered valid after - // the mss_thermal_init procedure. - - // Loop through functional MBAs on this Centaur - for (uint32_t i=0; i < l_mbaChiplets.size(); i++) - { - - // Read mask - l_rc = fapiGetScom_w_retry(l_mbaChiplets[i], - MBA01_MBACALFIR_MASK_0x03010403, - l_mbacalfir_mask); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - // TODO: Here is where I could clear bits that were bogus, before I unmask - // them. But typically we are expecting the bit set at this point - // to be valid errors for PRD to log. - - l_ecmd_rc |= l_mbacalfir_mask_and.flushTo1(); - - // 9 mba_wrd ue recoverable unmask - l_ecmd_rc |= l_mbacalfir_mask_and.clearBit(9); - - // 10 mba_wrd ce recoverable unmask - l_ecmd_rc |= l_mbacalfir_mask_and.clearBit(10); - - // 14 wrq_data_ce recoverable unmask - l_ecmd_rc |= l_mbacalfir_mask_and.clearBit(14); - - // 15 wrq_data_ue recoverable unmask - l_ecmd_rc |= l_mbacalfir_mask_and.clearBit(15); - - if(l_ecmd_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - - l_rc.setEcmdError(l_ecmd_rc); - return l_rc; - } - - // Write mask AND - l_rc = fapiPutScom_w_retry(l_mbaChiplets[i], - MBA01_MBACALFIR_MASK_AND_0x03010404, - l_mbacalfir_mask_and); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - - //************************************************ - // DEBUG: read them all back to verify - l_rc = fapiGetScom_w_retry(l_mbaChiplets[i], - MBA01_MBACALFIR_MASK_0x03010403, - l_mbacalfir_mask); - if(l_rc) - { - // Log passed in error before returning with new error - if (i_bad_rc) fapiLogError(i_bad_rc); - return l_rc; - } - - //************************************************ - } - - - - - FAPI_INF("EXIT mss_unmask_fetch_errors()"); - - return i_bad_rc; -} - -//------------------------------------------------------------------------------ -// fapiGetScom_w_retry -//------------------------------------------------------------------------------ -fapi::ReturnCode fapiGetScom_w_retry(const fapi::Target& i_target, - const uint64_t i_address, - ecmdDataBufferBase & o_data) -{ - fapi::ReturnCode l_rc; - - l_rc = fapiGetScom(i_target, i_address, o_data); - if(l_rc) - { - FAPI_ERR("1st Centaur fapiGetScom failed, so attempting retry."); - - // Log centaur scom error - fapiLogError(l_rc); - - // Retry centaur scom with assumption that retry is done via FSI, - // which may still work. - // NOTE: If scom fail was due to channel fail a retry via FSI may - // work. But if scom fail was due to PIB error, retry via FSI may - // also fail. - l_rc = fapiGetScom(i_target, i_address, o_data); - if(l_rc) - { - FAPI_ERR("fapiGetScom retry via FSI failed."); - // Retry didn't work either so give up and pass - // back centaur scom error - } - } - - return l_rc; -} - - -//------------------------------------------------------------------------------ -// fapiPutScom_w_retry -//------------------------------------------------------------------------------ -fapi::ReturnCode fapiPutScom_w_retry(const fapi::Target& i_target, - const uint64_t i_address, - ecmdDataBufferBase & i_data) -{ - fapi::ReturnCode l_rc; - - // NOTE: Inband scom device driver takes care of read to special reg after - // an inband scom write in order to detect SUE - l_rc = fapiPutScom(i_target, i_address, i_data); - if(l_rc) - { - FAPI_ERR("1st Centaur fapiPutScom failed, so attempting retry."); - - // Log centaur scom error - fapiLogError(l_rc); - - // Retry centaur scom with assumption that retry is done via FSI, - // which may still work. - // NOTE: If scom fail was due to channel fail a retry via FSI may - // work. But if scom fail was due to PIB error, retry via FSI may - // also fail. - l_rc = fapiPutScom(i_target, i_address, i_data); - if(l_rc) - { - FAPI_ERR("fapiPutScom retry via FSI failed."); - // Retry didn't work either so give up and pass - // back centaur scom error - } - } - - return l_rc; -} |
