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| author | Thi Tran <thi@us.ibm.com> | 2013-11-26 20:18:16 -0600 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2013-12-04 14:50:26 -0600 |
| commit | 4003ca7ceb88feeadeb4e96ef59575c51866d5b7 (patch) | |
| tree | 6faa7bf92c158c41eaf22926bbd5be164f24211e /src/usr/hwpf/hwp/dram_training/mss_scominit/mss_scominit.C | |
| parent | f8992cce0088036cc7a4bfd8b0c8835133f73430 (diff) | |
| download | talos-hostboot-4003ca7ceb88feeadeb4e96ef59575c51866d5b7.tar.gz talos-hostboot-4003ca7ceb88feeadeb4e96ef59575c51866d5b7.zip | |
INITPROC: Hostboot - SW235740 Mike RAS Review set 3
Change-Id: Ic93e6788d7edbc235d95f1739e690d728dfb13e3
CQ:SW235740
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/7450
Tested-by: Jenkins Server
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/hwpf/hwp/dram_training/mss_scominit/mss_scominit.C')
| -rw-r--r-- | src/usr/hwpf/hwp/dram_training/mss_scominit/mss_scominit.C | 17 |
1 files changed, 10 insertions, 7 deletions
diff --git a/src/usr/hwpf/hwp/dram_training/mss_scominit/mss_scominit.C b/src/usr/hwpf/hwp/dram_training/mss_scominit/mss_scominit.C index 689dc7672..f168f4ad0 100644 --- a/src/usr/hwpf/hwp/dram_training/mss_scominit/mss_scominit.C +++ b/src/usr/hwpf/hwp/dram_training/mss_scominit/mss_scominit.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: mss_scominit.C,v 1.17 2013/07/02 21:05:23 mwuu Exp $ +// $Id: mss_scominit.C,v 1.18 2013/11/18 21:49:25 mwuu Exp $ //------------------------------------------------------------------------------ // *! (C) Copyright International Business Machines Corp. 2011 // *! All Rights Reserved -- Property of IBM @@ -41,6 +41,7 @@ //------------------------------------------------------------------------------ // Version:| Author: | Date: | Comment: //---------|----------|---------|----------------------------------------------- +// 1.18 | menlowuu |14-NOV-13| Added Mike Jones changes for callouts // 1.17 | menlowuu |02-JUL-13| Fixed vector insert for L4 targets // 1.16 | menlowuu |02-JUL-13| Added L4 targets for MBS initfile // 1.15 | menlowuu |11-NOV-12| Removed include of dimmBadDqBitmapFuncs.H> @@ -121,10 +122,10 @@ ReturnCode mss_scominit(const Target & i_target) { } else if (vector_targets.size() != 2) { - FAPI_ERR("fapiGetChildChiplets returned present MBAs != 2"); - FAPI_SET_HWP_ERROR(rc, RC_MSS_NUM_MBA_ERROR); - FAPI_ERR("Present MBAs = %i, generating RC_MSS_NUM_MBA_ERROR = 0x%x", - vector_targets.size(), static_cast<uint32_t>(rc)); + FAPI_ERR("fapiGetChildChiplets returned %d present MBAs, expected 2", + vector_targets.size()); + uint32_t NUM_MBAS = vector_targets.size(); + FAPI_SET_HWP_ERROR(rc, RC_MSS_SCOMINIT_NUM_MBA_ERROR); return (rc); } else @@ -146,8 +147,10 @@ ReturnCode mss_scominit(const Target & i_target) { if (vector_l4_targets.size() != 1) { - FAPI_ERR("Error target does not have L4!"); - FAPI_ERR("RC = 0x%x", static_cast<uint32_t>(rc)); + FAPI_ERR("fapiGetChildChiplets returned %d present L4s, expected 1", + vector_l4_targets.size()); + uint32_t NUM_L4S = vector_l4_targets.size(); + FAPI_SET_HWP_ERROR(rc, RC_MSS_SCOMINIT_NUM_L4_ERROR); return (rc); } |
