INITPROC: Hostboot SW250240 Misc HWP update week 03/04/2014

Change-Id: Ifb4adc000484271a06fdb3110b62c49f905661d0
CQ:SW250240
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/9617
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

4 files changed, 104 insertions, 74 deletions

diff --git a/src/usr/hwpf/hwp/dram_initialization/host_mpipl_service/proc_mpipl_chip_cleanup.C b/src/usr/hwpf/hwp/dram_initialization/host_mpipl_service/proc_mpipl_chip_cleanup.C
index 114638655..e10e5c295 100644
--- a/src/usr/hwpf/hwp/dram_initialization/host_mpipl_service/proc_mpipl_chip_cleanup.C
+++ b/src/usr/hwpf/hwp/dram_initialization/host_mpipl_service/proc_mpipl_chip_cleanup.C
@@ -20,7 +20,7 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: proc_mpipl_chip_cleanup.C,v 1.7 2014/02/20 23:18:01 belldi Exp $
+// $Id: proc_mpipl_chip_cleanup.C,v 1.8 2014/03/02 23:14:49 belldi Exp $
 // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_mpipl_chip_cleanup.C,v $
 //------------------------------------------------------------------------------
 // *|
@@ -103,8 +103,8 @@ extern "C"
     fapi::ReturnCode rc; //fapi return code value
     uint32_t rc_ecmd = 0;    //ecmd return code value
     const uint32_t data_size = 64; //Size of data buffer
-    ecmdDataBufferBase fsi_data(data_size);
     const int MAX_MCD_DIRS = 2; //Max of 2 MCD Directories (even and odd)
+    ecmdDataBufferBase fsi_data[MAX_MCD_DIRS];
     const uint64_t ARY_MCD_RECOVERY_CTRL_REGS_ADDRS[MAX_MCD_DIRS] = {
       0x0000000002013410, //MCD even recovery control register address
       0x0000000002013411  //MCD odd recovery control register address
@@ -120,74 +120,89 @@ extern "C"
       0x02012400,
       0x02012800
     };     
-
-    //Verify MCD recovery was previously disabled for even and odd slices
-    //If not, this is an error condition
-    for (int counter = 0; counter < MAX_MCD_DIRS; counter++) {
-      FAPI_DBG("Verifying MCD %s Recovery is disabled", ARY_MCD_DIR_STRS[counter]);
-      
-      //Get data from MCD Even or Odd Recovery Ctrl reg
-      rc = fapiGetScom(i_target, ARY_MCD_RECOVERY_CTRL_REGS_ADDRS[counter], fsi_data);
-      if (rc) {
-        FAPI_ERR("%s: fapiGetScom error (addr: 0x%08llX)", procedureName, ARY_MCD_RECOVERY_CTRL_REGS_ADDRS[counter]);
-        return rc;
+    
+    do {
+      //Set bit length for 64-bit buffers
+      rc_ecmd = fsi_data[0].setBitLength(data_size);
+      rc_ecmd |= fsi_data[1].setBitLength(data_size);
+      if(rc_ecmd) {
+        rc.setEcmdError(rc_ecmd);
+        break;
       }
-
-      //Check whether bit 0 is 0, meaning MCD recovery is disabled as expected
-      if( fsi_data.getBit(MCD_RECOVERY_CTRL_REG_BIT_POS0) ) {
-        FAPI_ERR("%s: MCD %s Recovery not disabled as expected", procedureName, ARY_MCD_DIR_STRS[counter]);
-        const fapi::Target & CHIP_TARGET = i_target;
-        ecmdDataBufferBase & DATA_BUFFER = fsi_data;
-        FAPI_SET_HWP_ERROR(rc, RC_MCD_RECOVERY_NOT_DISABLED_RC);
-        return rc;
+  
+      //Verify MCD recovery was previously disabled for even and odd slices
+      //If not, this is an error condition
+      for (int counter = 0; counter < MAX_MCD_DIRS; counter++) {
+        FAPI_DBG("Verifying MCD %s Recovery is disabled, target=%s", ARY_MCD_DIR_STRS[counter], i_target.toEcmdString());
+        
+        //Get data from MCD Even or Odd Recovery Ctrl reg
+        rc = fapiGetScom(i_target, ARY_MCD_RECOVERY_CTRL_REGS_ADDRS[counter], fsi_data[counter]);
+        if (!rc.ok()) {
+          FAPI_ERR("%s: fapiGetScom error (addr: 0x%08llX), target=%s", procedureName, ARY_MCD_RECOVERY_CTRL_REGS_ADDRS[counter], i_target.toEcmdString());
+          break;
+        }
+        
+  
+        //Check whether bit 0 is 0, meaning MCD recovery is disabled as expected
+        if( fsi_data[counter].getBit(MCD_RECOVERY_CTRL_REG_BIT_POS0) ) {
+          FAPI_ERR("%s: MCD %s Recovery not disabled as expected, target=%s", procedureName, ARY_MCD_DIR_STRS[counter], i_target.toEcmdString());
+          const fapi::Target & CHIP_TARGET = i_target;
+  	  const uint64_t & MCD_RECOV_CTRL_REG_ADDR = ARY_MCD_RECOVERY_CTRL_REGS_ADDRS[counter];
+          ecmdDataBufferBase & MCD_RECOV_CTRL_REG_DATA = fsi_data[counter];
+          FAPI_SET_HWP_ERROR(rc, RC_MPIPL_MCD_RECOVERY_NOT_DISABLED_RC);
+          break;
+        }
       }
-    }
-
-    //Assert bit 0 of MCD Recovery Ctrl regs to enable MCD recovery
-    for (int counter = 0; counter < MAX_MCD_DIRS; counter++) {
-      FAPI_DBG("Enabling MCD %s Recovery", ARY_MCD_DIR_STRS[counter]);
-      
-      //Get data from MCD Even or Odd Recovery Control reg
-      rc = fapiGetScom(i_target, ARY_MCD_RECOVERY_CTRL_REGS_ADDRS[counter], fsi_data);
-      if (rc) {
-        FAPI_ERR("%s: fapiGetScom error (addr: 0x%08llX)", procedureName, ARY_MCD_RECOVERY_CTRL_REGS_ADDRS[counter]);
-        return rc;
+      if(!rc.ok()) {
+        break;
       }
-      
-      //Assert bit 0 of MCD Even or Odd Recovery Control reg to enable recovery
-      rc_ecmd = fsi_data.setBit(MCD_RECOVERY_CTRL_REG_BIT_POS0 );
-      if(rc_ecmd) {
-        FAPI_ERR("%s: Error (%u) asserting bit pos %u in ecmdDataBufferBase that stores value of MCD %s Recovery Control reg (addr: 0x%08llX)", procedureName, rc_ecmd, MCD_RECOVERY_CTRL_REG_BIT_POS0, ARY_MCD_DIR_STRS[counter], ARY_MCD_RECOVERY_CTRL_REGS_ADDRS[counter]);
+  
+      //Assert bit 0 of MCD Recovery Ctrl regs to enable MCD recovery
+      for (int counter = 0; counter < MAX_MCD_DIRS; counter++) {
+        FAPI_DBG("Enabling MCD %s Recovery, target=%s", ARY_MCD_DIR_STRS[counter], i_target.toEcmdString());
+        
+        //Assert bit 0 of MCD Even or Odd Recovery Control reg to enable recovery
+        rc_ecmd = fsi_data[counter].setBit(MCD_RECOVERY_CTRL_REG_BIT_POS0 );
+        if(rc_ecmd) {
+          FAPI_ERR("%s: Error (%u) asserting bit pos %u in ecmdDataBufferBase that stores value of MCD %s Recovery Control reg (addr: 0x%08llX), target=%s", procedureName, rc_ecmd, MCD_RECOVERY_CTRL_REG_BIT_POS0, ARY_MCD_DIR_STRS[counter], ARY_MCD_RECOVERY_CTRL_REGS_ADDRS[counter], i_target.toEcmdString());
+          rc.setEcmdError(rc_ecmd);
+          break;
+        }
+        
+        //Write data to MCD Even or Odd Recovery Control reg
+        rc = fapiPutScom(i_target, ARY_MCD_RECOVERY_CTRL_REGS_ADDRS[counter], fsi_data[counter]);
+        if (!rc.ok()) {
+          FAPI_ERR("%s: fapiPutScom error (addr: 0x%08llX), target=%s", procedureName, ARY_MCD_RECOVERY_CTRL_REGS_ADDRS[counter], i_target.toEcmdString());
+          break;
+        }
+      }
+      if(!rc.ok()) {
+        break;
+      }
+  
+      // SW227429: clear PCI Nest FIR registers
+      // hostboot is blindly sending EOIs in order to ensure no interrupts are pending when  PHYP starts up again
+      // with ETU held in reset, these get trapped in PCI and force a freeze to occur (PCI Nest FIR(14))
+      // clearing the FIR should remove the freeze condition
+      rc_ecmd = fsi_data[0].flushTo0();
+      if (rc_ecmd) {
+        FAPI_ERR("%s: Error (%u) forming PCI Nest FIR clear data buffer, target=%s", procedureName, rc_ecmd, i_target.toEcmdString());
         rc.setEcmdError(rc_ecmd);
-        return rc;
+        break;
       }
       
-      //Write data to MCD Even or Odd Recovery Control reg
-      rc = fapiPutScom(i_target, ARY_MCD_RECOVERY_CTRL_REGS_ADDRS[counter], fsi_data);
-      if (rc) {
-        FAPI_ERR("%s: fapiPutScom error (addr: 0x%08llX)", procedureName, ARY_MCD_RECOVERY_CTRL_REGS_ADDRS[counter]);
-        return rc;
+      for (int counter = 0; counter < MAX_PHBS; counter++) {
+        FAPI_DBG("Clearing PCI%d Nest FIR, target=%s", counter, i_target.toEcmdString());
+        rc = fapiPutScom(i_target, PCI_NEST_FIR_REG_ADDRS[counter], fsi_data[0]);
+        if (!rc.ok()) {
+          FAPI_ERR("%s: fapiPutScom error (addr: 0x%08llX), target=%s", procedureName, PCI_NEST_FIR_REG_ADDRS[counter], i_target.toEcmdString());
+          break;
+        }
       }
-    }
+    } while(0);
+
+    FAPI_IMP("Exiting %s", procedureName);
 
-    // SW227429: clear PCI Nest FIR registers
-    // hostboot is blindly sending EOIs in order to ensure no interrupts are pending when  PHYP starts up again
-    // with ETU held in reset, these get trapped in PCI and force a freeze to occur (PCI Nest FIR(14))
-    // clearing the FIR should remove the freeze condition
-    rc_ecmd = fsi_data.flushTo0();
-    if (rc_ecmd) {
-      FAPI_ERR("%s: Error (%u) forming PCI Nest FIR clear data buffer", procedureName, rc_ecmd);
-      rc.setEcmdError(rc_ecmd);
-      return rc;
-    }
-    for (int counter = 0; counter < MAX_PHBS; counter++) {
-      FAPI_DBG("Clearing PCI%d Nest FIR", counter);
-      rc = fapiPutScom(i_target, PCI_NEST_FIR_REG_ADDRS[counter], fsi_data);
-      if (rc) {
-        FAPI_ERR("%s: fapiPutScom error (addr: 0x%08llX)", procedureName, PCI_NEST_FIR_REG_ADDRS[counter]);
-        return rc;
-      }
-    }
     return rc;
   }
 
diff --git a/src/usr/hwpf/hwp/dram_initialization/host_mpipl_service/proc_mpipl_chip_cleanup.H b/src/usr/hwpf/hwp/dram_initialization/host_mpipl_service/proc_mpipl_chip_cleanup.H
index 0784d68cc..c441ed976 100644
--- a/src/usr/hwpf/hwp/dram_initialization/host_mpipl_service/proc_mpipl_chip_cleanup.H
+++ b/src/usr/hwpf/hwp/dram_initialization/host_mpipl_service/proc_mpipl_chip_cleanup.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* IBM CONFIDENTIAL                                                       */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2012                   */
+/* COPYRIGHT International Business Machines Corp. 2012,2014              */
 /*                                                                        */
 /* p1                                                                     */
 /*                                                                        */
@@ -20,7 +20,7 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: proc_mpipl_chip_cleanup.H,v 1.2 2012/11/27 21:37:11 belldi Exp $
+// $Id: proc_mpipl_chip_cleanup.H,v 1.3 2014/03/02 23:16:17 belldi Exp $
 // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_mpipl_chip_cleanup.H,v $
 //------------------------------------------------------------------------------
 // *|
@@ -56,7 +56,7 @@ extern "C"
   /**
   * @brief To enable MCD recovery
   *
-  * @param[in] (1) 'i_target' Reference to chip target
+  * @param[in] (1) 'i_target' Reference to processor chip target
   *
   * @return ReturnCode
   *
diff --git a/src/usr/hwpf/hwp/dram_initialization/host_mpipl_service/proc_mpipl_chip_cleanup_errors.xml b/src/usr/hwpf/hwp/dram_initialization/host_mpipl_service/proc_mpipl_chip_cleanup_errors.xml
index e7488551b..e961f9d08 100644
--- a/src/usr/hwpf/hwp/dram_initialization/host_mpipl_service/proc_mpipl_chip_cleanup_errors.xml
+++ b/src/usr/hwpf/hwp/dram_initialization/host_mpipl_service/proc_mpipl_chip_cleanup_errors.xml
@@ -20,17 +20,19 @@
 <!-- Origin: 30                                                             -->
 <!--                                                                        -->
 <!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_mpipl_chip_cleanup_errors.xml,v 1.4 2014/02/19 23:36:03 belldi Exp $ -->
+<!-- $Id: proc_mpipl_chip_cleanup_errors.xml,v 1.5 2014/03/02 23:18:31 belldi Exp $ -->
 <!-- Error codes for proc_mpipl_chip_cleanup -->
 <hwpErrors>
   <!-- ******************************************************************** -->
   <hwpError>
-    <rc>RC_MCD_RECOVERY_NOT_DISABLED_RC</rc>
-    <description>MCD recovery is not disabled as expected</description>
+    <rc>RC_MPIPL_MCD_RECOVERY_NOT_DISABLED_RC</rc>
+    <description>MCD recovery is not disabled as expected during MPIPL</description>
     <!-- Add target chip -->
     <ffdc>CHIP_TARGET</ffdc>
-    <!-- Add data buffer -->
-    <ffdc>DATA_BUFFER</ffdc>
+    <!-- Add register address -->
+    <ffdc>MCD_RECOV_CTRL_REG_ADDR</ffdc>
+    <!-- Add register data -->
+    <ffdc>MCD_RECOV_CTRL_REG_DATA</ffdc>
     <!-- Add procedure callout -->
     <callout>
       <procedure>CODE</procedure>
diff --git a/src/usr/hwpf/hwp/dram_initialization/mss_thermal_init/mss_thermal_init.C b/src/usr/hwpf/hwp/dram_initialization/mss_thermal_init/mss_thermal_init.C
index 50ac8bcb7..471614764 100644
--- a/src/usr/hwpf/hwp/dram_initialization/mss_thermal_init/mss_thermal_init.C
+++ b/src/usr/hwpf/hwp/dram_initialization/mss_thermal_init/mss_thermal_init.C
@@ -20,7 +20,7 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: mss_thermal_init.C,v 1.14 2014/02/13 15:44:05 pardeik Exp $
+// $Id: mss_thermal_init.C,v 1.15 2014/02/26 21:19:10 pardeik Exp $
 // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/centaur/working/procedures/ipl/fapi/mss_thermal_init.C,v $
 //------------------------------------------------------------------------------
 // *! (C) Copyright International Business Machines Corp. 2011
@@ -47,6 +47,7 @@
 //------------------------------------------------------------------------------
 // Version:|  Author: |  Date:  | Comment:
 //---------|----------|---------|-----------------------------------------------
+//   1.15  | pardeik  |24-FEB-14| added support for ATTR_MRW_CDIMM_SPARE_I2C_TEMP_SENSOR_ENABLE
 //   1.14  | pardeik  |12-FEB-14| changed CONFIG_INTERVAL_TIMER from 5 to 15 to 
 //   1.13  | pardeik  |30-JAN-14| workaround for SW243504 (enable sensors on master
 //                              |   i2c bus if ATTR_MRW_CDIMM_MASTER_I2C_TEMP_SENSOR_ENABLE=ON)
@@ -172,6 +173,7 @@ fapi::ReturnCode mss_thermal_init(const fapi::Target & i_target)
       uint8_t l_i2c_bus_encode;
       uint8_t l_sensor_map_mask;
       uint8_t l_master_i2c_temp_sensor_enable;
+      uint8_t l_spare_i2c_temp_sensor_enable;
 
 //********************************************
 // Centaur internal temperature polling setup 
@@ -257,6 +259,8 @@ fapi::ReturnCode mss_thermal_init(const fapi::Target & i_target)
 	  if (l_rc) return l_rc;
 	  l_rc = FAPI_ATTR_GET(ATTR_MRW_CDIMM_MASTER_I2C_TEMP_SENSOR_ENABLE, NULL, l_master_i2c_temp_sensor_enable);
 	  if (l_rc) return l_rc;
+	  l_rc = FAPI_ATTR_GET(ATTR_MRW_CDIMM_SPARE_I2C_TEMP_SENSOR_ENABLE, NULL, l_spare_i2c_temp_sensor_enable);
+	  if (l_rc) return l_rc;
       }
 
       // Configure Centaur Thermal Cache
@@ -420,13 +424,22 @@ fapi::ReturnCode mss_thermal_init(const fapi::Target & i_target)
 		  }
 		  if ((l_cdimm_sensor_map & l_sensor_map_mask) != 0)
 		  {
-		      // Only enable the sensor for custom dimms based on the attribute
-		      // Put in for i2c multimaster issue SW243504
-		      if ( (k==0)
+		      // Only enable the sensor for custom dimms based on the attributes
+		      if (
+			  (
+			   (k==0)
 			   &&
 			   (l_master_i2c_temp_sensor_enable ==
 			    ENUM_ATTR_MRW_CDIMM_MASTER_I2C_TEMP_SENSOR_ENABLE_OFF)
 			   )
+			  ||
+			  (
+			   (k==1)
+			   &&
+			   (l_spare_i2c_temp_sensor_enable ==
+			    ENUM_ATTR_MRW_CDIMM_SPARE_I2C_TEMP_SENSOR_ENABLE_OFF)
+			   )
+			  )
 		      {
 			  // do nothing here - do not enable the sensor
 		      }