diff options
author | Doug Gilbert <dgilbert@us.ibm.com> | 2014-07-08 12:17:38 -0500 |
---|---|---|
committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2014-07-10 10:22:23 -0500 |
commit | 6b19a9323b19446eca73516a9437488b998cdf20 (patch) | |
tree | cb5d4bf3d4c1653cbfc6c186a6e386ae20f7c489 /src/usr/hwpf/hwp/dram_initialization | |
parent | f3d0860811a2ac58b12291f93b65786cd0914a07 (diff) | |
download | talos-hostboot-6b19a9323b19446eca73516a9437488b998cdf20.tar.gz talos-hostboot-6b19a9323b19446eca73516a9437488b998cdf20.zip |
Take drawer offsets into account when checking for mirrored memory
Change-Id: Ieabd6b91b774d9b0398981a4a9b5ced19b2f408e
CQ: SW268402
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/12029
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr/hwpf/hwp/dram_initialization')
-rw-r--r-- | src/usr/hwpf/hwp/dram_initialization/dram_initialization.C | 22 |
1 files changed, 20 insertions, 2 deletions
diff --git a/src/usr/hwpf/hwp/dram_initialization/dram_initialization.C b/src/usr/hwpf/hwp/dram_initialization/dram_initialization.C index 905df419a..b8ee8dd8d 100644 --- a/src/usr/hwpf/hwp/dram_initialization/dram_initialization.C +++ b/src/usr/hwpf/hwp/dram_initialization/dram_initialization.C @@ -5,7 +5,9 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* COPYRIGHT International Business Machines Corp. 2012,2014 */ +/* Contributors Listed Below - COPYRIGHT 2012,2014 */ +/* [+] International Business Machines Corp. */ +/* */ /* */ /* Licensed under the Apache License, Version 2.0 (the "License"); */ /* you may not use this file except in compliance with the License. */ @@ -43,6 +45,7 @@ #include <initservice/isteps_trace.H> #include <hwpisteperror.H> #include <errl/errludtarget.H> +#include <intr/interrupt.H> // for PIR_t structure // targeting support #include <targeting/common/commontargeting.H> @@ -771,7 +774,22 @@ void* call_proc_exit_cache_contained( void *io_pArgs ) ATTR_MIRROR_BASE_ADDRESS_type l_mirrorBaseAddr = 0; if(!is_sapphire_load()) { - l_mirrorBaseAddr = l_sys->getAttr<TARGETING::ATTR_MIRROR_BASE_ADDRESS>(); + uint64_t hrmor_base = + l_sys->getAttr<TARGETING::ATTR_HB_HRMOR_NODAL_BASE>(); + + l_mirrorBaseAddr = + l_sys->getAttr<TARGETING::ATTR_MIRROR_BASE_ADDRESS>(); + + // For single-node systems, the non-master processors can be + // in a different logical (powerbus) node. + // Need to migrate task to master. + task_affinity_pin(); + task_affinity_migrate_to_master(); + uint64_t this_node = INTR::PIR_t(task_getcpuid()).nodeId; + task_affinity_unpin(); + + l_mirrorBaseAddr += (this_node * hrmor_base)/2; + } // Verify there is memory at the mirrored location |