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authorElliott Dahle <dedahle@us.ibm.com>2013-11-13 10:35:18 -0600
committerA. Patrick Williams III <iawillia@us.ibm.com>2013-12-14 17:42:08 -0600
commit178ea26dbd10dd1989b2311a209b00e2642af10a (patch)
tree666892b2b904c487faa477064eccb05e95a6e64b /src/usr/hwpf/hwp/dram_initialization
parent915c24391f2d71ff7eca4b19ca9680b9496c44f3 (diff)
downloadtalos-hostboot-178ea26dbd10dd1989b2311a209b00e2642af10a.tar.gz
talos-hostboot-178ea26dbd10dd1989b2311a209b00e2642af10a.zip
Integrate IPL Flow Reconfig Loop Memory HWPs
Change-Id: I024737b0685164d3e79ee847d53ba1b46721ce5a RTC:89843 CMVC-Coreq:906058 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/7452 Tested-by: Jenkins Server Reviewed-by: Brian H. Horton <brianh@linux.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/hwpf/hwp/dram_initialization')
-rw-r--r--src/usr/hwpf/hwp/dram_initialization/dram_initialization.C280
-rw-r--r--src/usr/hwpf/hwp/dram_initialization/dram_initialization.H92
-rw-r--r--src/usr/hwpf/hwp/dram_initialization/makefile8
-rw-r--r--src/usr/hwpf/hwp/dram_initialization/mss_power_cleanup/mss_power_cleanup.C393
-rw-r--r--src/usr/hwpf/hwp/dram_initialization/mss_power_cleanup/mss_power_cleanup.H91
5 files changed, 698 insertions, 166 deletions
diff --git a/src/usr/hwpf/hwp/dram_initialization/dram_initialization.C b/src/usr/hwpf/hwp/dram_initialization/dram_initialization.C
index 824e63265..4e669d1a1 100644
--- a/src/usr/hwpf/hwp/dram_initialization/dram_initialization.C
+++ b/src/usr/hwpf/hwp/dram_initialization/dram_initialization.C
@@ -70,6 +70,7 @@
#include "proc_setup_bars/proc_setup_bars.H"
#include "proc_pcie_config/proc_pcie_config.H"
#include "proc_exit_cache_contained/proc_exit_cache_contained.H"
+#include "mss_power_cleanup/mss_power_cleanup.H"
//remove these once memory setup workaround is removed
#include <devicefw/driverif.H>
#include <vpd/spdenums.H>
@@ -237,56 +238,6 @@ void* call_mss_memdiag( void *io_pArgs )
return l_stepError.getErrorHandle();
}
-
-//
-// Wrapper function to call mss_scrub
-//
-void* call_mss_scrub( void *io_pArgs )
-{
- errlHndl_t l_errl = NULL;
-
- TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "call_mss_scrub entry" );
-
-#if 0
- // @@@@@ CUSTOM BLOCK: @@@@@
- // figure out what targets we need
- // customize any other inputs
- // set up loops to go through all targets (if parallel, spin off a task)
-
- // write HUID of target
- TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
- "target HUID %.8X", TARGETING::get_huid(l));
-
- // cast OUR type of target to a FAPI type of target.
- const fapi::Target l_fapi_@targetN_target( TARGET_TYPE_MEMBUF_CHIP,
- (const_cast<TARGETING::Target*>(l_@targetN_target)) );
-
- // call the HWP with each fapi::Target
- FAPI_INVOKE_HWP( l_errl, mss_scrub, _args_...);
- if ( l_errl )
- {
- TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
- "ERROR : .........." );
- errlCommit( l_errl, HWPF_COMP_ID );
- }
- else
- {
- TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "SUCCESS : .........." );
- }
- // @@@@@ END CUSTOM BLOCK: @@@@@
-#endif
-
- TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "call_mss_scrub exit" );
-
- // end task, returning any errorlogs to IStepDisp
- return l_errl;
-}
-
-
-
//
// Wrapper function to call mss_thermal_init
//
@@ -360,6 +311,169 @@ void* call_mss_thermal_init( void *io_pArgs )
}
+//
+// Wrapper function to call proc_pcie_config
+//
+void* call_proc_pcie_config( void *io_pArgs )
+{
+ errlHndl_t l_errl = NULL;
+
+ IStepError l_stepError;
+
+ TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "call_proc_pcie_config entry" );
+
+ TARGETING::TargetHandleList l_procTargetList;
+ getAllChips(l_procTargetList, TYPE_PROC );
+
+ for ( TargetHandleList::const_iterator
+ l_iter = l_procTargetList.begin();
+ l_iter != l_procTargetList.end();
+ ++l_iter )
+ {
+ const TARGETING::Target* l_pTarget = *l_iter;
+
+ // write HUID of target
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "target HUID %.8X", TARGETING::get_huid(l_pTarget));
+
+ // build a FAPI type of target.
+ const fapi::Target l_fapi_pTarget( TARGET_TYPE_PROC_CHIP,
+ (const_cast<TARGETING::Target*>(l_pTarget)) );
+
+ // call the HWP with each fapi::Target
+ FAPI_INVOKE_HWP( l_errl, proc_pcie_config, l_fapi_pTarget );
+
+ if ( l_errl )
+ {
+ // capture the target data in the elog
+ ErrlUserDetailsTarget(l_pTarget).addToLog( l_errl );
+
+ // Create IStep error log and cross reference to error that occurred
+ l_stepError.addErrorDetails( l_errl );
+
+ // Commit Error
+ errlCommit( l_errl, HWPF_COMP_ID );
+
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR : proc_pcie_config" );
+
+ break;
+ }
+ else
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "SUCCESS : proc_pcie_config" );
+ }
+ }
+
+ TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "call_proc_pcie_config exit" );
+
+ // end task, returning any errorlogs to IStepDisp
+ return l_stepError.getErrorHandle();
+}
+
+
+//
+// Wrapper function to call mss_power_cleanup
+//
+void* call_mss_power_cleanup( void *io_pArgs )
+{
+ errlHndl_t l_err = NULL;
+ IStepError l_stepError;
+
+ TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "call_mss_power_cleanup entry" );
+
+ // Get a list of all present Centaurs
+ TargetHandleList l_presCentaurs;
+ getChipResources(l_presCentaurs, TYPE_MEMBUF, UTIL_FILTER_PRESENT);
+ // Associated MBA targets
+ TARGETING::TargetHandleList l_mbaList;
+
+ // Define predicate for associated MBAs
+ PredicateCTM predMba(CLASS_UNIT, TYPE_MBA);
+ PredicatePostfixExpr presMba;
+ PredicateHwas predPres;
+ predPres.present(true);
+ presMba.push(&predMba).push(&predPres).And();
+
+ for (TargetHandleList::const_iterator
+ l_cenIter = l_presCentaurs.begin();
+ l_cenIter != l_presCentaurs.end();
+ ++l_cenIter)
+ {
+ // Make a local copy of the target for ease of use
+ TARGETING::Target * l_pCentaur = *l_cenIter;
+ // Retrieve HUID of current Centaur
+ TARGETING::ATTR_HUID_type l_currCentaurHuid =
+ TARGETING::get_huid(l_pCentaur);
+
+ // Dump current run on target
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "Running mss_power_cleanup HWP on "
+ "target HUID %.8X", l_currCentaurHuid);
+
+ // find all present MBAs associated with this Centaur
+ TARGETING::TargetHandleList l_presMbas;
+ targetService().getAssociated(l_presMbas,
+ l_pCentaur,
+ TargetService::CHILD,
+ TargetService::IMMEDIATE,
+ &presMba);
+
+ // If not at least two MBAs found
+ if (l_presMbas.size() < 2)
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "Not enough MBAs found for Centaur target HUID %.8X, "
+ "skipping this Centaur.",
+ l_currCentaurHuid);
+ continue;
+ }
+
+ // Create FAPI Targets.
+ const fapi::Target l_fapiCentaurTarget(TARGET_TYPE_MEMBUF_CHIP,
+ (const_cast<TARGETING::Target*>(l_pCentaur)));
+ const fapi::Target l_fapiMba0Target(TARGET_TYPE_MBA_CHIPLET,
+ (const_cast<TARGETING::Target*>(l_presMbas[0])));
+ const fapi::Target l_fapiMba1Target(TARGET_TYPE_MBA_CHIPLET,
+ (const_cast<TARGETING::Target*>(l_presMbas[1])));
+ // call the HWP with each fapi::Target
+ FAPI_INVOKE_HWP(l_err, mss_power_cleanup, l_fapiCentaurTarget,
+ l_fapiMba0Target, l_fapiMba1Target);
+
+ if (l_err)
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR 0x%.8X: mss_power_cleanup HWP returns error",
+ l_err->reasonCode());
+ // capture the target data in the elog
+ ErrlUserDetailsTarget(l_pCentaur).addToLog(l_err);
+ // Create IStep error log and cross reference error that occurred
+ l_stepError.addErrorDetails(l_err);
+ // Commit Error
+ errlCommit(l_err, HWPF_COMP_ID);
+ }
+ else
+ {
+ // Success
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "Successfully ran mss_power_cleanup HWP on "
+ "CENTAUR target HUID %.8X "
+ "and associated MBAs",
+ l_currCentaurHuid);
+ }
+ }
+
+ TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "call_mss_power_cleanup exit" );
+
+ // end task, returning any errorlogs to IStepDisp
+ return l_stepError.getErrorHandle();
+}
+
//
// Wrapper function to call proc_setup_bars
@@ -532,72 +646,6 @@ void* call_proc_setup_bars( void *io_pArgs )
}
-
-//
-// Wrapper function to call proc_pcie_config
-//
-void* call_proc_pcie_config( void *io_pArgs )
-{
- errlHndl_t l_errl = NULL;
-
- IStepError l_stepError;
-
- TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "call_proc_pcie_config entry" );
-
- TARGETING::TargetHandleList l_procTargetList;
- getAllChips(l_procTargetList, TYPE_PROC );
-
- for ( TargetHandleList::const_iterator
- l_iter = l_procTargetList.begin();
- l_iter != l_procTargetList.end();
- ++l_iter )
- {
- const TARGETING::Target* l_pTarget = *l_iter;
-
- // write HUID of target
- TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
- "target HUID %.8X", TARGETING::get_huid(l_pTarget));
-
- // build a FAPI type of target.
- const fapi::Target l_fapi_pTarget( TARGET_TYPE_PROC_CHIP,
- (const_cast<TARGETING::Target*>(l_pTarget)) );
-
- // call the HWP with each fapi::Target
- FAPI_INVOKE_HWP( l_errl, proc_pcie_config, l_fapi_pTarget );
-
- if ( l_errl )
- {
- // capture the target data in the elog
- ErrlUserDetailsTarget(l_pTarget).addToLog( l_errl );
-
- // Create IStep error log and cross reference to error that occurred
- l_stepError.addErrorDetails( l_errl );
-
- // Commit Error
- errlCommit( l_errl, HWPF_COMP_ID );
-
- TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
- "ERROR : proc_pcie_config" );
-
- break;
- }
- else
- {
- TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "SUCCESS : proc_pcie_config" );
- }
- }
-
- TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "call_proc_pcie_config exit" );
-
- // end task, returning any errorlogs to IStepDisp
- return l_stepError.getErrorHandle();
-}
-
-
-
//
// Wrapper function to call proc_exit_cache_contained
//
diff --git a/src/usr/hwpf/hwp/dram_initialization/dram_initialization.H b/src/usr/hwpf/hwp/dram_initialization/dram_initialization.H
index 935b3824d..87f752e97 100644
--- a/src/usr/hwpf/hwp/dram_initialization/dram_initialization.H
+++ b/src/usr/hwpf/hwp/dram_initialization/dram_initialization.H
@@ -1,26 +1,25 @@
-/* IBM_PROLOG_BEGIN_TAG
- * This is an automatically generated prolog.
- *
- * $Source: src/usr/hwpf/hwp/dram_initialization/dram_initialization.H $
- *
- * IBM CONFIDENTIAL
- *
- * COPYRIGHT International Business Machines Corp. 2012
- *
- * p1
- *
- * Object Code Only (OCO) source materials
- * Licensed Internal Code Source Materials
- * IBM HostBoot Licensed Internal Code
- *
- * The source code for this program is not published or other-
- * wise divested of its trade secrets, irrespective of what has
- * been deposited with the U.S. Copyright Office.
- *
- * Origin: 30
- *
- * IBM_PROLOG_END_TAG
- */
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/hwpf/hwp/dram_initialization/dram_initialization.H $ */
+/* */
+/* IBM CONFIDENTIAL */
+/* */
+/* COPYRIGHT International Business Machines Corp. 2012,2013 */
+/* */
+/* p1 */
+/* */
+/* Object Code Only (OCO) source materials */
+/* Licensed Internal Code Source Materials */
+/* IBM HostBoot Licensed Internal Code */
+/* */
+/* The source code for this program is not published or otherwise */
+/* divested of its trade secrets, irrespective of what has been */
+/* deposited with the U.S. Copyright Office. */
+/* */
+/* Origin: 30 */
+/* */
+/* IBM_PROLOG_END_TAG */
#ifndef __DRAM_INITIALIZATION_DRAM_INITIALIZATION_H
#define __DRAM_INITIALIZATION_DRAM_INITIALIZATION_H
@@ -68,26 +67,26 @@
* @}
* @{
* @substepnum 4
- * @substepname mss_scrub
- * @substepdesc : Start background scrub
+ * @substepname mss_thermal_init
+ * @substepdesc : Initialize the thermal sensor
* @target_sched serial
* @}
* @{
* @substepnum 5
- * @substepname mss_thermal_init
- * @substepdesc : Initialize the thermal sensor
+ * @substepname proc_pcie_config
+ * @substepdesc : Configure the PHBs
* @target_sched serial
* @}
* @{
* @substepnum 6
- * @substepname proc_setup_bars
- * @substepdesc : Setup Memory BARs
+ * @substepname mss_power_cleanup
+ * @substepdesc : Clean up any MCS/Centuars
* @target_sched serial
* @}
* @{
* @substepnum 7
- * @substepname proc_pcie_config
- * @substepdesc : Configure the PHBs
+ * @substepname proc_setup_bars
+ * @substepdesc : Setup Memory BARs
* @target_sched serial
* @}
* @{
@@ -146,60 +145,55 @@ void* call_mss_extent_setup( void *io_pArgs );
*/
void* call_mss_memdiag( void *io_pArgs );
+
/**
- * @brief mss_scrub
+ * @brief mss_thermal_init
*
- * Start background scrub
+ * Initialize the thermal sensor
*
* param[in,out] - pointer to any arguments, usually NULL
*
* return pointer to any errlogs
*
*/
-void* call_mss_scrub( void *io_pArgs );
-
-
+void* call_mss_thermal_init( void *io_pArgs );
/**
- * @brief mss_thermal_init
+ * @brief proc_pcie_config
*
- * Initialize the thermal sensor
+ * Configure the PHBs
*
* param[in,out] - pointer to any arguments, usually NULL
*
* return pointer to any errlogs
*
*/
-void* call_mss_thermal_init( void *io_pArgs );
-
-
+void* call_proc_pcie_config( void *io_pArgs );
/**
- * @brief proc_setup_bars
+ * @brief mss_power_cleanup
*
- * Setup Memory BARs
+ * Clean up any MCS/Centaurs
*
* param[in,out] - pointer to any arguments, usually NULL
*
* return pointer to any errlogs
*
*/
-void* call_proc_setup_bars( void *io_pArgs );
-
+void* call_mss_power_cleanup( void *io_pArgs );
/**
- * @brief proc_pcie_config
+ * @brief proc_setup_bars
*
- * Configure the PHBs
+ * Setup Memory BARs
*
* param[in,out] - pointer to any arguments, usually NULL
*
* return pointer to any errlogs
*
*/
-void* call_proc_pcie_config( void *io_pArgs );
-
+void* call_proc_setup_bars( void *io_pArgs );
/**
diff --git a/src/usr/hwpf/hwp/dram_initialization/makefile b/src/usr/hwpf/hwp/dram_initialization/makefile
index 6f0e9461d..e796a8c23 100644
--- a/src/usr/hwpf/hwp/dram_initialization/makefile
+++ b/src/usr/hwpf/hwp/dram_initialization/makefile
@@ -34,6 +34,8 @@ EXTRAINCDIR += ${ROOTPATH}/src/include/usr/hwpf/hwp
EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/include
EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/bus_training
+EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/dram_training/cen_stopclocks
+
## NOTE: add the base istep dir here.
EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/dram_initialization
@@ -50,6 +52,8 @@ EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/dram_initialization/host_mpipl_servi
EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/dram_initialization/mss_thermal_init
EXTRAINCDIR += ${ROOTPATH}/src/include/usr/hwpf/hwp/dram_initialization/mss_memdiag
EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/mc_config/mss_eff_config/
+EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/dram_initialization/mss_power_cleanup
+
## NOTE: add new object files when you add a new HWP
OBJS = dram_initialization.o \
@@ -61,7 +65,8 @@ OBJS = dram_initialization.o \
proc_pcie_config.o \
proc_mpipl_ex_cleanup.o \
proc_mpipl_chip_cleanup.o \
- mss_thermal_init.o
+ mss_thermal_init.o \
+ mss_power_cleanup.o
## NOTE: add a new directory onto the vpaths when you add a new HWP
@@ -74,6 +79,7 @@ VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/dram_initialization/mss_memdiag
VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/dram_initialization/proc_pcie_config
VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/dram_initialization/host_mpipl_service
VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/dram_initialization/mss_thermal_init
+VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/dram_initialization/mss_power_cleanup
include ${ROOTPATH}/config.mk
diff --git a/src/usr/hwpf/hwp/dram_initialization/mss_power_cleanup/mss_power_cleanup.C b/src/usr/hwpf/hwp/dram_initialization/mss_power_cleanup/mss_power_cleanup.C
new file mode 100644
index 000000000..c1fdfe800
--- /dev/null
+++ b/src/usr/hwpf/hwp/dram_initialization/mss_power_cleanup/mss_power_cleanup.C
@@ -0,0 +1,393 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/hwpf/hwp/dram_initialization/mss_power_cleanup/mss_power_cleanup.C $ */
+/* */
+/* IBM CONFIDENTIAL */
+/* */
+/* COPYRIGHT International Business Machines Corp. 2013 */
+/* */
+/* p1 */
+/* */
+/* Object Code Only (OCO) source materials */
+/* Licensed Internal Code Source Materials */
+/* IBM HostBoot Licensed Internal Code */
+/* */
+/* The source code for this program is not published or otherwise */
+/* divested of its trade secrets, irrespective of what has been */
+/* deposited with the U.S. Copyright Office. */
+/* */
+/* Origin: 30 */
+/* */
+/* IBM_PROLOG_END_TAG */
+// $Id: mss_power_cleanup.C,v 1.4 2013/11/22 04:53:06 bellows Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/centaur/working/procedures/ipl/fapi/mss_power_cleanup.C,v $
+//------------------------------------------------------------------------------
+// *! (C) Copyright International Business Machines Corp. 2012
+// *! All Rights Reserved -- Property of IBM
+// *! *** IBM Confidential ***
+//------------------------------------------------------------------------------
+// *! TITLE : mss_power_cleanup
+// *! DESCRIPTION : see additional comments below
+// *! OWNER NAME : Mark Bellows Email: bellows@us.ibm.com
+// *! BACKUP NAME : Anuwat Saetow Email: asaetow@us.ibm.com
+
+// *! ADDITIONAL COMMENTS :
+//
+// power clean up
+// needs to deconfig centaurs and mba - (needs three targets)
+// Two reasons: centaur is bad and no DIMMs
+// Needed to set up fences and turn off power / clock drivers
+//
+// There is a sub function that cleans up an mba that needs to be called if we deconfigure an mba
+// this procedure does not write attributes just shuts down hardware
+//
+//------------------------------------------------------------------------------
+// Don't forget to create CVS comments when you check in your changes!
+//------------------------------------------------------------------------------
+// CHANGE HISTORY:
+//------------------------------------------------------------------------------
+// Version:| Author: | Date: | Comment:
+//---------|----------|---------|-----------------------------------------------
+// 1.4 |bellows |21-Nov-13| Gerrit Review Updates - unused variable removed
+// 1.3 |bellows |11-Nov-13| Gerrit Review Updates
+// 1.2 |bellows |11-Nov-13| Update due to new istep location
+// 1.1 |bellows |07-Nov-13| copied from mss_cnfg_cleanup version 1.3
+//------------------------------------------------------------------------------
+
+
+//------------------------------------------------------------------------------
+// My Includes
+//------------------------------------------------------------------------------
+#include "cen_stopclocks.H"
+#include "mss_power_cleanup.H"
+#include "cen_scom_addresses.H"
+#include "mss_eff_config.H"
+#include "common_scom_addresses.H"
+
+//------------------------------------------------------------------------------
+// Includes
+//------------------------------------------------------------------------------
+#include <fapi.H>
+
+//------------------------------------------------------------------------------
+// Constants
+//------------------------------------------------------------------------------
+
+const uint8_t PORT_SIZE = 2;
+const uint8_t DIMM_SIZE = 2;
+
+
+//------------------------------------------------------------------------------
+// extern encapsulation
+//------------------------------------------------------------------------------
+extern "C"
+{
+ fapi::ReturnCode mss_power_cleanup_centaur(const fapi::Target & i_target_centaur);
+ fapi::ReturnCode mss_power_cleanup_mba_part1(const fapi::Target & i_target_centaur, const fapi::Target & i_target_mba);
+ fapi::ReturnCode mss_power_cleanup_mba_fence(const fapi::Target & i_target_centaur, const fapi::Target & i_target_mba0, const fapi::Target & i_target_mba1 );
+
+ fapi::ReturnCode mss_power_cleanup_mba(const fapi::Target & i_target_mba); // clean up an mba
+
+//------------------------------------------------------------------------------
+// @brief mss_power_cleanup(): This function will disable a centaur - fencing it and powering it down
+//
+// @param const fapi::Target i_target_centaur: the fapi target of the centaur
+// @param const fapi::Target i_target_mba0: the mba0 target
+// @param const fapi::Target i_target_mba1: the mba1 target
+//
+// @return fapi::ReturnCode
+//------------------------------------------------------------------------------
+ fapi::ReturnCode mss_power_cleanup(const fapi::Target & i_target_centaur, const fapi::Target & i_target_mba0, const fapi::Target & i_target_mba1)
+ {
+ fapi::ReturnCode rc;
+
+ FAPI_INF("Running mss_power_cleanupon %s\n", i_target_centaur.toEcmdString());
+
+ do {
+ rc = mss_power_cleanup_mba_part1(i_target_centaur, i_target_mba0);
+ if(rc) break;
+ rc = mss_power_cleanup_mba_part1(i_target_centaur, i_target_mba1);
+ if(rc) break;
+
+ rc = mss_power_cleanup_mba_fence(i_target_centaur, i_target_mba0, i_target_mba1);
+ if(rc) break;
+
+ rc = mss_power_cleanup_centaur(i_target_centaur);
+ if(rc) break;
+
+
+ /* need to add code that fences and centaur and powers off clocks */
+ } while(0);
+
+ return rc;
+ } // end mss_power_cleanup()
+
+ fapi::ReturnCode set_powerdown_bits(int mba_functional, ecmdDataBufferBase &data_buffer_64) {
+ fapi::ReturnCode rc;
+ uint32_t rc_num = 0;
+
+ if(mba_functional == 0) {
+ FAPI_INF("set_powerdown_bits MBA not Functional");
+ rc_num |= data_buffer_64.setBit(0 +48); // MASTER_PD_CNTL (48)
+ rc_num |= data_buffer_64.setBit(1 +48); // ANALOG_INPUT_STAB2 (49)
+ rc_num |= data_buffer_64.setBit(7 +48); // ANALOG_INPUT_STAB1 (55)
+ rc_num |= data_buffer_64.setBit(8 +48,2); // SYSCLK_CLK_GATE (56:57)
+ rc_num |= data_buffer_64.setBit(10 +48); // DP18_RX_PD(0) (58)
+ rc_num |= data_buffer_64.setBit(11 +48); // DP18_RX_PD(1) (59)
+ rc_num |= data_buffer_64.setBit(14 +48); // TX_TRISTATE_CNTL (62)
+ rc_num |= data_buffer_64.setBit(15 +48); // VCC_REG_PD (63)
+ }
+ else {
+ rc_num |= data_buffer_64.clearBit(0 +48); // MASTER_PD_CNTL (48)
+ rc_num |= data_buffer_64.clearBit(1 +48); // ANALOG_INPUT_STAB2 (49)
+ rc_num |= data_buffer_64.clearBit(7 +48); // ANALOG_INPUT_STAB1 (55)
+ rc_num |= data_buffer_64.clearBit(8 +48,2); // SYSCLK_CLK_GATE (56:57)
+ rc_num |= data_buffer_64.clearBit(10 +48); // DP18_RX_PD(0) (58)
+ rc_num |= data_buffer_64.clearBit(11 +48); // DP18_RX_PD(1) (59)
+ rc_num |= data_buffer_64.clearBit(14 +48); // TX_TRISTATE_CNTL (62)
+ rc_num |= data_buffer_64.clearBit(15 +48); // VCC_REG_PD (63)
+ }
+
+ if (rc_num) {
+ FAPI_ERR( "Error setting up buffers");
+ rc.setEcmdError(rc_num);
+ }
+
+ return rc;
+ }
+
+ fapi::ReturnCode mss_power_cleanup_mba_part1(const fapi::Target & i_target_centaur, const fapi::Target & i_target_mba) {
+ // turn off functional vector
+ fapi::ReturnCode rc;
+ uint8_t mba_functional;
+ ecmdDataBufferBase data_buffer_64(64);
+ uint32_t rc_num = 0;
+ uint8_t unit_pos = 0;
+ ecmdDataBufferBase cfam_data(32);
+ int memon=0;
+
+ do
+ {
+ FAPI_INF("Starting mss_power_cleanup_mba_part1");
+ rc = FAPI_ATTR_GET(ATTR_FUNCTIONAL, &i_target_mba, mba_functional);
+ if(rc) { FAPI_ERR("ERROR: Cannot get ATTR_FUNCTIONAL"); break; }
+ FAPI_INF("working on an mba whose functional is %d", mba_functional);
+
+// But to clarify so there's no misconception, you can only turn off the clocks to the MEMS grid (Ports 2/3). If you want to deconfigure Ports 0/1, there is no way to turn those clocks off. The best you can do there is shut down the PHY inside DDR (I think they have an ultra low power mode where you can turn off virtually everything including their PLLs, phase rotators, analogs , FIFOs, etc) plus of course you can disable their I/O. I think those steps should be done no matter which port you're deconfiguring, but in terms of the chip clock grid, you only get that additional power savings in the bad Port 2/3 case.
+ if(mba_functional == 0) {
+ FAPI_INF("cleanup_part1 MBA not functional");
+ // check that clocks are up to the DDR partition before turning it off
+ // this case will only happen if we get memory up and later come back and want to
+ // deconfigure it. The first time, it may not even be up yet.
+ rc = fapiGetScom(i_target_centaur, TP_CLK_STATUS_0x01030008, data_buffer_64);
+ if(rc) { FAPI_ERR("ERROR: Cannot getScom 0x1030008"); break; }
+ if(data_buffer_64.getDoubleWord(0) == 0x000007FFFFFFFFFFull) { // pervasive clocks are on
+ rc = fapiGetScom(i_target_centaur, MEM_CLK_STATUS_0x03030008, data_buffer_64);
+ if(rc) { FAPI_ERR("ERROR: Cannot getScom 0x3030008"); break; }
+ if(data_buffer_64.getDoubleWord(0) == 0x0000001FFFFFFFFFull) {
+ memon=1;
+ }
+ }
+
+
+ if(memon) {
+ FAPI_INF("Mem Clocks On");
+
+ if(mba_functional == 0) {
+
+ FAPI_INF("This mba is not functional, doing more transactions");
+
+ // Do Port 0
+ rc = fapiGetScom(i_target_mba, DPHY01_DDRPHY_PC_POWERDOWN_1_P0_0x8000C0100301143F, data_buffer_64);
+ if(rc) { FAPI_ERR("ERROR: Cannot getScom DPHY01_DDRPHY_PC_POWERDOWN_1_P0_0x8000C0100301143F"); break; }
+
+ rc = set_powerdown_bits(mba_functional, data_buffer_64);
+ if(rc) break;
+
+ rc = fapiPutScom(i_target_mba, DPHY01_DDRPHY_PC_POWERDOWN_1_P0_0x8000C0100301143F, data_buffer_64);
+ if(rc) { FAPI_ERR("ERROR: Cannot putScom DPHY01_DDRPHY_PC_POWERDOWN_1_P0_0x8000C0100301143F"); break; }
+
+ // Do Port 1
+ rc = fapiGetScom(i_target_mba, DPHY01_DDRPHY_PC_POWERDOWN_1_P1_0x8001C0100301143F, data_buffer_64);
+ if(rc) { FAPI_ERR("ERROR: Cannot getScom DPHY01_DDRPHY_PC_POWERDOWN_1_P1_0x8001C0100301143F"); break; }
+
+ rc = set_powerdown_bits(mba_functional, data_buffer_64);
+ if(rc) break;
+
+ rc = fapiPutScom(i_target_mba, DPHY01_DDRPHY_PC_POWERDOWN_1_P1_0x8001C0100301143F, data_buffer_64);
+ if(rc) { FAPI_ERR("ERROR: Cannot putScom DPHY01_DDRPHY_PC_POWERDOWN_1_P1_0x8001C0100301143F"); break; }
+// From Section 10.4
+ } // mba functional
+ }
+//12. Grid Clock off , South Port Pair. This is done by asserting the GP bit controlling
+//TP_CHIP_DPHY23_GRID_DISABLE (Table 57 ). This must be decided during CFAMINIT . it may not be
+//dynamically updated
+ rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &i_target_mba, unit_pos); // 0 = MBA01 and 1 = MBA23
+ if(rc) { FAPI_ERR("ERROR: Cannot get ATTR_CHIP_UNIT_POS"); break; }
+
+ if(unit_pos == 1) {
+ rc = fapiGetCfamRegister( i_target_centaur, CFAM_FSI_GP4_0x00001013, cfam_data);
+ if(rc) { FAPI_ERR("ERROR: Cannot getCfamRegister CFAM_FSI_GP4_0x00001013"); break; }
+
+ if(mba_functional == 0) {
+ rc_num |= cfam_data.setBit(1);
+ }
+ else {
+ rc_num |= cfam_data.clearBit(1);
+ }
+
+ if (rc_num) {
+ FAPI_ERR( "Error setting up buffers");
+ rc.setEcmdError(rc_num);
+ break;
+ }
+
+ rc = fapiPutCfamRegister( i_target_centaur, CFAM_FSI_GP4_0x00001013, cfam_data);
+ if(rc) { FAPI_ERR("ERROR: Cannot putCfamRegister CFAM_FSI_GP4_0x00001013"); break; }
+ } // mba 1 only code
+
+ }
+ }
+ while(0);
+
+ if(rc) { FAPI_ERR("ERROR: Bad RC in mss_power_cleanup_mba_part1"); }
+ return rc;
+ } // end of mss_power_cleanup_mba_part1
+
+ fapi::ReturnCode mss_power_cleanup_mba_fence(const fapi::Target & i_target_centaur, const fapi::Target & i_target_mba0, const fapi::Target & i_target_mba1) {
+ // turn off functional vector
+ fapi::ReturnCode rc;
+ uint8_t mba_functional0, mba_functional1;
+ ecmdDataBufferBase data_buffer_64(64);
+ uint32_t rc_num = 0;
+ ecmdDataBufferBase cfam_data(32);
+ int memon=0;
+
+ do
+ {
+ FAPI_INF("Starting mss_power_cleanup_mba_fence");
+ rc = FAPI_ATTR_GET(ATTR_FUNCTIONAL, &i_target_mba0, mba_functional0);
+ if(rc) break;
+ rc = FAPI_ATTR_GET(ATTR_FUNCTIONAL, &i_target_mba1, mba_functional1);
+ if(rc) break;
+ FAPI_INF("mba0 functional is %d", mba_functional0);
+ FAPI_INF("mba1 functional is %d", mba_functional1);
+
+
+//enable_partial_good_dc memn_fence_dc mems_fence_dc Fencing Behavior
+//0 0 0 Normal operation, no fencing enabled
+//0 1 1 Chiplet boundary (inter chiplet nets) fencing enabled. Both
+// bits set for full fencing. Both MBAs fenced from MBS but
+// not from each other
+//0 0 1 Not a valid setting. Fencing enabled for MEMS chiplet boundary only.
+//0 1 0 Not a valid setting. Fencing enabled for MEMS chiplet boundary only.
+//1 0 0 No Fencing enabled .
+//1 0 1 MEMS (Ports 2/3) bad, fencing enabled to MEMN and at chiplet boundary of MEMS
+//1 1 0 MEMN (Ports 0/1) bad, fencing enabled to MEMS and at chiplet boundary of MEMN
+//1 1 1 Fencing enabled between MEMN and MEMS and at chiplet boundary.
+ rc = fapiGetScom(i_target_centaur, TP_CLK_STATUS_0x01030008, data_buffer_64);
+ if(rc) break;
+ if(data_buffer_64.getDoubleWord(0) == 0x000007FFFFFFFFFFull) { // pervasive clocks are on
+ rc = fapiGetScom(i_target_centaur, MEM_CLK_STATUS_0x03030008, data_buffer_64);
+ if(rc) break;
+ if(data_buffer_64.getDoubleWord(0) == 0x0000001FFFFFFFFFull) {
+ memon=1;
+ }
+ }
+
+ if(memon) {
+ FAPI_INF("Mem Clocks On");
+ rc = fapiGetScom( i_target_centaur, MEM_GP3_0x030F0012, data_buffer_64);
+ if (rc) break;
+
+ if(mba_functional0 == 0 || mba_functional1 == 0) { // one of the two are non-functional
+ rc_num |= data_buffer_64.setBit(31); // enable_partial_good_dc
+ }
+ else {
+ rc_num |= data_buffer_64.clearBit(31);
+ }
+
+ if(mba_functional0 == 0) {
+ rc_num |= data_buffer_64.setBit(18); // memn_fence_dc
+ }
+ else {
+ rc_num |= data_buffer_64.clearBit(18); // memn_fence_dc
+ }
+ if(mba_functional1 == 0) {
+ rc_num |= data_buffer_64.setBit(17); // mems_fence_dc
+ }
+ else {
+ rc_num |= data_buffer_64.clearBit(17); // mems_fence_dc
+ }
+
+ if (rc_num) {
+ FAPI_ERR( "Error setting up buffers");
+ rc.setEcmdError(rc_num);
+ break;
+ }
+
+ rc = fapiPutScom( i_target_centaur, MEM_GP3_0x030F0012, data_buffer_64);
+ if (rc) break;
+ }
+
+
+ } while(0);
+
+ if(rc) { FAPI_ERR("ERROR: during mss_power_cleanup_mba_fence"); }
+ return rc;
+ } // end of mss_power_cleanup_mba_fense
+
+ fapi::ReturnCode mss_power_cleanup_centaur(const fapi::Target & i_target_centaur) {
+ // turn off functional vector
+ fapi::ReturnCode rc;
+ uint8_t centaur_functional;
+
+ do
+ {
+ FAPI_INF("Starting mss_power_cleanup_centaur");
+ rc = FAPI_ATTR_GET(ATTR_FUNCTIONAL, &i_target_centaur, centaur_functional);
+ if(rc) { FAPI_ERR("ERROR: Cannot get ATTR_FUNCTIONAL"); break; }
+
+ int memon=0;
+ int pervon=0;
+ ecmdDataBufferBase data_buffer_64(64);
+
+ if(centaur_functional == 0) {
+ // check that clocks are up to the DDR partition before turning it off
+ // this case will only happen if we get memory up and later come back and want to
+ // deconfigure it. The first time, it may not even be up yet.
+ rc = fapiGetScom(i_target_centaur, TP_CLK_STATUS_0x01030008, data_buffer_64);
+ if(rc) { FAPI_ERR("ERROR: Cannot getScom 0x1030008"); break; }
+ if(data_buffer_64.getDoubleWord(0) == 0x000007FFFFFFFFFFull) { // pervasive clocks are on
+ pervon=1;
+ rc = fapiGetScom(i_target_centaur, MEM_CLK_STATUS_0x03030008, data_buffer_64);
+ if(rc) { FAPI_ERR("ERROR: Cannot getScom 0x3030008"); break; }
+ if(data_buffer_64.getDoubleWord(0) == 0x0000001FFFFFFFFFull) {
+ memon=1;
+ }
+ }
+
+
+ if(pervon || memon) {
+ bool l_stop_mem_clks=true;
+ bool l_stop_nest_clks=true;
+ bool l_stop_dram_rfrsh_clks=true;
+ bool l_stop_tp_clks=false;
+ bool l_stop_vitl_clks=false;
+ FAPI_INF("Calling cen_stopclocks");
+ rc = cen_stopclocks(i_target_centaur, l_stop_mem_clks, l_stop_nest_clks, l_stop_dram_rfrsh_clks, l_stop_tp_clks, l_stop_vitl_clks );
+
+ } // clocks are on, so kill them
+ } // non functional centaurs
+ FAPI_INF("Ending mss_power_cleanup_centaur");
+ }
+ while(0);
+
+ if(rc) { FAPI_ERR("ERROR: Bad RC in mss_power_cleanup_centaur"); }
+ return rc;
+ } // end of mss_power_cleanup_centaur
+
+
+} // extern "C"
+
diff --git a/src/usr/hwpf/hwp/dram_initialization/mss_power_cleanup/mss_power_cleanup.H b/src/usr/hwpf/hwp/dram_initialization/mss_power_cleanup/mss_power_cleanup.H
new file mode 100644
index 000000000..43c5bc492
--- /dev/null
+++ b/src/usr/hwpf/hwp/dram_initialization/mss_power_cleanup/mss_power_cleanup.H
@@ -0,0 +1,91 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/hwpf/hwp/dram_initialization/mss_power_cleanup/mss_power_cleanup.H $ */
+/* */
+/* IBM CONFIDENTIAL */
+/* */
+/* COPYRIGHT International Business Machines Corp. 2013 */
+/* */
+/* p1 */
+/* */
+/* Object Code Only (OCO) source materials */
+/* Licensed Internal Code Source Materials */
+/* IBM HostBoot Licensed Internal Code */
+/* */
+/* The source code for this program is not published or otherwise */
+/* divested of its trade secrets, irrespective of what has been */
+/* deposited with the U.S. Copyright Office. */
+/* */
+/* Origin: 30 */
+/* */
+/* IBM_PROLOG_END_TAG */
+// $Id: mss_power_cleanup.H,v 1.2 2013/11/14 16:55:43 bellows Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/centaur/working/procedures/ipl/fapi/mss_power_cleanup.H,v $
+//------------------------------------------------------------------------------
+// *! (C) Copyright International Business Machines Corp. 2012
+// *! All Rights Reserved -- Property of IBM
+// *! *** IBM Confidential ***
+//------------------------------------------------------------------------------
+// *! TITLE : mss_power_cleanup.H
+// *! DESCRIPTION : Header file for mss_eff_config.
+// *! OWNER NAME : Mark Bellows Email: bellows@us.ibm.com
+// *! BACKUP NAME : Anuwat Saetow Email: asaetow@us.ibm.com
+// *! ADDITIONAL COMMENTS :
+//
+//
+//
+//------------------------------------------------------------------------------
+// Don't forget to create CVS comments when you check in your changes!
+//------------------------------------------------------------------------------
+// CHANGE HISTORY:
+//------------------------------------------------------------------------------
+// Version:| Author: | Date: | Comment:
+//---------|----------|---------|-----------------------------------------------
+// 1.2 |bellows |11-Nov-13| Gerrit Review Comments
+// 1.1 |bellows |07-Nov-13| copied from mss_cnfg_cleanup.H version 1.2
+//------------------------------------------------------------------------------
+
+
+#ifndef mss_power_cleanup_H_
+#define mss_power_cleanup_H_
+
+//------------------------------------------------------------------------------
+// My Includes
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+// Includes
+//------------------------------------------------------------------------------
+#include <fapi.H>
+
+typedef fapi::ReturnCode (*mss_power_cleanup_FP_t)(const fapi::Target & i_target_centaur,
+ const fapi::Target & i_target_mba0, const fapi::Target & i_target_mba1);
+typedef fapi::ReturnCode (*mss_power_cleanup_mba_FP_t)( const fapi::Target & i_target_mba);
+
+extern "C" {
+
+//------------------------------------------------------------------------------
+// @brief mss_power_cleanup(): Clean up a centaur and also MBAs, also calls the mba cleanup under the covers
+//
+// @param const fapi::Target i_target_centaur: the centaur
+// @param const fapi::Target i_target_mba0: the mba0
+// @param const fapi::Target i_target_mba1: the mba1
+//
+// @return fapi::ReturnCode
+//------------------------------------------------------------------------------
+fapi::ReturnCode mss_power_cleanup(const fapi::Target & i_target_centaur,
+ const fapi::Target & i_target_mba0, const fapi::Target & i_target_mba1);
+//------------------------------------------------------------------------------
+// @brief mss_power_cleanup_mba(): Clean up a centaur and also MBAs
+//
+// @param const fapi::Target i_target_mba0: the mba0
+//
+// @return fapi::ReturnCode
+//------------------------------------------------------------------------------
+fapi::ReturnCode mss_power_cleanup_mba(const fapi::Target & i_target_mba); // clean up an mba
+
+} // extern "C"
+
+#endif // mss_power_cleanup_H
+
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