Clear PCIe xstops due to PCIe EIOs

Change-Id: I63c0b8b1f0d4e4d428e58c85d1a7846e96e0d114
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/7370
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

1 files changed, 32 insertions, 3 deletions

diff --git a/src/usr/hwpf/hwp/dram_initialization/host_mpipl_service/proc_mpipl_chip_cleanup.C b/src/usr/hwpf/hwp/dram_initialization/host_mpipl_service/proc_mpipl_chip_cleanup.C
index 720f1b0cf..8b126838e 100644
--- a/src/usr/hwpf/hwp/dram_initialization/host_mpipl_service/proc_mpipl_chip_cleanup.C
+++ b/src/usr/hwpf/hwp/dram_initialization/host_mpipl_service/proc_mpipl_chip_cleanup.C
@@ -20,8 +20,8 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: proc_mpipl_chip_cleanup.C,v 1.4 2013/02/02 20:58:09 belldi Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_mpipl_chip_cleanup.C,v $
+// $Id: proc_mpipl_chip_cleanup.C,v 1.5 2013/11/19 19:36:48 jmcgill Exp $
+// $Source: /afs/awd.austin.ibm.com/proj/p9/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_mpipl_chip_cleanup.C,v $
 //------------------------------------------------------------------------------
 // *|
 // *! (C) Copyright International Business Machines Corp. 2012
@@ -80,6 +80,11 @@ extern "C"
   // bit 0 (MCD_REC_ODD_ENABLE): 0 to 1 transition needed to start, reset to 0 at end of request.
   // bit 5 (MCD_REC_ODD_REQ_PEND)
   //
+  // 3) Clear PCI Nest FIR registers
+  // 02012000 (SCOM) 
+  // 02012400 (SCOM) 
+  // 02012800 (SCOM) 
+  //
   // parameters: 
   // 'i_target' is reference to chip target
   //
@@ -109,6 +114,12 @@ extern "C"
       "Even", //Ptr to char string "Even" for even MCD
       "Odd"   //Ptr to char string "Odd" for odd MCD
     }; 
+    const int MAX_PHBS = 3;
+    const uint64_t PCI_NEST_FIR_REG_ADDRS[MAX_PHBS] = {
+      0x02012000,
+      0x02012400,
+      0x02012800
+    };     
 
     //Verify MCD recovery was previously disabled for even and odd slices
     //If not, this is an error condition
@@ -156,7 +167,25 @@ extern "C"
         return rc;
       }
     }
-    
+
+    // SW227429: clear PCI Nest FIR registers
+    // hostboot is blindly sending EOIs in order to ensure no interrupts are pending when  PHYP starts up again
+    // with ETU held in reset, these get trapped in PCI and force a freeze to occur (PCI Nest FIR(14))
+    // clearing the FIR should remove the freeze condition
+    rc_ecmd = fsi_data.flushTo0();
+    if (rc_ecmd) {
+      FAPI_ERR("%s: Error (%u) forming PCI Nest FIR clear data buffer", procedureName, rc_ecmd);
+      rc.setEcmdError(rc_ecmd);
+      return rc;
+    }
+    for (int counter = 0; counter < MAX_PHBS; counter++) {
+      FAPI_DBG("Clearing PCI%d Nest FIR", counter);
+      rc = fapiPutScom(i_target, PCI_NEST_FIR_REG_ADDRS[counter], fsi_data);
+      if (rc) {
+        FAPI_ERR("%s: fapiPutScom error (addr: 0x%08llX)", procedureName, PCI_NEST_FIR_REG_ADDRS[counter]);
+        return rc;
+      }
+    }
     return rc;
   }