HWP: proc_cen_framelock update

04/11/2012 Joe McGill requested that we pick up an update to this HWP.
Target changed from proc_chip to MCS to avoid address translation in HWP.
And some other minor changes. Only dmi_training.C is Hostboot code that
needs to be reviewed. The other HWP files were already reviewed in
the hwp_review_centaur project.

Change-Id: I1a4f0583693b405a4e7b1bca42107173b472b5fa
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/941
Tested-by: Jenkins Server
Reviewed-by: Van H. Lee <vanlee@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

4 files changed, 213 insertions, 399 deletions

diff --git a/src/usr/hwpf/hwp/dmi_training/dmi_training.C b/src/usr/hwpf/hwp/dmi_training/dmi_training.C
index 1ab3e494c..305a17325 100644
--- a/src/usr/hwpf/hwp/dmi_training/dmi_training.C
+++ b/src/usr/hwpf/hwp/dmi_training/dmi_training.C
@@ -294,55 +294,35 @@ void    call_host_attnlisten_cen( void *io_pArgs )
 void    call_proc_cen_framelock( void *io_pArgs )
 {
 
-    fapi::ReturnCode            l_fapirc;
+    errlHndl_t                  l_errl          =   NULL;
     proc_cen_framelock_args     l_args;
-    TARGETING::TargetService&   l_targetService = targetService();
-    uint8_t                     l_cpuNum        =   0;
 
     //  Use PredicateIsFunctional to filter only functional chips
     TARGETING::PredicateIsFunctional    l_isFunctional;
 
-
     TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_proc_cen_framework entry" );
 
-    TARGETING::PredicateCTM         l_procChipFilter( CLASS_CHIP, TYPE_PROC );
-    TARGETING::PredicatePostfixExpr l_functionalAndProcChipFilter;
-    l_functionalAndProcChipFilter.push(&l_procChipFilter).push(&l_isFunctional).And();
-    TARGETING::TargetRangeFilter    l_cpuFilter(
-            l_targetService.begin(),
-            l_targetService.end(),
-            &l_functionalAndProcChipFilter );
-
-    for ( l_cpuNum=0;   l_cpuFilter;    ++l_cpuFilter, l_cpuNum++ )
-    {
-        //  make a local copy of the CPU target
-        const TARGETING::Target*  l_cpu_target = *l_cpuFilter;
-
         //  get the mcs chiplets associated with this cpu
         TARGETING::PredicateCTM l_mcsChipFilter(CLASS_UNIT, TYPE_MCS);
         TARGETING::PredicatePostfixExpr l_functionalAndMcsChipFilter;
         l_functionalAndMcsChipFilter.push(&l_mcsChipFilter).push(&l_isFunctional).And();
-        TARGETING::TargetHandleList l_mcsTargetList;
-        l_targetService.getAssociated(
-                                    l_mcsTargetList,
-                                    l_cpu_target,
-                                    TARGETING::TargetService::CHILD,
-                                    TARGETING::TargetService::IMMEDIATE,
-                                    &l_functionalAndMcsChipFilter );
 
-        for ( uint8_t j=0; j < l_mcsTargetList.size(); j++ )
+        TARGETING::TargetRangeFilter    l_mcsFilter(
+            TARGETING::targetService().begin(),
+            TARGETING::targetService().end(),
+            &l_functionalAndMcsChipFilter );
+
+        for (      ;  l_mcsFilter ; ++l_mcsFilter  )
         {
             //  make a local copy of the MCS target
-            const TARGETING::Target*  l_mcs_target = l_mcsTargetList[j];
-
-            uint8_t l_mcsNum    =   l_mcs_target->getAttr<ATTR_CHIP_UNIT>();
+            const TARGETING::Target*  l_mcs_target = *l_mcsFilter ;
 
             //  find all the Centaurs that are associated with this MCS
             TARGETING::PredicateCTM l_membufChipFilter(CLASS_CHIP, TYPE_MEMBUF);
             TARGETING::PredicatePostfixExpr l_functionalAndMembufChipFilter;
             l_functionalAndMembufChipFilter.push(&l_membufChipFilter).push(&l_isFunctional).And();
             TARGETING::TargetHandleList l_memTargetList;
-            l_targetService.getAssociated(l_memTargetList,
+            TARGETING::targetService().getAssociated(l_memTargetList,
                                           l_mcs_target,
                                           TARGETING::TargetService::CHILD_BY_AFFINITY,
                                           TARGETING::TargetService::ALL,
@@ -353,21 +333,17 @@ void    call_proc_cen_framelock( void *io_pArgs )
                 //  make a local copy of the MEMBUF target
                 const TARGETING::Target*  l_mem_target = l_memTargetList[k];
 
-
                 // fill out the args struct.
-                 l_args.mcs_pu               =   l_mcsNum;
-                 l_args.in_error_state       =   false;
-                 l_args.channel_init_timeout =   CHANNEL_INIT_TIMEOUT_NO_TIMEOUT;
-                 l_args.frtl_auto_not_manual =   true;
-                 l_args.frtl_manual_pu       =   0;
-                 l_args.frtl_manual_mem      =   0;
-
-                // Create compatable FAPI Targets from the vanilla targets,
-                //  and invoke the HWP.
-                fapi::Target l_fapiCpuTarget(
-                        TARGET_TYPE_PROC_CHIP,
+                l_args.in_error_state       =   false;
+                l_args.channel_init_timeout =   CHANNEL_INIT_TIMEOUT_NO_TIMEOUT;
+                l_args.frtl_auto_not_manual =   true;
+                l_args.frtl_manual_pu       =   0;
+                l_args.frtl_manual_mem      =   0;
+
+                fapi::Target l_fapiMcsTarget(
+                        TARGET_TYPE_MCS_CHIPLET,
                         reinterpret_cast<void *>
-                            ( const_cast<TARGETING::Target*>(l_cpu_target) )
+                            ( const_cast<TARGETING::Target*>(l_mcs_target) )
                         );
                 fapi::Target l_fapiMemTarget(
                         TARGET_TYPE_MEMBUF_CHIP,
@@ -375,49 +351,30 @@ void    call_proc_cen_framelock( void *io_pArgs )
                             (const_cast<TARGETING::Target*>(l_mem_target))
                         );
 
-                TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
-                        "===== Call proc_cen_framelock HWP( cpu 0x%x, mcs 0x%x, mem 0x%x ) : ",
-                        l_cpuNum,
-                        l_mcsNum,
-                        l_memNum );
                 EntityPath l_path;
-                l_path = l_cpu_target->getAttr<ATTR_PHYS_PATH>();
-                l_path.dump();
                 l_path  =   l_mcs_target->getAttr<ATTR_PHYS_PATH>();
                 l_path.dump();
                 l_path  =   l_mem_target->getAttr<ATTR_PHYS_PATH>();
                 l_path.dump();
-                TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "===== " );
-
-                // finally!
-                l_fapirc =  proc_cen_framelock(
-                                    l_fapiCpuTarget,
-                                    l_fapiMemTarget,
-                                    l_args );
 
-                if ( l_fapirc == fapi::FAPI_RC_SUCCESS )
+                FAPI_INVOKE_HWP( l_errl,
+                                 proc_cen_framelock,
+                                 l_fapiMcsTarget,
+                                 l_fapiMemTarget,
+                                 l_args  );
+                if ( l_errl )
                 {
-                    TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
-                            "SUCCESS :  proc_cen_framelock HWP( cpu 0x%x, mcs 0x%x, mem 0x%x ) ",
-                            l_cpuNum,
-                            l_mcsNum,
-                            l_memNum );
+                    TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+                              "ERROR : proc_cen_framelock" );
+                    errlCommit( l_errl, HWPF_COMP_ID );
                 }
                 else
                 {
-                    /**
-                     * @todo fapi error - just print out for now...
-                     */
                     TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
-                    "ERROR %d : proc_cen_framelock HWP( cpu 0x%x, mcs 0x%x, mem 0x%x )",
-                    static_cast<uint32_t>(l_fapirc),
-                    l_cpuNum,
-                    l_mcsNum,
-                    l_memNum );
+                               "SUCCESS : proc_cen_framelock " );
                 }
             }   // end mem
         }   // end mcs
-    }   //  end cpu
 
     TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_proc_cen_framework exit" );
 
diff --git a/src/usr/hwpf/hwp/dmi_training/proc_cen_framelock/proc_cen_framelock.C b/src/usr/hwpf/hwp/dmi_training/proc_cen_framelock/proc_cen_framelock.C
index dd4cd80bf..60bd52146 100644
--- a/src/usr/hwpf/hwp/dmi_training/proc_cen_framelock/proc_cen_framelock.C
+++ b/src/usr/hwpf/hwp/dmi_training/proc_cen_framelock/proc_cen_framelock.C
@@ -1,7 +1,7 @@
 //  IBM_PROLOG_BEGIN_TAG
 //  This is an automatically generated prolog.
 //
-//  $Source: src/usr/HWPs/dmi_training/proc_cen_framelock.C $
+//  $Source: src/usr/hwpf/hwp/dmi_training/proc_cen_framelock/proc_cen_framelock.C $
 //
 //  IBM CONFIDENTIAL
 //
@@ -20,7 +20,7 @@
 //  Origin: 30
 //
 //  IBM_PROLOG_END
-// $Id: proc_cen_framelock.C,v 1.2 2012/01/06 23:44:48 jmcgill Exp $
+// $Id: proc_cen_framelock.C,v 1.5 2012/04/11 06:23:54 jmcgill Exp $
 // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_cen_framelock.C,v $
 //------------------------------------------------------------------------------
 // *|
@@ -28,7 +28,7 @@
 // *! All Rights Reserved -- Property of IBM
 // *! *** IBM Confidential ***
 // *|
-// *! TITLE       : proc_cen_framelock.H
+// *! TITLE       : proc_cen_framelock.C
 // *! DESCRIPTION : Run framelock and FRTL (FAPI)
 // *!
 // *! OWNER NAME  : Irving Baysah           Email: baysah@us.ibm.com
@@ -49,67 +49,6 @@ extern "C"
 //------------------------------------------------------------------------------
 
 //------------------------------------------------------------------------------
-// function: utility subroutine to create proper SCOM address for P8 MCI 
-//           resource given base SCOM address (associated with MCS0) and target
-//           MCS chiplet offset
-// parameters: i_base_addr  => base SCOM address (associated with MCS0) for
-//                             desired MCI resource
-//             i_mcs        => MCS target chiplet offset to operate on
-//             o_xlate_addr => translated SCOM address for desired MCI resource
-// returns: FAPI_RC_SUCCESS if address translation was successful,
-//          else RC_PROC_CEN_FRAMELOCK_INTERNAL_ERR if MCS target chiplet offset
-//                                                  is out of range or base
-//                                                  address is unsupported
-//------------------------------------------------------------------------------
-fapi::ReturnCode proc_cen_framelock_translate_mci_scom_addr(
-    const uint32_t& i_base_addr,
-    const uint8_t& i_mcs,
-    uint32_t& o_xlate_addr)
-{
-    fapi::ReturnCode rc;
-
-    // validate that MCS offset is in range
-    if (i_mcs > PROC_CEN_FRAMELOCK_MAX_MCS_OFFSET)
-    {
-        FAPI_ERR(
-            "proc_cen_framelock_translate_mci_scom_addr: Out of range value %d presented for MCS offset argument value!",
-            i_mcs);
-        const uint8_t & ERR_DATA = i_mcs;
-        FAPI_SET_HWP_ERROR(rc, RC_PROC_CEN_FRAMELOCK_INTERNAL_ERR);
-    }
-    // check that base address matches one of the supported addresses
-    else if ((i_base_addr != MCI_FIR_0x02011840) &&
-             (i_base_addr != MCI_CFG_0x0201184A) &&
-             (i_base_addr != MCI_STAT_0x0201184B))
-    {
-        FAPI_ERR(
-            "proc_cen_framelock_translate_mci_scom_addr: Unsupported base SCOM address value 0x%x presented for translation!",
-            i_base_addr);
-        const uint32_t & ERR_DATA = i_base_addr;
-        FAPI_SET_HWP_ERROR(rc, RC_PROC_CEN_FRAMELOCK_INTERNAL_ERR);
-    }
-    else
-    {
-        // perform SCOM address translation
-        o_xlate_addr = i_base_addr;
-        
-        // add base offset for MC
-        o_xlate_addr += ((i_mcs / 2) * 0x100);
-        if ((i_mcs / 2) > 1)
-        {
-            o_xlate_addr += 0x200;
-        }
-        
-        // add offset for odd MCS numbers
-        if (i_mcs % 2)
-        {
-            o_xlate_addr += 0x80;
-        }
-    }
-    return rc;
-}
-
-//------------------------------------------------------------------------------
 // function: utility subroutine to clear the Centaur MBI Status Register
 // parameters: i_mem_target  => Centaur target
 // returns: FAPI_RC_SUCCESS if operation was successful, else error
@@ -119,16 +58,16 @@ fapi::ReturnCode proc_cen_framelock_clear_cen_mbi_stat_reg(
 {
     fapi::ReturnCode rc;
     ecmdDataBufferBase zero_data(64);
-    
+
     FAPI_DBG("proc_cen_framelock_clear_cen_mbi_stat_reg: Start");
-    
+
     rc = fapiPutScom(i_mem_target, MBI_STAT_0x0201080B, zero_data);
-    
+
     if (rc)
     {
-        FAPI_ERR("proc_cen_framelock_clear_cen_mbi_stat_reg: fapiPutScom error");
+        FAPI_ERR("proc_cen_framelock_clear_cen_mbi_stat_reg: fapiPutScom error (MBI_STAT_0x0201080B)");
     }
-    
+
     return rc;
 }
 
@@ -143,16 +82,16 @@ fapi::ReturnCode proc_cen_framelock_get_cen_mbi_stat_reg(
     ecmdDataBufferBase& o_data)
 {
     fapi::ReturnCode rc;
-    
+
     FAPI_DBG("proc_cen_framelock_get_cen_mbi_stat_reg: Start");
-    
+
     rc = fapiGetScom(i_mem_target, MBI_STAT_0x0201080B, o_data);
-    
+
     if (rc)
     {
-        FAPI_ERR("proc_cen_framelock_get_cen_mbi_stat_reg: fapiGetScom error");
+        FAPI_ERR("proc_cen_framelock_get_cen_mbi_stat_reg: fapiGetScom error (MBI_STAT_0x0201080B)");
     }
-    
+
     return rc;
 }
 
@@ -166,16 +105,16 @@ fapi::ReturnCode proc_cen_framelock_clear_cen_mbi_fir_reg(
 {
     fapi::ReturnCode rc;
     ecmdDataBufferBase zero_data(64);
-    
+
     FAPI_DBG("proc_cen_framelock_clear_cen_mbi_fir_reg: Start");
-    
+
     rc = fapiPutScom(i_mem_target, MBI_FIR_0x02010800, zero_data);
-    
+
     if (rc)
     {
-        FAPI_ERR("proc_cen_framelock_clear_cen_mbi_fir_reg: fapiPutScom error");
+        FAPI_ERR("proc_cen_framelock_clear_cen_mbi_fir_reg: fapiPutScom error (MBI_FIR_0x02010800)");
     }
-    
+
     return rc;
 }
 
@@ -190,22 +129,21 @@ fapi::ReturnCode proc_cen_framelock_get_cen_mbi_fir_reg(
     ecmdDataBufferBase& o_data)
 {
     fapi::ReturnCode rc;
-    
+
     FAPI_DBG("proc_cen_framelock_get_cen_mbi_fir_reg: Start");
-    
+
     rc = fapiGetScom(i_mem_target, MBI_FIR_0x02010800, o_data);
-    
     if (rc)
     {
-        FAPI_ERR("proc_cen_framelock_get_cen_mbi_fir_reg: fapiGetScom error");
+        FAPI_ERR("proc_cen_framelock_get_cen_mbi_fir_reg: fapiGetScom error (MBI_FIR_0x02010800)");
     }
-    
+
     return rc;
 }
 
 //------------------------------------------------------------------------------
 // function: utility subroutine to clear the P8 MCI Status Register
-// parameters: i_pu_target  => P8 target
+// parameters: i_pu_target  => P8 MCS chip unit target
 //             i_args       => proc_cen_framelock HWP argumemt structure
 // returns: FAPI_RC_SUCCESS if operation was successful, else error
 //------------------------------------------------------------------------------
@@ -215,32 +153,22 @@ fapi::ReturnCode proc_cen_framelock_clear_pu_mci_stat_reg(
 {
     fapi::ReturnCode rc;
     ecmdDataBufferBase zero_data(64);
-    uint32_t mci_xlate_scom_addr = 0;
-    
+
     FAPI_DBG("proc_cen_framelock_clear_pu_mci_stat_reg: Start");
-    rc = proc_cen_framelock_translate_mci_scom_addr(MCI_STAT_0x0201184B,
-                                                    i_args.mcs_pu,
-                                                    mci_xlate_scom_addr);
+
+    rc = fapiPutScom(i_pu_target, MCI_STAT_0x0201184B, zero_data);
+
     if (rc)
     {
-        FAPI_ERR("proc_cen_framelock_clear_pu_mci_stat_reg: xlate error");
+        FAPI_ERR("proc_cen_framelock_clear_pu_mci_stat_reg: fapiPutScom error (MCI_STAT_0x0201184B)");
     }
-    else
-    {
-        rc = fapiPutScom(i_pu_target, mci_xlate_scom_addr, zero_data);
-        
-        if (rc)
-        {
-            FAPI_ERR("proc_cen_framelock_clear_pu_mci_stat_reg: fapiPutScom error");
-        }
-    }
-    
-    return rc;    
+
+    return rc;
 }
 
 //------------------------------------------------------------------------------
 // function: utility subroutine to get the P8 MCI Status Register
-// parameters: i_pu_target  => P8 target
+// parameters: i_pu_target  => P8 MCS chip unit target
 //             i_args       => proc_cen_framelock HWP argumemt structure
 //             o_data       => Output data
 // returns: FAPI_RC_SUCCESS if operation was successful, else error
@@ -251,32 +179,21 @@ fapi::ReturnCode proc_cen_framelock_get_pu_mci_stat_reg(
     ecmdDataBufferBase& o_data)
 {
     fapi::ReturnCode rc;
-    uint32_t mci_xlate_scom_addr = 0;
-    
+
     FAPI_DBG("proc_cen_framelock_get_pu_mci_stat_reg: Start");
-    rc = proc_cen_framelock_translate_mci_scom_addr(MCI_STAT_0x0201184B,
-                                                    i_args.mcs_pu,
-                                                    mci_xlate_scom_addr);
+
+    rc = fapiGetScom(i_pu_target, MCI_STAT_0x0201184B, o_data);
+
     if (rc)
     {
-        FAPI_ERR("proc_cen_framelock_get_pu_mci_stat_reg: xlate error");
+        FAPI_ERR("proc_cen_framelock_get_pu_mci_stat_reg: fapiGetScom error (MCI_STAT_0x0201184B)");
     }
-    else
-    {
-        rc = fapiGetScom(i_pu_target, mci_xlate_scom_addr, o_data);
-        
-        if (rc)
-        {
-            FAPI_ERR("proc_cen_framelock_get_pu_mci_stat_reg: fapiGetScom error");
-        }
-    }
-    
-    return rc;    
+    return rc;
 }
 
 //------------------------------------------------------------------------------
 // function: utility subroutine to clear the P8 MCI FIR Register
-// parameters: i_pu_target  => P8 target
+// parameters: i_pu_target  => P8 MCS chip unit target
 //             i_args       => proc_cen_framelock HWP argumemt structure
 // returns: FAPI_RC_SUCCESS if operation was successful, else error
 //------------------------------------------------------------------------------
@@ -286,33 +203,22 @@ fapi::ReturnCode proc_cen_framelock_clear_pu_mci_fir_reg(
 {
     fapi::ReturnCode rc;
     ecmdDataBufferBase zero_data(64);
-    uint32_t mci_xlate_scom_addr = 0;
-    
+
     FAPI_DBG("proc_cen_framelock_clear_pu_mci_fir_reg: Start");
-    rc = proc_cen_framelock_translate_mci_scom_addr(MCI_FIR_0x02011840,
-                                                    i_args.mcs_pu,
-                                                    mci_xlate_scom_addr);
+
+    rc = fapiPutScom(i_pu_target, MCI_FIR_0x02011840, zero_data);
 
     if (rc)
     {
-        FAPI_ERR("proc_cen_framelock_clear_pu_mci_fir_reg: xlate error");
+        FAPI_ERR("proc_cen_framelock_clear_pu_mci_fir_reg: fapiPutScom error (MCI_FIR_0x02011840)");
     }
-    else
-    {
-        rc = fapiPutScom(i_pu_target, mci_xlate_scom_addr, zero_data);
-        
-        if (rc)
-        {
-            FAPI_ERR("proc_cen_framelock_clear_pu_mci_fir_reg: fapiPutScom error");
-        }
-    }
-    
+
     return rc;
 }
 
 //------------------------------------------------------------------------------
 // function: utility subroutine to get the P8 MCI FIR Register
-// parameters: i_pu_target  => P8 target
+// parameters: i_pu_target  => P8 MCS chip unit target
 //             i_args       => proc_cen_framelock HWP argumemt structure
 //             o_data       => output data
 // returns: FAPI_RC_SUCCESS if operation was successful, else error
@@ -323,33 +229,23 @@ fapi::ReturnCode proc_cen_framelock_get_pu_mci_fir_reg(
     ecmdDataBufferBase& o_data)
 {
     fapi::ReturnCode rc;
-    uint32_t mci_xlate_scom_addr = 0;
-    
+
     FAPI_DBG("proc_cen_framelock_get_pu_mci_fir_reg: Start");
-    rc = proc_cen_framelock_translate_mci_scom_addr(MCI_FIR_0x02011840,
-                                                    i_args.mcs_pu,
-                                                    mci_xlate_scom_addr);
+
+    rc = fapiGetScom(i_pu_target, MCI_FIR_0x02011840, o_data);
+
     if (rc)
     {
-        FAPI_ERR("proc_cen_framelock_get_pu_mci_fir_reg: xlate error");
-    }
-    else
-    {
-        rc = fapiGetScom(i_pu_target, mci_xlate_scom_addr, o_data);
-        
-        if (rc)
-        {
-            FAPI_ERR("proc_cen_framelock_get_pu_mci_fir_reg: fapiGetScom error");
-        }
+        FAPI_ERR("proc_cen_framelock_get_pu_mci_fir_reg: fapiGetScom error (MCI_FIR_0x02011840)");
     }
-    
-    return rc;    
+
+    return rc;
 }
 
 //------------------------------------------------------------------------------
 // function: utility subroutine to set the Centaur MBI Config Register
 // parameters: i_mem_target => Centaur target
-//             i_data       => Input data 
+//             i_data       => Input data
 //             i_mask       => Input mask
 // returns: FAPI_RC_SUCCESS if operation was successful, else error
 //------------------------------------------------------------------------------
@@ -359,22 +255,22 @@ fapi::ReturnCode proc_cen_framelock_set_cen_mbi_cfg_reg(
     ecmdDataBufferBase& i_mask)
 {
     fapi::ReturnCode rc;
-    
+
     FAPI_DBG("proc_cen_framelock_set_cen_mbi_cfg_reg: Start");
     rc = fapiPutScomUnderMask(i_mem_target, MBI_CFG_0x0201080A, i_data, i_mask);
-    
+
     if (rc)
     {
-        FAPI_ERR("proc_cen_framelock_set_cen_mbi_cfg_reg: fapiPutScomUnderMask error");
+        FAPI_ERR("proc_cen_framelock_set_cen_mbi_cfg_reg: fapiPutScomUnderMask error (MBI_CFG_0x0201080A)");
     }
-    
-    return rc;    
+
+    return rc;
 }
 
 //------------------------------------------------------------------------------
 // function: utility subroutine to set the P8 MCI Config Register
-// parameters: i_pu_target => P8 target
-//             i_data      => Input data 
+// parameters: i_pu_target => P8 MCS chip unit target
+//             i_data      => Input data
 //             i_mask      => Input mask
 //             i_args      => proc_cen_framelock HWP argumemt structure
 // returns: FAPI_RC_SUCCESS if operation was successful, else error
@@ -386,35 +282,23 @@ fapi::ReturnCode proc_cen_framelock_set_pu_mci_cfg_reg(
     const proc_cen_framelock_args& i_args)
 {
     fapi::ReturnCode rc;
-    uint32_t mci_xlate_scom_addr = 0;
-    
+
     FAPI_DBG("proc_cen_framelock_set_pu_mci_cfg_reg: Start");
-    rc = proc_cen_framelock_translate_mci_scom_addr(MCI_CFG_0x0201184A,
-                                                    i_args.mcs_pu,
-                                                    mci_xlate_scom_addr);
+
+    rc = fapiPutScomUnderMask(i_pu_target, MCI_CFG_0x0201184A, i_data, i_mask);
 
     if (rc)
     {
-        FAPI_ERR("proc_cen_framelock_set_pu_mci_cfg_reg: xlate error");
-    }
-    else
-    {
-        rc = fapiPutScomUnderMask(i_pu_target, mci_xlate_scom_addr, i_data,
-                                  i_mask);
-        
-        if (rc)
-        {
-            FAPI_ERR("proc_cen_framelock_set_pu_mci_cfg_reg: fapiPutScomUnderMask error");
-        }
+        FAPI_ERR("proc_cen_framelock_set_pu_mci_cfg_reg: fapiPutScomUnderMask error (MCI_CFG_0x0201184A)");
     }
-    
+
     return rc;
 }
 
 //------------------------------------------------------------------------------
-// function: utility subroutine to claer the P8 and Centaur Status/FIR Registers
-// parameters: i_pu_target  => P8 target
-//             i_mem_target => Centaur target 
+// function: utility subroutine to clear the P8 and Centaur Status/FIR Registers
+// parameters: i_pu_target  => P8 MCS chip unit target
+//             i_mem_target => Centaur target
 //             i_args      => proc_cen_framelock HWP argumemt structure
 // returns: FAPI_RC_SUCCESS if operation was successful, else error
 //------------------------------------------------------------------------------
@@ -424,7 +308,7 @@ fapi::ReturnCode proc_cen_framelock_clear_stat_fir_regs(
     const proc_cen_framelock_args& i_args)
 {
     fapi::ReturnCode rc;
-    
+
     FAPI_DBG("proc_cen_framelock_clear_stat_fir_regs: Start");
 
     do
@@ -440,16 +324,16 @@ fapi::ReturnCode proc_cen_framelock_clear_stat_fir_regs(
 
         // Clear Centaur MBI FIR Register
         rc = proc_cen_framelock_clear_cen_mbi_fir_reg(i_mem_target);
-        
+
         if (rc)
         {
             FAPI_ERR("proc_cen_framelock_clear_stat_fir_regs: Error from proc_cen_framelock_clear_cen_mbi_fir_reg");
             break;
         }
-        
+
         // Clear P8 MCI Status Register
         rc = proc_cen_framelock_clear_pu_mci_stat_reg(i_pu_target, i_args);
-        
+
         if (rc)
         {
             FAPI_ERR("proc_cen_framelock_clear_stat_fir_regs: Error from proc_cen_framelock_clear_pu_mci_stat_reg");
@@ -458,30 +342,28 @@ fapi::ReturnCode proc_cen_framelock_clear_stat_fir_regs(
 
         // Clear P8 MCI FIR Register
         rc = proc_cen_framelock_clear_pu_mci_fir_reg(i_pu_target, i_args);
-        
+
         if (rc)
         {
             FAPI_ERR("proc_cen_framelock_clear_stat_fir_regs: Error from proc_cen_framelock_clear_pu_mci_fir_reg");
             break;
         }
-        
+
     } while(0);
-    
-    return rc;    
+
+    return rc;
 }
 
 //------------------------------------------------------------------------------
 // function: utility subroutine to initiate P8/Centaur framelock operation and
 //           poll for completion
-// parameters: i_pu_target  => P8 chip target
+// parameters: i_pu_target  => P8 MCS chip unit target
 //             i_mem_target => Centaur chip target
 //             i_args       => proc_cen_framelock HWP argumemt structure
 // returns: FAPI_RC_SUCCESS if framelock sequence completes successfully,
-//          RC_PROC_CEN_FRAMELOCK_INTERNAL_ERR
-//              if internal program logic error is encountered,
 //          RC_PROC_CEN_FRAMELOCK_FL_CEN_FIR_ERR
 //          RC_PROC_CEN_FRAMELOCK_FL_P8_FIR_ERR
-//              if MCI/MBI FIR is set during framelock operation, 
+//              if MCI/MBI FIR is set during framelock operation,
 //          RC_PROC_CEN_FRAMELOCK_FL_CEN_FAIL_ERR
 //          RC_PROC_CEN_FRAMELOCK_FL_P8_FAIL_ERR
 //              if MCI/MBI indicates framelock operation failure
@@ -532,10 +414,10 @@ fapi::ReturnCode proc_cen_framelock_run_framelock(
             {
                 FAPI_ERR("proc_cen_framelock_run_framelock: Error 0x%x setting up data buffers to force framelock",
                          rc_ecmd);
-                rc = rc_ecmd;
+                rc.setEcmdError(rc_ecmd);
                 break;
             }
-        
+
             rc = proc_cen_framelock_set_cen_mbi_cfg_reg(i_mem_target, data,
                                                         mask);
             if (rc)
@@ -563,10 +445,10 @@ fapi::ReturnCode proc_cen_framelock_run_framelock(
         {
             FAPI_ERR("proc_cen_framelock_run_framelock: Error 0x%x setting up data buffers to set init timeout",
                      rc_ecmd);
-            rc = rc_ecmd;
+            rc.setEcmdError(rc_ecmd);
             break;
         }
-        
+
         rc = proc_cen_framelock_set_pu_mci_cfg_reg(i_pu_target, data, mask,
                                                    i_args);
         if (rc)
@@ -584,12 +466,12 @@ fapi::ReturnCode proc_cen_framelock_run_framelock(
         {
             FAPI_ERR("proc_cen_framelock_run_framelock: Error 0x%x setting up data buffers to initiate framelock",
                      rc_ecmd);
-            rc = rc_ecmd;
+            rc.setEcmdError(rc_ecmd);
             break;
         }
-        
+
         rc = proc_cen_framelock_set_pu_mci_cfg_reg(i_pu_target, data, mask,
-                                                   i_args);   
+                                                   i_args);
         if (rc)
         {
             FAPI_ERR("proc_cen_framelock_run_framelock: Error writing P8 MCI Configuration register to initiate framelock");
@@ -599,27 +481,27 @@ fapi::ReturnCode proc_cen_framelock_run_framelock(
         // poll until framelock operation is finished, a timeout is deemed to
         // have occurred, or an error is detected
         uint8_t polls = 0;
-        
+
         while (1)
         {
             // Read Centaur MBI Status Register
             rc = proc_cen_framelock_get_cen_mbi_stat_reg(i_mem_target,
-                                                         mbi_stat);        
+                                                         mbi_stat);
             if (rc)
             {
                 FAPI_ERR("proc_cen_framelock_run_framelock: Error reading Centaur MBI Status Register");
                 break;
             }
-        
+
             // Read Centaur MBI FIR Register
             rc = proc_cen_framelock_get_cen_mbi_fir_reg(i_mem_target, mbi_fir);
-        
+
             if (rc)
             {
                 FAPI_ERR("proc_cen_framelock_run_framelock: Error reading Centaur MBI FIR Register");
                 break;
             }
-        
+
             // Read P8 MCI Status Register
             rc = proc_cen_framelock_get_pu_mci_stat_reg(i_pu_target, i_args,
                                                         mci_stat);
@@ -628,7 +510,7 @@ fapi::ReturnCode proc_cen_framelock_run_framelock(
                 FAPI_ERR("proc_cen_framelock_run_framelock: Error reading P8 MCI Status Register");
                 break;
             }
-        
+
             // Read P8 MCI FIR Register
             rc = proc_cen_framelock_get_pu_mci_fir_reg(i_pu_target, i_args,
                                                        mci_fir);
@@ -637,7 +519,7 @@ fapi::ReturnCode proc_cen_framelock_run_framelock(
                 FAPI_ERR("proc_cen_framelock_run_framelock: Error reading P8 MCI FIR Register");
                 break;
             }
-        
+
             // Fail if any Centaur FIR bits are set
             if (mbi_fir.getDoubleWord(0))
             {
@@ -647,20 +529,18 @@ fapi::ReturnCode proc_cen_framelock_run_framelock(
                 FAPI_SET_HWP_ERROR(rc, RC_PROC_CEN_FRAMELOCK_FL_CEN_FIR_ERR);
                 break;
             }
-        
+
             // Fail if any P8 FIR bits are set
             if (mci_fir.getDoubleWord(0))
             {
-                // TODO: seeing FIR[25] set on e8052+cen050 model due to flush
-                // state parity error fixed in future P8 models, skip check for
-                // now
-                FAPI_ERR("TODO. IGNORING. proc_cen_framelock_run_framelock: Framelock fail. P8 MCI FIR bit on (0x%llx)",
+
+                FAPI_ERR("proc_cen_framelock_run_framelock: Framelock fail. P8 MCI FIR bit on (0x%llx)",
                          mci_fir.getDoubleWord(0));
-                //ecmdDataBufferBase & FIR_REG = mci_fir;
-                //FAPI_SET_HWP_ERROR(rc, RC_PROC_CEN_FRAMELOCK_FL_P8_FIR_ERR);
-                //break;
+                ecmdDataBufferBase & FIR_REG = mci_fir;
+                FAPI_SET_HWP_ERROR(rc, RC_PROC_CEN_FRAMELOCK_FL_P8_FIR_ERR);
+                break;
             }
-        
+
             // Fail if Centaur FAIL bit set
             if (mbi_stat.isBitSet(MBI_STAT_FRAMELOCK_FAIL_BIT))
             {
@@ -668,7 +548,7 @@ fapi::ReturnCode proc_cen_framelock_run_framelock(
                 FAPI_SET_HWP_ERROR(rc, RC_PROC_CEN_FRAMELOCK_FL_CEN_FAIL_ERR);
                 break;
             }
-        
+
             // Fail if P8 FAIL bit set
             if (mci_stat.isBitSet(MCI_STAT_FRAMELOCK_FAIL_BIT))
             {
@@ -676,7 +556,7 @@ fapi::ReturnCode proc_cen_framelock_run_framelock(
                 FAPI_SET_HWP_ERROR(rc, RC_PROC_CEN_FRAMELOCK_FL_P8_FAIL_ERR);
                 break;
             }
-        
+
             // Success if Centaur and P8 PASS bits set
             if ((mbi_stat.isBitSet(MBI_STAT_FRAMELOCK_PASS_BIT)) &&
                 (mci_stat.isBitSet(MCI_STAT_FRAMELOCK_PASS_BIT)))
@@ -684,7 +564,7 @@ fapi::ReturnCode proc_cen_framelock_run_framelock(
                 FAPI_DBG("proc_cen_framelock_run_framelock: Framelock completed successfully!");
                 break;
             }
-        
+
             if (polls >= PROC_CEN_FRAMELOCK_MAX_FRAMELOCK_POLLS)
             {
                 // Loop count has expired, timeout
@@ -703,27 +583,25 @@ fapi::ReturnCode proc_cen_framelock_run_framelock(
             {
                 // polls left, keep waiting for pass/fail bits to come on
                 polls++;
-                FAPI_DBG("proc_cen_framelock_run_framelock: Loop %d of %d ...\n",
+                FAPI_DBG("proc_cen_framelock_run_framelock: Loop %d of %d ...",
                          polls, PROC_CEN_FRAMELOCK_MAX_FRAMELOCK_POLLS);
             }
         }
     } while (0);
-        
+
     return rc;
 }
 
 //------------------------------------------------------------------------------
 // function: utility subroutine to initiate P8/Centaur FRTL (frame round trip
 //           latency) determination and check for completion
-// parameters: i_pu_target  => P8 chip target
+// parameters: i_pu_target  => P8 MCS chip unit target
 //             i_mem_target => Centaur chip target
 //             i_args       => proc_cen_framelock HWP argumemt structure
 // returns: FAPI_RC_SUCCESS if FRTL sequence completes successfully,
-//          RC_PROC_CEN_FRAMELOCK_INTERNAL_ERR
-//              if internal program logic error is encountered,
 //          RC_PROC_CEN_FRAMELOCK_FRTL_CEN_FIR_ERR
 //          RC_PROC_CEN_FRAMELOCK_FRTL_P8_FIR_ERR
-//              if MCI/MBI FIR is set during FRTL operation, 
+//              if MCI/MBI FIR is set during FRTL operation,
 //          RC_PROC_CEN_FRAMELOCK_FRTL_CEN_FAIL_ERR
 //          RC_PROC_CEN_FRAMELOCK_FRTL_P8_FAIL_ERR
 //              if MCI/MBI indicates FRTL operation failure,
@@ -766,7 +644,7 @@ fapi::ReturnCode proc_cen_framelock_run_frtl(
         if (i_args.frtl_auto_not_manual)
         {
             // Auto mode
-            
+
             // if error state is set, force FRTL bit in Centaur MBI
             // Configuration Register
             if (i_args.in_error_state)
@@ -779,10 +657,10 @@ fapi::ReturnCode proc_cen_framelock_run_frtl(
                 {
                     FAPI_ERR("proc_cen_framelock_run_frtl: Error 0x%x setting up data buffers to force FRTL",
                              rc_ecmd);
-                    rc = rc_ecmd;
+                    rc.setEcmdError(rc_ecmd);
                     break;
                 }
-                
+
                 rc = proc_cen_framelock_set_cen_mbi_cfg_reg(i_mem_target, data,
                                                             mask);
                 if (rc)
@@ -810,10 +688,10 @@ fapi::ReturnCode proc_cen_framelock_run_frtl(
             {
                 FAPI_ERR("proc_cen_framelock_run_frtl: Error 0x%x setting up data buffers to set init timeout",
                          rc_ecmd);
-                rc = rc_ecmd;
+                rc.setEcmdError(rc_ecmd);
                 break;
             }
-            
+
             rc = proc_cen_framelock_set_pu_mci_cfg_reg(i_pu_target, data, mask,
                                                        i_args);
             if (rc)
@@ -831,12 +709,12 @@ fapi::ReturnCode proc_cen_framelock_run_frtl(
             {
                 FAPI_ERR("proc_cen_framelock_run_frtl: Error 0x%x setting up data buffers to initiate FRTL",
                          rc_ecmd);
-                rc = rc_ecmd;
+                rc.setEcmdError(rc_ecmd);
                 break;
             }
-            
+
             rc = proc_cen_framelock_set_pu_mci_cfg_reg(i_pu_target, data, mask,
-                                                       i_args);   
+                                                       i_args);
             if (rc)
             {
                 FAPI_ERR("proc_cen_framelock_run_frtl: Error writing P8 MCI Configuration register to initiate FRTL");
@@ -846,7 +724,7 @@ fapi::ReturnCode proc_cen_framelock_run_frtl(
             // Poll until FRTL operation is finished, a timeout is deemed to
             // have occurred, or an error is detected
             uint8_t polls = 0;
-            
+
             while (1)
             {
                 // Read Centaur MBI Status Register
@@ -857,7 +735,7 @@ fapi::ReturnCode proc_cen_framelock_run_frtl(
                     FAPI_ERR("proc_cen_framelock_run_frtl: Error reading Centaur MBI Status Register");
                     break;
                 }
-            
+
                 // Read Centaur MBI FIR Register
                 rc = proc_cen_framelock_get_cen_mbi_fir_reg(i_mem_target,
                                                             mbi_fir);
@@ -866,7 +744,7 @@ fapi::ReturnCode proc_cen_framelock_run_frtl(
                     FAPI_ERR("proc_cen_framelock_run_frtl: Error reading Centaur MBI FIR Register");
                     break;
                 }
-            
+
                 // Read P8 MCI Status Register
                 rc = proc_cen_framelock_get_pu_mci_stat_reg(i_pu_target, i_args,
                                                             mci_stat);
@@ -875,7 +753,7 @@ fapi::ReturnCode proc_cen_framelock_run_frtl(
                     FAPI_ERR("proc_cen_framelock_run_frtl: Error reading P8 MCI Status Register");
                     break;
                 }
-            
+
                 // Read P8 MCI FIR Register
                 rc = proc_cen_framelock_get_pu_mci_fir_reg(i_pu_target, i_args,
                                                            mci_fir);
@@ -884,7 +762,7 @@ fapi::ReturnCode proc_cen_framelock_run_frtl(
                     FAPI_ERR("proc_cen_framelock_run_frtl: Error reading P8 MCI FIR Register");
                     break;
                 }
-                
+
                 // Fail if any Centaur FIR bits are set
                 if (mbi_fir.getDoubleWord(0))
                 {
@@ -895,21 +773,18 @@ fapi::ReturnCode proc_cen_framelock_run_frtl(
                                        RC_PROC_CEN_FRAMELOCK_FRTL_CEN_FIR_ERR);
                     break;
                 }
-            
+
                 // Fail if any P8 FIR bits are set
                 if (mci_fir.getDoubleWord(0))
                 {
-                    // TODO: seeing FIR[25] set on e8052+cen050 model due to
-                    // flush state parity error fixed in future P8 models, skip
-                    // check for now
-                    FAPI_ERR("TODO. IGNORING. proc_cen_framelock_run_frtl: FRTL fail (auto). P8 MCI FIR bit on (0x%llx)",
+                    FAPI_ERR("proc_cen_framelock_run_frtl: FRTL fail (auto). P8 MCI FIR bit on (0x%llx)",
                              mci_fir.getDoubleWord(0));
-                    //ecmdDataBufferBase & FIR_REG = mci_fir;
-                    //FAPI_SET_HWP_ERROR(rc,
-                    //                   RC_PROC_CEN_FRAMELOCK_FRTL_P8_FIR_ERR);
-                    //break;
+                    ecmdDataBufferBase & FIR_REG = mci_fir;
+                    FAPI_SET_HWP_ERROR(rc,
+                                       RC_PROC_CEN_FRAMELOCK_FRTL_P8_FIR_ERR);
+                    break;
                 }
-            
+
                 // Fail if Centaur FAIL bit set
                 if (mbi_stat.isBitSet(MBI_STAT_FRTL_FAIL_BIT))
                 {
@@ -918,7 +793,7 @@ fapi::ReturnCode proc_cen_framelock_run_frtl(
                                        RC_PROC_CEN_FRAMELOCK_FRTL_CEN_FAIL_ERR);
                     break;
                 }
-            
+
                 // Fail if P8 FAIL bit set
                 if (mci_stat.isBitSet(MCI_STAT_FRTL_FAIL_BIT))
                 {
@@ -927,7 +802,7 @@ fapi::ReturnCode proc_cen_framelock_run_frtl(
                                        RC_PROC_CEN_FRAMELOCK_FRTL_P8_FAIL_ERR);
                     break;
                 }
-            
+
                 // Success if Centaur and P8 PASS bits set
                 if ((mbi_stat.isBitSet(MBI_STAT_FRTL_PASS_BIT)) &&
                     (mci_stat.isBitSet(MCI_STAT_FRTL_PASS_BIT)))
@@ -935,7 +810,7 @@ fapi::ReturnCode proc_cen_framelock_run_frtl(
                     FAPI_DBG("proc_cen_framelock_run_frtl: FRTL (auto) completed successfully!");
                     break;
                 }
-            
+
                 if (polls >= PROC_CEN_FRAMELOCK_MAX_FRTL_POLLS)
                 {
                     // Loop count has expired, timeout
@@ -984,10 +859,10 @@ fapi::ReturnCode proc_cen_framelock_run_frtl(
             {
                 FAPI_ERR("proc_cen_framelock_run_frtl: Error 0x%x setting up data buffers to disable Centaur auto FRTL mode",
                          rc_ecmd);
-                rc = rc_ecmd;
+                rc.setEcmdError(rc_ecmd);
                 break;
             }
-            
+
             rc = proc_cen_framelock_set_cen_mbi_cfg_reg(i_mem_target, data,
                                                         mask);
             if (rc)
@@ -1007,7 +882,7 @@ fapi::ReturnCode proc_cen_framelock_run_frtl(
                 FAPI_SET_HWP_ERROR(rc, RC_PROC_CEN_FRAMELOCK_INVALID_ARGS);
                 break;
             }
-            
+
             rc_ecmd |= data.flushTo0();
             rc_ecmd |= mask.flushTo0();
             rc_ecmd |= data.insertFromRight(
@@ -1020,15 +895,15 @@ fapi::ReturnCode proc_cen_framelock_run_frtl(
                 MBI_CFG_MANUAL_FRTL_START_BIT,
                 (MBI_CFG_MANUAL_FRTL_END_BIT -
                  MBI_CFG_MANUAL_FRTL_START_BIT + 1));
-            
+
             if (rc_ecmd)
             {
                 FAPI_ERR("proc_cen_framelock_run_frtl: Error 0x%x setting up data buffers to set Centaur manual FRTL value",
                          rc_ecmd);
-                rc = rc_ecmd;
+                rc.setEcmdError(rc_ecmd);
                 break;
             }
-            
+
             rc = proc_cen_framelock_set_cen_mbi_cfg_reg(i_mem_target, data,
                                                         mask);
             if (rc)
@@ -1047,10 +922,10 @@ fapi::ReturnCode proc_cen_framelock_run_frtl(
             {
                 FAPI_ERR( "proc_cen_framelock_run_frtl: Error 0x%x setting up data buffers to set Centaur manual FRTL done",
                           rc_ecmd);
-                rc = rc_ecmd;
+                rc.setEcmdError(rc_ecmd);
                 break;
             }
-            
+
             rc = proc_cen_framelock_set_cen_mbi_cfg_reg(i_mem_target, data,
                                                         mask);
             if (rc)
@@ -1079,10 +954,10 @@ fapi::ReturnCode proc_cen_framelock_run_frtl(
             {
                 FAPI_ERR("proc_cen_framelock_run_frtl: Error 0x%x setting up data buffers to disable P8 auto FRTL mode",
                          rc_ecmd);
-                rc = rc_ecmd;
+                rc.setEcmdError(rc_ecmd);
                 break;
             }
-            
+
             rc = proc_cen_framelock_set_pu_mci_cfg_reg(i_pu_target, data, mask,
                                                        i_args);
             if (rc)
@@ -1113,15 +988,15 @@ fapi::ReturnCode proc_cen_framelock_run_frtl(
                 MCI_CFG_MANUAL_FRTL_START_BIT,
                 (MCI_CFG_MANUAL_FRTL_END_BIT -
                  MCI_CFG_MANUAL_FRTL_START_BIT + 1));
-            
+
             if (rc_ecmd)
             {
                 FAPI_ERR("proc_cen_framelock_run_frtl: Error 0x%x setting up data buffers to set P8 manual FRTL value",
                          rc_ecmd);
-                rc = rc_ecmd;
+                rc.setEcmdError(rc_ecmd);
                 break;
             }
-            
+
             rc = proc_cen_framelock_set_pu_mci_cfg_reg(i_pu_target, data, mask,
                                                        i_args);
             if (rc)
@@ -1139,10 +1014,10 @@ fapi::ReturnCode proc_cen_framelock_run_frtl(
             {
                 FAPI_ERR("proc_cen_framelock_run_frtl: Error 0x%x setting up data buffers to write P8 manual FRTL done",
                          rc_ecmd);
-                rc = rc_ecmd;
+                rc.setEcmdError(rc_ecmd);
                 break;
             }
-            
+
             rc = proc_cen_framelock_set_pu_mci_cfg_reg(i_pu_target, data, mask,
                                                        i_args);
             if (rc)
@@ -1150,10 +1025,10 @@ fapi::ReturnCode proc_cen_framelock_run_frtl(
                 FAPI_ERR("proc_cen_framelock_run_frtl: Error writing P8 MCI Configuration register to set manual FRTL done");
                 break;
             }
-        
+
             // Read Centaur MBI FIR Register
             rc = proc_cen_framelock_get_cen_mbi_fir_reg(i_mem_target, mbi_fir);
-    
+
             if (rc)
             {
                 FAPI_ERR("proc_cen_framelock_run_frtl: Error reading Centaur MBI FIR Register");
@@ -1163,7 +1038,7 @@ fapi::ReturnCode proc_cen_framelock_run_frtl(
             // Read P8 MCI FIR Register
             rc = proc_cen_framelock_get_pu_mci_fir_reg(i_pu_target, i_args,
                                                        mci_fir);
-    
+
             if (rc)
             {
                 FAPI_ERR("proc_cen_framelock_run_frtl: Error reading P8 MCI FIR Register");
@@ -1179,23 +1054,20 @@ fapi::ReturnCode proc_cen_framelock_run_frtl(
                 FAPI_SET_HWP_ERROR(rc, RC_PROC_CEN_FRAMELOCK_FL_CEN_FIR_ERR);
                 break;
             }
-    
+
             // Fail if any P8 FIR bits are set
             if (mci_fir.getDoubleWord(0))
             {
-                // TODO: seeing FIR[25] set on e8052+cen050 model due to flush
-                // state parity error fixed in future P8 models, skip check for
-                // now
-                FAPI_ERR("TODO. IGNORING. proc_cen_framelock_run_frtl: FRTL fail (manual). P8 MCI FIR bit on (0x%llx)",
+                FAPI_ERR("proc_cen_framelock_run_frtl: FRTL fail (manual). P8 MCI FIR bit on (0x%llx)",
                          mci_fir.getDoubleWord(0));
-                //ecmdDataBufferBase & FIR_REG = mci_fir;
-                //FAPI_SET_HWP_ERROR(rc, RC_PROC_CEN_FRAMELOCK_FL_P8_FIR_ERR);
-                //break;
+                ecmdDataBufferBase & FIR_REG = mci_fir;
+                FAPI_SET_HWP_ERROR(rc, RC_PROC_CEN_FRAMELOCK_FL_P8_FIR_ERR);
+                break;
             }
         }
-        
+
     } while (0);
-         
+
     return rc;
 }
 
@@ -1214,15 +1086,6 @@ fapi::ReturnCode proc_cen_framelock(const fapi::Target& i_pu_target,
     do
     {
         // validate arguments
-        if (i_args.mcs_pu > PROC_CEN_FRAMELOCK_MAX_MCS_OFFSET)
-        {
-            FAPI_ERR("proc_cen_framelock: Out of range value %d presented for P8 MCS offset argument value!",
-                     i_args.mcs_pu);
-            const proc_cen_framelock_args & ARGS = i_args;
-            FAPI_SET_HWP_ERROR(rc, RC_PROC_CEN_FRAMELOCK_INVALID_ARGS);
-            break;
-        }
-    
         if (i_args.frtl_manual_mem > MBI_CFG_MANUAL_FRTL_FIELD_MASK)
         {
             FAPI_ERR("proc_cen_framelock: Out of range value %d presented for manual FRTL mem argument value!",
@@ -1231,7 +1094,7 @@ fapi::ReturnCode proc_cen_framelock(const fapi::Target& i_pu_target,
             FAPI_SET_HWP_ERROR(rc, RC_PROC_CEN_FRAMELOCK_INVALID_ARGS);
             break;
         }
-    
+
         if (i_args.frtl_manual_pu > MCI_CFG_MANUAL_FRTL_FIELD_MASK)
         {
             FAPI_ERR("proc_cen_framelock: Out of range value %d presented for manual FRTL pu argument value!",
@@ -1248,14 +1111,14 @@ fapi::ReturnCode proc_cen_framelock(const fapi::Target& i_pu_target,
         {
             break;
         }
-        
+
         // execute FRTL
         rc = proc_cen_framelock_run_frtl(i_pu_target, i_mem_target, i_args);
         if (rc)
         {
             break;
         }
-        
+
     } while (0);
 
     // mark HWP exit
diff --git a/src/usr/hwpf/hwp/dmi_training/proc_cen_framelock/proc_cen_framelock.H b/src/usr/hwpf/hwp/dmi_training/proc_cen_framelock/proc_cen_framelock.H
index 47b176c7f..43b038840 100644
--- a/src/usr/hwpf/hwp/dmi_training/proc_cen_framelock/proc_cen_framelock.H
+++ b/src/usr/hwpf/hwp/dmi_training/proc_cen_framelock/proc_cen_framelock.H
@@ -1,7 +1,7 @@
 //  IBM_PROLOG_BEGIN_TAG
 //  This is an automatically generated prolog.
 //
-//  $Source: src/usr/HWPs/dmi_training/proc_cen_framelock.H $
+//  $Source: src/usr/hwpf/hwp/dmi_training/proc_cen_framelock/proc_cen_framelock.H $
 //
 //  IBM CONFIDENTIAL
 //
@@ -20,7 +20,7 @@
 //  Origin: 30
 //
 //  IBM_PROLOG_END
-// $Id: proc_cen_framelock.H,v 1.3 2012/01/06 23:44:51 jmcgill Exp $
+// $Id: proc_cen_framelock.H,v 1.5 2012/04/11 06:24:13 jmcgill Exp $
 // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_cen_framelock.H,v $
 //------------------------------------------------------------------------------
 // *|
@@ -35,6 +35,13 @@
 // *!
 // *! ADDITIONAL COMMENTS :
 // *!
+// *! Runs EDI frame lock procedure and FRTL (frame round trip latency)
+// *! calculation.  Once frame lock is achieved, CRC checking is enabled,
+// *! idle frames will be transmitted in both directions, and host can issue
+// *! inband configuration accesses.
+// *!
+// *! Prerequisites: DMI training is complete & EDI fence bit has been lowered.
+// *!
 //------------------------------------------------------------------------------
 
 #ifndef _PROC_CEN_FRAMELOCK_H_
@@ -64,7 +71,6 @@ enum proc_cen_framelock_channel_init_timeout
 // structure to represent HWP arguments
 struct proc_cen_framelock_args
 {
-    uint8_t mcs_pu; // MCS offset on P8 chip target to operate on
     bool in_error_state; // apply error state overrides to framelock/auto FRTL?
     proc_cen_framelock_channel_init_timeout channel_init_timeout;
                          // channel init timeout value to program for framelock/
@@ -87,20 +93,17 @@ typedef fapi::ReturnCode
 // Constant definitions
 //------------------------------------------------------------------------------
 
-// maximum MCS offset supported by P8 chip design
-const uint8_t PROC_CEN_FRAMELOCK_MAX_MCS_OFFSET = 7;
-
 // framelock/FRTL polling constants
 const uint8_t PROC_CEN_FRAMELOCK_MAX_FRAMELOCK_POLLS = 5;
 const uint8_t PROC_CEN_FRAMELOCK_MAX_FRTL_POLLS = 5;
 
 // P8 MCI Configuration Register field/bit definitions
-const uint32_t MCI_CFG_START_FRAMELOCK_BIT            = 7;
-const uint32_t MCI_CFG_START_FRTL_BIT                 = 8;
-const uint32_t MCI_CFG_AUTO_FRTL_DISABLE_BIT          = 9;
-const uint32_t MCI_CFG_MANUAL_FRTL_START_BIT          = 10;
-const uint32_t MCI_CFG_MANUAL_FRTL_END_BIT            = 16;
-const uint32_t MCI_CFG_MANUAL_FRTL_DONE_BIT           = 17;
+const uint32_t MCI_CFG_START_FRAMELOCK_BIT = 7;
+const uint32_t MCI_CFG_START_FRTL_BIT = 8;
+const uint32_t MCI_CFG_AUTO_FRTL_DISABLE_BIT = 9;
+const uint32_t MCI_CFG_MANUAL_FRTL_START_BIT = 10;
+const uint32_t MCI_CFG_MANUAL_FRTL_END_BIT = 16;
+const uint32_t MCI_CFG_MANUAL_FRTL_DONE_BIT = 17;
 const uint32_t MCI_CFG_CHANNEL_INIT_TIMEOUT_START_BIT = 35;
 const uint32_t MCI_CFG_CHANNEL_INIT_TIMEOUT_END_BIT   = 36;
 
@@ -110,27 +113,27 @@ const uint32_t MCI_CFG_CHANNEL_INIT_TIMEOUT_FIELD_MASK = 0x3;
 // P8 MCI Status Register field/bit definitions
 const uint32_t MCI_STAT_FRAMELOCK_PASS_BIT = 0;
 const uint32_t MCI_STAT_FRAMELOCK_FAIL_BIT = 1;
-const uint32_t MCI_STAT_FRTL_PASS_BIT      = 2;
-const uint32_t MCI_STAT_FRTL_FAIL_BIT      = 3;
+const uint32_t MCI_STAT_FRTL_PASS_BIT = 2;
+const uint32_t MCI_STAT_FRTL_FAIL_BIT = 3;
 
 // Centaur MBI Configuration Register field/bit defintions
-const uint32_t MBI_CFG_FORCE_FRAMELOCK_BIT            = 7;
-const uint32_t MBI_CFG_FORCE_FRTL_BIT                 = 8;
-const uint32_t MBI_CFG_AUTO_FRTL_DISABLE_BIT          = 9;
-const uint32_t MBI_CFG_MANUAL_FRTL_START_BIT          = 10;
-const uint32_t MBI_CFG_MANUAL_FRTL_END_BIT            = 16;
-const uint32_t MBI_CFG_MANUAL_FRTL_DONE_BIT           = 17;
+const uint32_t MBI_CFG_FORCE_FRAMELOCK_BIT = 7;
+const uint32_t MBI_CFG_FORCE_FRTL_BIT = 8;
+const uint32_t MBI_CFG_AUTO_FRTL_DISABLE_BIT = 9;
+const uint32_t MBI_CFG_MANUAL_FRTL_START_BIT = 10;
+const uint32_t MBI_CFG_MANUAL_FRTL_END_BIT = 16;
+const uint32_t MBI_CFG_MANUAL_FRTL_DONE_BIT = 17;
 const uint32_t MBI_CFG_CHANNEL_INIT_TIMEOUT_START_BIT = 35;
-const uint32_t MBI_CFG_CHANNEL_INIT_TIMEOUT_END_BIT   = 36;
+const uint32_t MBI_CFG_CHANNEL_INIT_TIMEOUT_END_BIT = 36;
 
 const uint8_t MBI_CFG_MANUAL_FRTL_FIELD_MASK = 0x7F;
-const uint32_t  MBI_CFG_CHANNEL_INIT_TIMEOUT_FIELD_MASK = 0x3;
+const uint32_t MBI_CFG_CHANNEL_INIT_TIMEOUT_FIELD_MASK = 0x3;
 
 // Centaur MBI Status Register field/bit definitions
 const uint32_t MBI_STAT_FRAMELOCK_PASS_BIT = 0;
 const uint32_t MBI_STAT_FRAMELOCK_FAIL_BIT = 1;
-const uint32_t MBI_STAT_FRTL_PASS_BIT      = 2;
-const uint32_t MBI_STAT_FRTL_FAIL_BIT      = 3;
+const uint32_t MBI_STAT_FRTL_PASS_BIT = 2;
+const uint32_t MBI_STAT_FRTL_FAIL_BIT = 3;
 
 extern "C"
 {
@@ -141,14 +144,12 @@ extern "C"
 
 // function: FAPI proc_cen_framelock HWP entry point, execute P8/Centaur
 //           framelock and FRTL operations
-// parameters: i_pu_target  => P8 chip target
+// parameters: i_pu_target  => P8 MCS chip unit target
 //             i_mem_target => Centaur chip target
 //             i_args       => proc_cen_framelock HWP argumemt structure
 // returns: FAPI_RC_SUCCESS if framelock/FRTL sequence completes successfully,
 //          RC_PROC_CEN_FRAMELOCK_INVALID_ARGS
 //              if invalid/out of range arguments are presented in i_args,
-//          RC_PROC_CEN_FRAMELOCK_INTERNAL_ERR
-//              if internal program logic error is encountered,
 //          RC_PROC_CEN_FRAMELOCK_FL_CEN_FIR_ERR
 //              if Centaur MBI FIR is set during framelock operation,
 //          RC_PROC_CEN_FRAMELOCK_FL_P8_FIR_ERR
@@ -171,7 +172,6 @@ extern "C"
 //          RC_PROC_CEN_FRAMELOCK_FRTL_TIMEOUT_ERR
 //              if MCI/MBI does not post pass/fail indication after FRTL
 //              operation is started,
-//          
 //          else FAPI getscom/putscom return code for failing operation
 fapi::ReturnCode proc_cen_framelock(const fapi::Target& i_pu_target,
                                     const fapi::Target& i_mem_target,
diff --git a/src/usr/hwpf/hwp/dmi_training/proc_cen_framelock/proc_cen_framelock_errors.xml b/src/usr/hwpf/hwp/dmi_training/proc_cen_framelock/proc_cen_framelock_errors.xml
index bfa5fa5c7..39b4ce147 100644
--- a/src/usr/hwpf/hwp/dmi_training/proc_cen_framelock/proc_cen_framelock_errors.xml
+++ b/src/usr/hwpf/hwp/dmi_training/proc_cen_framelock/proc_cen_framelock_errors.xml
@@ -1,7 +1,7 @@
 <!--  IBM_PROLOG_BEGIN_TAG
      This is an automatically generated prolog.
    
-     $Source: src/usr/HWPs/dmi_training/proc_cen_framelock_errors.xml $
+     $Source: src/usr/hwpf/hwp/dmi_training/proc_cen_framelock/proc_cen_framelock_errors.xml $
    
      IBM CONFIDENTIAL
    
@@ -30,12 +30,6 @@
   </hwpError>
   <!-- *********************************************************************** -->
   <hwpError>
-    <rc>RC_PROC_CEN_FRAMELOCK_INTERNAL_ERR</rc>
-    <description>Unexpected internal program logic error.</description>
-    <ffdc>ERR_DATA</ffdc>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
     <rc>RC_PROC_CEN_FRAMELOCK_FL_CEN_FIR_ERR</rc>
     <description>Framelock sequence set FIR bit in Centaur MBI FIR Register.</description>
     <ffdc>FIR_REG</ffdc>