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authorThi Tran <thi@us.ibm.com>2013-10-07 09:42:47 -0500
committerA. Patrick Williams III <iawillia@us.ibm.com>2013-10-07 12:37:52 -0500
commit6b7a65cc7ec85b4937c444dd7f3bb8424b9255ab (patch)
tree8f57a187966043af311c6308ec1114cadb7f33fb /src/usr/hwpf/hwp/dmi_training/mss_getecid
parent9b977e98c99a4334836c2b83e910b25678faa05f (diff)
downloadtalos-hostboot-6b7a65cc7ec85b4937c444dd7f3bb8424b9255ab.tar.gz
talos-hostboot-6b7a65cc7ec85b4937c444dd7f3bb8424b9255ab.zip
INITPROC: Hostboot - from defect SW227059 - get_cen_ecid
Change-Id: Iccdedb39e8d00df0e53605fdc92f111a8b6af14b CQ:SW227059 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/6531 Tested-by: Jenkins Server Reviewed-by: Brian H. Horton <brianh@linux.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/hwpf/hwp/dmi_training/mss_getecid')
-rw-r--r--src/usr/hwpf/hwp/dmi_training/mss_getecid/mss_get_cen_ecid.C421
-rw-r--r--src/usr/hwpf/hwp/dmi_training/mss_getecid/mss_get_cen_ecid.H64
-rw-r--r--src/usr/hwpf/hwp/dmi_training/mss_getecid/mss_get_cen_ecid_decode.C224
-rw-r--r--src/usr/hwpf/hwp/dmi_training/mss_getecid/mss_get_cen_ecid_decode.H104
4 files changed, 645 insertions, 168 deletions
diff --git a/src/usr/hwpf/hwp/dmi_training/mss_getecid/mss_get_cen_ecid.C b/src/usr/hwpf/hwp/dmi_training/mss_getecid/mss_get_cen_ecid.C
index ad7c9398a..13f734e76 100644
--- a/src/usr/hwpf/hwp/dmi_training/mss_getecid/mss_get_cen_ecid.C
+++ b/src/usr/hwpf/hwp/dmi_training/mss_getecid/mss_get_cen_ecid.C
@@ -20,7 +20,7 @@
/* Origin: 30 */
/* */
/* IBM_PROLOG_END_TAG */
-// $Id: mss_get_cen_ecid.C,v 1.22 2013/06/18 22:03:57 mjjones Exp $
+// $Id: mss_get_cen_ecid.C,v 1.28 2013/10/03 08:07:44 bellows Exp $
//------------------------------------------------------------------------------
// *|
// *! (C) Copyright International Business Machines Corp. 2012
@@ -39,6 +39,13 @@
//------------------------------------------------------------------------------
// Version:| Author: | Date: | Comment:
//---------|----------|---------|-----------------------------------------------
+// 1.28 | bellows |02-OCT-13| Minor Review Comments addressed
+// 1.27 | bellows |26-SEP-13| Fixed Minor firware comment
+// 1.26 | bellows |19-SEP-13| Fixed the bug in 1.24
+// 1.25 | bellows |18-SEP-13| Back to 1.23 because of some issue
+// 1.24 | bellows |17-SEP-13| Support for external wrappers and decode
+// 1.23 | bellows |10-SEP-13| For DD2, no partial logic hardware bits
+// 1.22 | jones |18-JUN-13| <attr ec use>
// 1.21 | bellows |14-JUN-13| ECBIT added for case when we can trust the cache enable
// 1.20 | bellows |22-MAY-13| Bluewaterfall matching actual ECID definition
// 1.19 | bellows |15-MAY-13| Added Bluewaterfall handling
@@ -62,82 +69,192 @@
// Includes
//------------------------------------------------------------------------------
#include <fapi.H>
-#include "mss_get_cen_ecid.H"
+#include <mss_get_cen_ecid.H>
extern "C" {
//------------------------------------------------------------------------------
// Function definitions
//------------------------------------------------------------------------------
-
+ fapi::ReturnCode user_ecid( uint8_t & o_ddr_port_status,
+ uint8_t & o_cache_enable,
+ uint8_t & o_centaur_sub_revision,
+ ecid_user_struct & ecid_struct
+ );
// HWP entry point
-fapi::ReturnCode mss_get_cen_ecid(
- const fapi::Target& i_target,
- uint8_t & o_ddr_port_status,
- uint8_t & o_cache_enable,
- uint8_t & o_centaur_sub_revision
- )
-{
+ fapi::ReturnCode mss_get_cen_ecid(
+ const fapi::Target& i_target,
+ uint8_t & o_ddr_port_status,
+ uint8_t & o_cache_enable,
+ uint8_t & o_centaur_sub_revision,
+ ecid_user_struct & ecid_struct
+ )
+ {
// return code
- fapi::ReturnCode rc;
- uint64_t data[2];
- uint32_t rc_ecmd;
+ fapi::ReturnCode rc;
+
+ if(ecid_struct.valid) {
+
+ rc = mss_parse_ecid(ecid_struct.io_ecid,
+ ecid_struct.i_checkL4CacheEnableUnknown,
+ ecid_struct.i_ecidContainsPortLogicBadIndication,
+ ecid_struct.io_ec,
+ o_ddr_port_status,
+ o_cache_enable,
+ o_centaur_sub_revision,
+ ecid_struct.o_psro,
+ ecid_struct.o_bluewaterfall_broken,
+ ecid_struct.o_nwell_misplacement );
+ return rc;
+ }
+
+ uint8_t l_psro;
+
// mark HWP entry
- ecmdDataBufferBase scom(64);
- FAPI_IMP("Entering mss_get_cen_ecid....");
- rc = fapiGetScom( i_target, ECID_PART_0_0x00010000, scom );
- if (rc)
- {
- FAPI_ERR("mss_get_cen_ecid: could not read scom address 0x00010000" );
- return rc;
- }
- scom.reverse();
- data[0] = scom.getDoubleWord(0);
+ ecmdDataBufferBase scom(64);
+ FAPI_IMP("Entering mss_get_cen_ecid....");
+ rc = fapiGetScom( i_target, ECID_PART_0_0x00010000, scom );
+ if (rc)
+ {
+ FAPI_ERR("mss_get_cen_ecid: could not read scom address 0x00010000" );
+ return rc;
+ }
+ scom.reverse();
+ ecid_struct.io_ecid[0] = scom.getDoubleWord(0);
+
//gets the second part of the ecid and sets the attribute
- rc = fapiGetScom( i_target, ECID_PART_1_0x00010001, scom );
- if (rc)
- {
- FAPI_ERR("mss_get_cen_ecid: could not read scom address 0x00010001" );
- return rc;
- }
- scom.reverse();
- data[1] = scom.getDoubleWord(0);
- rc = FAPI_ATTR_SET(ATTR_ECID, &i_target, data);
- if (rc)
- {
- FAPI_ERR("mss_get_cen_ecid: set ATTR_ECID" );
- return rc;
- }
+ rc = fapiGetScom( i_target, ECID_PART_1_0x00010001, scom );
+ if (rc)
+ {
+ FAPI_ERR("mss_get_cen_ecid: could not read scom address 0x00010001" );
+ return rc;
+ }
+ scom.reverse();
+ ecid_struct.io_ecid[1] = scom.getDoubleWord(0);
+
+ uint64_t ecid[2];
+ ecid[0]=ecid_struct.io_ecid[0];
+ ecid[1]=ecid_struct.io_ecid[1];
- //get bit128
- uint8_t bit128=0;
- rc_ecmd = scom.extract(&bit128,63,1);
- bit128 = bit128 >> 7;
- if(rc_ecmd) {
- FAPI_ERR("mss_get_cen_ecid: could not extract cache data_valid bit" );
- rc.setEcmdError(rc_ecmd);
+ rc = FAPI_ATTR_SET(ATTR_ECID, &i_target, ecid);
+ if (rc)
+ {
+ FAPI_ERR("mss_get_cen_ecid: Could not set ATTR_ECID" );
+ return rc;
+ }
+
+ uint8_t l_checkL4CacheEnableUnknown = 0;
+ rc = FAPI_ATTR_GET(ATTR_CENTAUR_EC_CHECK_L4_CACHE_ENABLE_UNKNOWN,
+ &i_target, l_checkL4CacheEnableUnknown);
+ if (!rc.ok()) {
+ FAPI_ERR("mss_get_cen_ecid: could not get ATTR_CENTAUR_EC_CHECK_L4_CACHE_ENABLE_UNKNOWN" );
+ return rc;
+ }
+
+ uint8_t l_ecidContainsPortLogicBadIndication = 0;
+ rc = FAPI_ATTR_GET(ATTR_CENTAUR_EC_ECID_CONTAINS_PORT_LOGIC_BAD_INDICATION,
+ &i_target, l_ecidContainsPortLogicBadIndication);
+ if (!rc.ok()) {
+ FAPI_ERR("mss_get_cen_ecid: could not get ATTR_CENTAUR_EC_ECID_CONTAINS_PORT_LOGIC_BAD_INDICATION" );
+ return rc;
+ }
+
+ uint8_t l_ec;
+ uint8_t l_nwell_misplacement;
+ uint8_t l_bluewaterfall_broken;
+ rc = FAPI_ATTR_GET_PRIVILEGED(ATTR_EC, &i_target, l_ec);
+ if (!rc.ok()) {
+ FAPI_ERR("mss_get_cen_ecid: could not GET PRIVILEGED ATTR_EC" );
+ return rc;
+ }
+ ecid_struct.io_ec=l_ec;
+
+ rc = mss_parse_ecid(ecid, l_checkL4CacheEnableUnknown, l_ecidContainsPortLogicBadIndication, l_ec, o_ddr_port_status, o_cache_enable, o_centaur_sub_revision, l_psro, l_bluewaterfall_broken, l_nwell_misplacement );
+ ecid_struct.o_psro=l_psro;
+ ecid_struct.o_bluewaterfall_broken=l_bluewaterfall_broken;
+ ecid_struct.o_nwell_misplacement=l_nwell_misplacement;
+
+ if (rc)
+ {
+ FAPI_ERR("mss_get_cen_ecid: mss_parse_ecid" );
+ return rc;
+ }
+
+ rc = FAPI_ATTR_SET(ATTR_MSS_PSRO, &i_target, l_psro);
+ if (!rc.ok()) {
+ FAPI_ERR("mss_get_cen_ecid: could not set ATTR_MSS_PSRO" );
+ return rc;
+ }
+
+ rc = FAPI_ATTR_SET(ATTR_MSS_BLUEWATERFALL_BROKEN, &i_target, l_bluewaterfall_broken);
+ if (!rc.ok()) {
+ FAPI_ERR("mss_get_cen_ecid: could not set ATTR_MSS_BLUEWATERFALL_BROKEN" );
+ return rc;
+ }
+
+ rc = FAPI_ATTR_SET(ATTR_MSS_NWELL_MISPLACEMENT, &i_target, l_nwell_misplacement);
+ if (!rc.ok()) {
+ FAPI_ERR("mss_get_cen_ecid: could not set ATTR_MSS_NWELL_MISPLACEMENT" );
+ return rc;
+ }
+
+ // mark HWP exit
+ FAPI_IMP("Exiting mss_get_cen_ecid....");
return rc;
}
- if(bit128 == 1) { // Cache enable bit is valid
+// Decoder function which allows us to pass in just the raw ECID data and get it decoded for in the lab
+// or we can just use it to set up all the needed attributes
- //gets bits 113 and 114 to determine the state of the cache
- uint8_t bit113_114=0;
- rc_ecmd = scom.extract(&bit113_114,48,2);
- bit113_114 = bit113_114 >> 6;
- uint8_t t;
+ fapi::ReturnCode mss_parse_ecid(uint64_t ecid[2],
+ const uint8_t i_checkL4CacheEnableUnknown,
+ const uint8_t i_ecidContainsPortLogicBadIndication,
+ const uint8_t ec,
+ uint8_t & o_ddr_port_status,
+ uint8_t & o_cache_enable,
+ uint8_t & o_centaur_sub_revision,
+ uint8_t & o_psro,
+ uint8_t & o_bluewaterfall_broken,
+ uint8_t & o_nwell_misplacement ){
+//get bit128
+ uint8_t bit128=0;
+ uint32_t rc_ecmd;
+ fapi::ReturnCode rc;
+ ecmdDataBufferBase scom(64);
+
+ o_nwell_misplacement = 0;
+ o_bluewaterfall_broken = 0;
+
+
+ scom.setDoubleWord(0, ecid[1]);
+
+ rc_ecmd = scom.extract(&bit128,63,1);
+ bit128 = bit128 >> 7;
if(rc_ecmd) {
- FAPI_ERR("mss_get_cen_ecid: could not extract cache data" );
+ FAPI_ERR("mss_get_cen_ecid: could not extract cache data_valid bit" );
rc.setEcmdError(rc_ecmd);
return rc;
}
+
+ if(bit128 == 1) { // Cache enable bit is valid
+
+ //gets bits 113 and 114 to determine the state of the cache
+ uint8_t bit113_114=0;
+ rc_ecmd = scom.extract(&bit113_114,48,2);
+ bit113_114 = bit113_114 >> 6;
+ uint8_t t;
+ if(rc_ecmd) {
+ FAPI_ERR("mss_get_cen_ecid: could not extract cache data" );
+ rc.setEcmdError(rc_ecmd);
+ return rc;
+ }
//determines the state of the cache
- if(bit113_114 == 0) t = fapi::ENUM_ATTR_MSS_CACHE_ENABLE_ON;
- else if(bit113_114 == 1) t = fapi::ENUM_ATTR_MSS_CACHE_ENABLE_HALF_A;
- else if(bit113_114 == 2) t = fapi::ENUM_ATTR_MSS_CACHE_ENABLE_HALF_B;
- else t = fapi::ENUM_ATTR_MSS_CACHE_ENABLE_OFF;
+ if(bit113_114 == 0) t = fapi::ENUM_ATTR_MSS_CACHE_ENABLE_ON;
+ else if(bit113_114 == 1) t = fapi::ENUM_ATTR_MSS_CACHE_ENABLE_HALF_A;
+ else if(bit113_114 == 2) t = fapi::ENUM_ATTR_MSS_CACHE_ENABLE_HALF_B;
+ else t = fapi::ENUM_ATTR_MSS_CACHE_ENABLE_OFF;
// Centaur DD1.X chips have an ECBIT in bit127, if this is zero then the
// cache enable bits are in an unknown state. DD2.X chips and higher do not
@@ -157,130 +274,126 @@ fapi::ReturnCode mss_get_cen_ecid(
// Cronus actually uses its config file for the 4 values and checks the hardware via the get_cen_ecid
// procedure during step 11 to make sure the end user does not enable a disable cache
// Under cronus, the Unk information is only printed to the screen
- uint8_t l_checkL4CacheEnableUnknown = 0;
- rc = FAPI_ATTR_GET(ATTR_CENTAUR_EC_CHECK_L4_CACHE_ENABLE_UNKNOWN,
- &i_target, l_checkL4CacheEnableUnknown);
- if (!rc.ok()) {
- FAPI_ERR("mss_get_cen_ecid: could not get CHECK_L4_CACHE_ENABLE_VALIDITY attr" );
- return rc;
+
+ if (i_checkL4CacheEnableUnknown)
+ {
+ uint8_t bit127 = 0;
+ rc_ecmd = scom.extract(&bit127,62,1);
+ bit127 = bit127 >> 7;
+ if(rc_ecmd) {
+ FAPI_ERR("mss_get_cen_ecid: could not extract ECBIT bit" );
+ rc.setEcmdError(rc_ecmd);
+ return rc;
+ }
+ if(bit127 == 0) {
+ FAPI_INF("mss_get_cen_ecid: Cache Enable Bits are in Unknown State");
+ if(bit113_114 == 0) t = fapi::ENUM_ATTR_MSS_CACHE_ENABLE_UNK_ON;
+ else if(bit113_114 == 1) t = fapi::ENUM_ATTR_MSS_CACHE_ENABLE_UNK_HALF_A;
+ else if(bit113_114 == 2) t = fapi::ENUM_ATTR_MSS_CACHE_ENABLE_UNK_HALF_B;
+ else t = fapi::ENUM_ATTR_MSS_CACHE_ENABLE_UNK_OFF;
+ }
+ else
+ {
+ FAPI_INF("mss_get_cen_ecid: Cache Enable Bits are in Known State");
+ }
+ }
+
+ o_cache_enable = t;
+ }
+ else {
+ FAPI_INF("Cache Disbled because eDRAM data bits are assumed to be bad");
+ o_cache_enable = fapi::ENUM_ATTR_MSS_CACHE_ENABLE_OFF;
}
- if (l_checkL4CacheEnableUnknown)
- {
- uint8_t bit127 = 0;
- rc_ecmd = scom.extract(&bit127,62,1);
- bit127 = bit127 >> 7;
+ //reads in the ECID info for whether a DDR port side is good or bad
+ //This is only defined for DD1.x parts
+ if(i_ecidContainsPortLogicBadIndication ) {
+ rc_ecmd = scom.extract(&o_ddr_port_status,50,2);
+ o_ddr_port_status = o_ddr_port_status >> 6;
if(rc_ecmd) {
- FAPI_ERR("mss_get_cen_ecid: could not extract ECBIT bit" );
+ FAPI_ERR("mss_get_cen_ecid: could not extract DDR status data" );
rc.setEcmdError(rc_ecmd);
return rc;
}
- if(bit127 == 0) {
- FAPI_INF("mss_get_cen_ecid: Cache Enable Bits are in Unknown State");
- if(bit113_114 == 0) t = fapi::ENUM_ATTR_MSS_CACHE_ENABLE_UNK_ON;
- else if(bit113_114 == 1) t = fapi::ENUM_ATTR_MSS_CACHE_ENABLE_UNK_HALF_A;
- else if(bit113_114 == 2) t = fapi::ENUM_ATTR_MSS_CACHE_ENABLE_UNK_HALF_B;
- else t = fapi::ENUM_ATTR_MSS_CACHE_ENABLE_UNK_OFF;
- }
- else
- {
- FAPI_INF("mss_get_cen_ecid: Cache Enable Bits are in Known State");
- }
+ }
+ else {
+ o_ddr_port_status = 0x0; // logic in both ports are good
}
- o_cache_enable = t;
- }
- else {
- FAPI_INF("Cache Disbled because eDRAM data bits are assumed to be bad");
- o_cache_enable = fapi::ENUM_ATTR_MSS_CACHE_ENABLE_OFF;
- }
-
- //reads in the ECID info for whether a DDR port side is good or bad
- rc_ecmd = scom.extract(&o_ddr_port_status,50,2);
- o_ddr_port_status = o_ddr_port_status >> 6;
- if(rc_ecmd) {
- FAPI_ERR("mss_get_cen_ecid: could not extract DDR status data" );
- rc.setEcmdError(rc_ecmd);
- return rc;
- }
//116..123 average PSRO from 85C wafer test
- uint8_t bit117_124=0;
- rc_ecmd = scom.extract(&bit117_124,52,8);
- if(rc_ecmd) {
- FAPI_ERR("mss_get_cen_ecid: could not extract PSRO" );
- rc.setEcmdError(rc_ecmd);
- return rc;
- }
- rc = FAPI_ATTR_SET(ATTR_MSS_PSRO, &i_target, bit117_124);
- if (!rc.ok()) {
- FAPI_ERR("mss_get_cen_ecid: could not set ATTR_MSS_PSRO" );
- return rc;
- }
+ uint8_t bit117_124=0;
+ rc_ecmd = scom.extract(&bit117_124,52,8);
+ if(rc_ecmd) {
+ FAPI_ERR("mss_get_cen_ecid: could not extract PSRO" );
+ rc.setEcmdError(rc_ecmd);
+ return rc;
+ }
+ o_psro=bit117_124;
// read the bit in the ecid to see if we are a DD1.01
// Bit 124 DD1.01 Indicator Bit. Set to '1' for DD1.01 devices
- uint8_t bit125 =0;
- rc_ecmd = scom.extract(&bit125,60,1);
- bit125 = bit125 >> 7;
- if(rc_ecmd) {
- FAPI_ERR("mss_get_cen_ecid: could not extract dd1.01 indicator bit" );
- rc.setEcmdError(rc_ecmd);
- return rc;
- }
- o_centaur_sub_revision=bit125;
+ uint8_t bit125 =0;
+ rc_ecmd = scom.extract(&bit125,60,1);
+ bit125 = bit125 >> 7;
+ if(rc_ecmd) {
+ FAPI_ERR("mss_get_cen_ecid: could not extract dd1.01 indicator bit" );
+ rc.setEcmdError(rc_ecmd);
+ return rc;
+ }
+ o_centaur_sub_revision=bit125;
// The ecid contains the chip's subrevision, changes in the subrevision should not
// change firmware behavior but for the exceptions, update attributes to indicate
// those behaviors
- uint8_t ec;
- uint8_t l_nwell_misplacement = 0;
- rc = FAPI_ATTR_GET_PRIVILEGED(ATTR_EC, &i_target, ec);
- if (!rc.ok()) {
- FAPI_ERR("mss_get_cen_ecid: could not GET PRIVILEGED ATTR_EC" );
- return rc;
- }
- if ((ec == 0x10) && (o_centaur_sub_revision < 1))
- {
+ if ((ec == 0x10) && (o_centaur_sub_revision < 1))
+ {
// For DD1.00, the transistor misplaced in the nwell needs some setting adjustments to get it to function
// after DD1.00, we no longer need to make that adjustment
- l_nwell_misplacement = 1;
- }
+ o_nwell_misplacement = 1;
+ }
- uint8_t bit126 =0;
- rc_ecmd = scom.extract(&bit126,61,1);
- bit126 = bit126 >> 7;
- if(rc_ecmd) {
- FAPI_ERR("mss_get_cen_ecid: could not extract dd1.03 indicator bit" );
- rc.setEcmdError(rc_ecmd);
- return rc;
- }
- uint8_t l_bluewaterfall_broken = 0;
- if (ec == 0x10) {
- if(bit126 == 0)
- {
- // on and after DD1.03, we no longer need to make adjustments due to the bluewaterfall - this is before
- l_bluewaterfall_broken = 1;
+ uint8_t bit126 =0;
+ rc_ecmd = scom.extract(&bit126,61,1);
+ bit126 = bit126 >> 7;
+ if(rc_ecmd) {
+ FAPI_ERR("mss_get_cen_ecid: could not extract dd1.03 indicator bit" );
+ rc.setEcmdError(rc_ecmd);
+ return rc;
}
- else {
- l_nwell_misplacement = 0; // Assume if the bluewaterfall is fixed, then the nwell is also fixed
+
+ // we have to look at both the bluewaterfall and the n-well misplacement to determine the proper values of the n-well
+ if (ec == 0x10) {
+ if(bit126 == 0)
+ {
+ // on and after DD1.03, we no longer need to make adjustments due to the bluewaterfall - this is before
+ o_bluewaterfall_broken = 1;
+ }
+ else {
+ o_nwell_misplacement = 0; // Assume if the bluewaterfall is fixed, then the nwell is also fixed
+ }
}
- }
- rc = FAPI_ATTR_SET(ATTR_MSS_BLUEWATERFALL_BROKEN, &i_target, l_bluewaterfall_broken);
- if (!rc.ok()) {
- FAPI_ERR("mss_get_cen_ecid: could not set ATTR_MSS_BLUEWATERFALL_BROKEN" );
+
return rc;
}
- // we have to look at both the bluewaterfall and the n-well misplacement to determine the proper valuse of the n-well
- rc = FAPI_ATTR_SET(ATTR_MSS_NWELL_MISPLACEMENT, &i_target, l_nwell_misplacement);
- if (!rc.ok()) {
- FAPI_ERR("mss_get_cen_ecid: could not set ATTR_MSS_NWELL_MISPLACEMENT" );
- return rc;
+ fapi::ReturnCode user_ecid( uint8_t & o_ddr_port_status,
+ uint8_t & o_cache_enable,
+ uint8_t & o_centaur_sub_revision,
+ ecid_user_struct & ecid_struct
+ ){
+
+ return mss_parse_ecid(ecid_struct.io_ecid,
+ ecid_struct.i_checkL4CacheEnableUnknown,
+ ecid_struct.i_ecidContainsPortLogicBadIndication,
+ ecid_struct.io_ec,
+ o_ddr_port_status,
+ o_cache_enable,
+ o_centaur_sub_revision,
+ ecid_struct.o_psro,
+ ecid_struct.o_bluewaterfall_broken,
+ ecid_struct.o_nwell_misplacement );
+
}
- // mark HWP exit
- FAPI_IMP("Exiting mss_get_cen_ecid....");
- return rc;
-}
} // extern "C"
diff --git a/src/usr/hwpf/hwp/dmi_training/mss_getecid/mss_get_cen_ecid.H b/src/usr/hwpf/hwp/dmi_training/mss_getecid/mss_get_cen_ecid.H
index 1c52667fc..c89d66956 100644
--- a/src/usr/hwpf/hwp/dmi_training/mss_getecid/mss_get_cen_ecid.H
+++ b/src/usr/hwpf/hwp/dmi_training/mss_getecid/mss_get_cen_ecid.H
@@ -20,7 +20,7 @@
/* Origin: 30 */
/* */
/* IBM_PROLOG_END_TAG */
-// $Id: mss_get_cen_ecid.H,v 1.8 2013/03/26 15:53:59 bellows Exp $
+// $Id: mss_get_cen_ecid.H,v 1.11 2013/10/03 08:07:47 bellows Exp $
//------------------------------------------------------------------------------
// *|
// *! (C) Copyright International Business Machines Corp. 2012
@@ -41,6 +41,8 @@
//------------------------------------------------------------------------------
// Version:| Author: | Date: | Comment:
//---------|----------|---------|-----------------------------------------------
+// 1.10 | bellows |02-OCT-13| Minor Review Comments addressed
+// 1.9 | bellows |17-SEP-13| Allow for external wrapper parsing
// 1.8 | bellows |26-MAR-13| Reviewer found updates
// 1.7 | bellows |22-MAR-13| Changed commented name of ECID Attribute per Firmware request
// 1.6 | bellows |21-JAN-13| added in sub revision reader
@@ -55,25 +57,43 @@
//------------------------------------------------------------------------------
#include <fapi.H>
-#include "cen_scom_addresses.H"
+#include <cen_scom_addresses.H>
//defines enumerators
enum mss_get_cen_ecid_ddr_status
{
- MSS_GET_CEN_ECID_DDR_STATUS_ALL_GOOD = 0,
- MSS_GET_CEN_ECID_DDR_STATUS_MBA1_BAD = 1,
- MSS_GET_CEN_ECID_DDR_STATUS_MBA0_BAD = 2,
- MSS_GET_CEN_ECID_DDR_STATUS_ALL_BAD = 3,
+ MSS_GET_CEN_ECID_DDR_STATUS_ALL_GOOD = 0,
+ MSS_GET_CEN_ECID_DDR_STATUS_MBA1_BAD = 1,
+ MSS_GET_CEN_ECID_DDR_STATUS_MBA0_BAD = 2,
+ MSS_GET_CEN_ECID_DDR_STATUS_ALL_BAD = 3,
};
//------------------------------------------------------------------------------
// Structure definitions
//------------------------------------------------------------------------------
+class ecid_user_struct {
+public:
+ uint8_t valid;
+ uint8_t i_checkL4CacheEnableUnknown;
+ uint8_t i_ecidContainsPortLogicBadIndication;
+ uint8_t i_user_defined;
+ uint8_t io_ec;
+ uint64_t io_ecid[2];
+ uint8_t o_psro;
+ uint8_t o_bluewaterfall_broken;
+ uint8_t o_nwell_misplacement;
+
+ ecid_user_struct();
+};
+
+inline ecid_user_struct::ecid_user_struct() { valid=0; i_checkL4CacheEnableUnknown=0; i_ecidContainsPortLogicBadIndication=0; i_user_defined=0; io_ec=0; io_ecid[0]=0; io_ecid[1]=0; }
+
// function pointer typedef definition for HWP call support
typedef fapi::ReturnCode
-(*mss_get_cen_ecid_FP_t)(const fapi::Target& i_target, uint8_t & o_ddr_port_status, uint8_t & o_cache_enable, uint8_t & o_centaur_sub_revision
-);
+(*mss_get_cen_ecid_FP_t)(const fapi::Target& i_target, uint8_t & o_ddr_port_status, uint8_t & o_cache_enable, uint8_t & o_centaur_sub_revision, ecid_user_struct & user_data
+
+ );
//------------------------------------------------------------------------------
@@ -93,13 +113,29 @@ extern "C"
// Updates attributes: ATTR_ECID[2] -> bits 1-64 and 65-128 of the ECID
// ATTR_MSS_PSRO -> average PSRO from 85C wafer test
// ATTR_MSS_NWELL_MISPLACEMENT -> indicates if nwell defect in hardware
-fapi::ReturnCode mss_get_cen_ecid(
- const fapi::Target& i_target,
- uint8_t & o_ddr_port_status,
- uint8_t & o_cache_enable,
- uint8_t & o_centaur_sub_revision
+ fapi::ReturnCode mss_get_cen_ecid(
+ const fapi::Target& i_target,
+ uint8_t & o_ddr_port_status,
+ uint8_t & o_cache_enable,
+ uint8_t & o_centaur_sub_revision,
+ ecid_user_struct & user_data
+
+ );
+
+ fapi::ReturnCode mss_parse_ecid(
+ uint64_t ecid[2], // input ECID in bit order
+ const uint8_t l_checkL4CacheEnableUnknown, // input L4CacheEnableUnknown is possible
+ const uint8_t l_ecidContainsPortLogicBadIndication, // input logic can be bad
+ const uint8_t ec, // input ec of chip
+ uint8_t & ddr_port, //output ddr ports are non functional
+ uint8_t & cache_enable_o, // output cache is functional or not
+ uint8_t & centaur_sub_revision_o, // output sub revsion number
+ uint8_t & o_psro, // output psro
+ uint8_t & o_bluewaterfall_broken, // output blue waterfall broken
+ uint8_t & o_nwell_misplacement // output nwell misplacement
+ );
+
- );
} // extern "C"
diff --git a/src/usr/hwpf/hwp/dmi_training/mss_getecid/mss_get_cen_ecid_decode.C b/src/usr/hwpf/hwp/dmi_training/mss_getecid/mss_get_cen_ecid_decode.C
new file mode 100644
index 000000000..2d83f9854
--- /dev/null
+++ b/src/usr/hwpf/hwp/dmi_training/mss_getecid/mss_get_cen_ecid_decode.C
@@ -0,0 +1,224 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/hwpf/hwp/dmi_training/mss_getecid/mss_get_cen_ecid_decode.C $ */
+/* */
+/* IBM CONFIDENTIAL */
+/* */
+/* COPYRIGHT International Business Machines Corp. 2013 */
+/* */
+/* p1 */
+/* */
+/* Object Code Only (OCO) source materials */
+/* Licensed Internal Code Source Materials */
+/* IBM HostBoot Licensed Internal Code */
+/* */
+/* The source code for this program is not published or otherwise */
+/* divested of its trade secrets, irrespective of what has been */
+/* deposited with the U.S. Copyright Office. */
+/* */
+/* Origin: 30 */
+/* */
+/* IBM_PROLOG_END_TAG */
+// $Id: mss_get_cen_ecid_decode.C,v 1.6 2013/10/07 11:42:06 bellows Exp $
+//------------------------------------------------------------------------------
+// *|
+// *! (C) Copyright International Business Machines Corp. 2013
+// *! All Rights Reserved -- Property of IBM
+// *! *** IBM Confidential ***
+// *|
+// *! TITLE : mss_get_cen_ecid_decode.C
+// *! DESCRIPTION : Get ECID string from target using SCOM's
+// *!
+// *! OWNER NAME : Mark Bellows Email: bellows@us.ibm.com
+// *! Copied From : Joe McGill's proc_cleanup code
+// *!
+//------------------------------------------------------------------------------
+//------------------------------------------------------------------------------
+// CHANGE HISTORY:
+//------------------------------------------------------------------------------
+// Version:| Author: | Date: | Comment:
+//---------|----------|---------|-----------------------------------------------
+// 1.6 | thi |05-OCT-13| Fix compiler error
+// 1.5 | bellows |02-OCT-13| Minor Review Comments addressed
+// 1.4 | bellows |27-SEP-13| Removed std::string
+// 1.3 | bellows |26-SEP-13| Firware comments and error checking added
+// 1.2 | bellows |25-SEP-13| Changed the format so that the ECID bits are
+// | | | broken into two lines.
+// 1.1 | bellows |17-SEP-13| Initial version
+
+//------------------------------------------------------------------------------
+// Includes
+//------------------------------------------------------------------------------
+#include <fapi.H>
+#include <mss_get_cen_ecid_decode.H>
+
+using namespace fapi;
+
+extern "C" {
+
+ fapi::ReturnCode get_ecid_char(uint8_t c, char *creturn); // print helping function
+ void get_ecid_checksum(char ECID[13]);
+
+//------------------------------------------------------------------------------
+// Function definitions
+//------------------------------------------------------------------------------
+// HWP entry point
+ fapi::ReturnCode mss_get_cen_ecid_decode(
+ uint8_t & i_ddr_port_status,
+ uint8_t & i_cache_enable,
+ uint8_t & i_centaur_sub_revision,
+ ecid_user_struct & i_user_info,
+ char * o_display_string
+ )
+ {
+ // return code
+ fapi::ReturnCode rc;
+
+
+//void decode_base_code(uint64_t ecid[2], uint8_t ddr_port, uint8_t cache_enable_o, uint8_t centaur_sub_revision_o, uint8_t nwell, uint8_t waterfall_broken, uint8_t user_input, uint8_t psro, uint8_t i_ec) {
+ //checks the DDR ports and outputs the results
+ //prints out all of the information
+ uint32_t t = i_user_info.io_ecid[0];
+ ecmdDataBufferBase temp(64);
+ uint64_t data[2];
+ data[0]=i_user_info.io_ecid[0];
+ data[1]=i_user_info.io_ecid[1];
+ char ecid_char;
+ uint8_t c;
+ float chip_version;
+ char ECID[13];
+ for(int i=0;i<13;i++) ECID[i]='\0';
+ uint8_t x;
+ uint8_t y;
+ char temp_string[200];
+ uint32_t rc_num = 0;
+
+ o_display_string[0]='\0';
+
+
+ rc_num |= temp.insert(&t,32,32,0);
+ t = data[0] >> 32;
+ rc_num |= temp.insert(&t,0,32,0);
+ for(uint8_t i=0;i<10;i++) {
+ rc_num |= temp.extract(&c,4+i*6,6);
+ c = c >> 2;
+ rc = get_ecid_char( c, &ecid_char);
+ if(rc) {
+ FAPI_ERR("get_ecid_char returned with an error");
+ return rc;
+ }
+ ECID[i]=ecid_char;
+ }
+ get_ecid_checksum(ECID);
+
+ //generates the x and y location from the ecid
+ t = data[1];
+ rc_num |= temp.insert(&t,32,32,0);
+ t = data[1] >> 32;
+ rc_num |= temp.insert(&t,0,32,0);
+ rc_num |= temp.extract(&x,0,8);
+ rc_num |= temp.extract(&y,8,8);
+
+ chip_version=i_user_info.io_ec/0x10;
+
+ if(i_user_info.io_ec < 0x20) {
+
+ if(!i_user_info.o_nwell_misplacement) chip_version = 1.01;
+ if(!i_user_info.o_bluewaterfall_broken) chip_version=1.10;
+
+ }
+
+
+ if(!(i_user_info.i_user_defined & CSV)) {
+ sprintf(temp_string, "ECID(1:64) 0x%016lx\n", i_user_info.io_ecid[0]);
+ strcat(o_display_string, temp_string);
+ sprintf(temp_string, "ECID(65:128) 0x%016lx\n", i_user_info.io_ecid[1]);
+ strcat(o_display_string, temp_string);
+ sprintf(temp_string, " Wafer ID: %s\n", ECID);
+ strcat(o_display_string, temp_string);
+ sprintf(temp_string, " Chip X/Y loc: x:%d y:%d\n",x,y);
+ strcat(o_display_string, temp_string);
+ sprintf(temp_string, " Chip version: DD%.02f\n",chip_version);
+ strcat(o_display_string, temp_string);
+
+ if(i_cache_enable == fapi::ENUM_ATTR_MSS_CACHE_ENABLE_ON) sprintf(temp_string, " All eDRAMs Halves are good\n"); // Note A is Even, B is Odd
+ else if(i_cache_enable == fapi::ENUM_ATTR_MSS_CACHE_ENABLE_HALF_A) sprintf(temp_string, " eDRAM Half A is good. eDRAM Half B is bad\n");
+ else if(i_cache_enable == fapi::ENUM_ATTR_MSS_CACHE_ENABLE_HALF_B) sprintf(temp_string, " eDRAM Half A is bad. eDRAM Half B is good\n");
+ else if(i_cache_enable == fapi::ENUM_ATTR_MSS_CACHE_ENABLE_OFF) sprintf(temp_string, " All eDRAMs Halves are bad\n");
+ else if(i_cache_enable == fapi::ENUM_ATTR_MSS_CACHE_ENABLE_UNK_ON) sprintf(temp_string, " All eDRAMs Halves are full unk good\n");
+ else if(i_cache_enable == fapi::ENUM_ATTR_MSS_CACHE_ENABLE_UNK_HALF_A) sprintf(temp_string, " All eDRAMs A or Even unk good\n");
+ else if(i_cache_enable == fapi::ENUM_ATTR_MSS_CACHE_ENABLE_UNK_HALF_B) sprintf(temp_string, " All eDRAMs B or odd unk good\n");
+ else sprintf(temp_string, " All eDRAMs Halves are full unk bad\n");
+ strcat(o_display_string, temp_string);
+
+ if(i_ddr_port_status == 0) sprintf(temp_string, " All DDR Ports are good\n");
+ else if(i_ddr_port_status == 1) sprintf(temp_string, " DDR Port 0/1 is good. DDR Port 2/3 is bad\n");
+ else if(i_ddr_port_status == 2) sprintf(temp_string, " DDR Port 0/1 is bad. DDR Port 2/3 is good\n");
+ else sprintf(temp_string, " All DDR Ports are bad\n");
+ strcat(o_display_string, temp_string);
+
+ sprintf(temp_string, " PSRO: 0x%02x %f ps\n",i_user_info.o_psro, i_user_info.o_psro*0.025+7.5);
+ strcat(o_display_string, temp_string);
+ }
+ //prints out a CSV
+ else {
+ uint8_t repair,bad_edram_a,bad_edram_b;
+ uint8_t bad_ddr_port01,bad_ddr_port23;
+ if(i_cache_enable == fapi::ENUM_ATTR_MSS_CACHE_ENABLE_ON) {repair=1;bad_edram_a=0;bad_edram_b=0; }
+ else if(i_cache_enable == fapi::ENUM_ATTR_MSS_CACHE_ENABLE_HALF_A) {repair=1;bad_edram_a=0;bad_edram_b=1; }
+ else if(i_cache_enable == fapi::ENUM_ATTR_MSS_CACHE_ENABLE_HALF_B) {repair=1;bad_edram_a=1;bad_edram_b=0; }
+ else if(i_cache_enable == fapi::ENUM_ATTR_MSS_CACHE_ENABLE_OFF) {repair=1;bad_edram_a=1;bad_edram_b=1; }
+// else if(cache_enable_o == fapi::ENUM_ATTR_MSS_CACHE_ENABLE_UNK_ON) {repair=0;bad_edram_a=0;bad_edram_b=0; }
+// else if(cache_enable_o == fapi::ENUM_ATTR_MSS_CACHE_ENABLE_UNK_HALF_A) {repair=0;bad_edram_a=0;bad_edram_b=1; }
+// else if(cache_enable_o == fapi::ENUM_ATTR_MSS_CACHE_ENABLE_UNK_HALF_B) {repair=0;bad_edram_a=1;bad_edram_b=0; }
+ else {repair=0;bad_edram_a=1;bad_edram_b=1; }
+
+ if(i_ddr_port_status == 0) { bad_ddr_port01 = 0 ; bad_ddr_port23 = 0; }
+ else if(i_ddr_port_status == 1) { bad_ddr_port01 = 0 ; bad_ddr_port23 = 1; }
+ else if(i_ddr_port_status == 2) { bad_ddr_port01 = 1 ; bad_ddr_port23 = 0; }
+ else { bad_ddr_port01 = 1 ; bad_ddr_port23 = 1; }
+ sprintf(o_display_string, "%s,%d,%d,%0.2f,%d,%d,%d,%d,%d,%f ps\n",ECID,x,y,chip_version,repair,bad_edram_a,bad_edram_b,bad_ddr_port01,bad_ddr_port23,((float)i_user_info.o_psro*0.025+7.5));
+ }
+
+ if(rc_num) {
+ FAPI_ERR("Error occured during databuffer manipulations");
+ rc.setEcmdError(rc);
+ }
+
+ return rc;
+ }
+
+//gets the character for the ECID
+ fapi::ReturnCode get_ecid_char(uint8_t c, char *creturn) {
+ //c is a number, so use the offset for a number
+ if(c < 10) {*creturn = (char)(c+48);}
+ else {*creturn = (char)(c+55);}
+ return fapi::FAPI_RC_SUCCESS;
+ }
+
+//gets the checksum, the last two characters, in the ecid string
+ void get_ecid_checksum(char ECID[13]) {
+ char rtn[13];
+ for(uint32_t i = 0; i < 10; i++) rtn[i] = ECID[i];
+ rtn[10]='A';
+ rtn[11]='0';
+ rtn[12]='\0';
+ int sum=0;
+ for (uint32_t i = 0; i < 12; i++)
+ {
+ sum = ((sum * 8) + (rtn[i] - 32)) % 59;
+ }
+ if (sum != 0) {
+ int adjust = 59 - sum;
+ rtn[11] += adjust & 7;
+ adjust >>= 3;
+ rtn[10] += adjust & 7;
+ }
+ for (uint32_t i = 0; i < 13; i++) ECID[i] = rtn[i];
+ }
+
+
+
+
+} // extern "C"
diff --git a/src/usr/hwpf/hwp/dmi_training/mss_getecid/mss_get_cen_ecid_decode.H b/src/usr/hwpf/hwp/dmi_training/mss_getecid/mss_get_cen_ecid_decode.H
new file mode 100644
index 000000000..f45ed86b2
--- /dev/null
+++ b/src/usr/hwpf/hwp/dmi_training/mss_getecid/mss_get_cen_ecid_decode.H
@@ -0,0 +1,104 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/hwpf/hwp/dmi_training/mss_getecid/mss_get_cen_ecid_decode.H $ */
+/* */
+/* IBM CONFIDENTIAL */
+/* */
+/* COPYRIGHT International Business Machines Corp. 2013 */
+/* */
+/* p1 */
+/* */
+/* Object Code Only (OCO) source materials */
+/* Licensed Internal Code Source Materials */
+/* IBM HostBoot Licensed Internal Code */
+/* */
+/* The source code for this program is not published or otherwise */
+/* divested of its trade secrets, irrespective of what has been */
+/* deposited with the U.S. Copyright Office. */
+/* */
+/* Origin: 30 */
+/* */
+/* IBM_PROLOG_END_TAG */
+// $Id: mss_get_cen_ecid_decode.H,v 1.3 2013/10/03 08:07:37 bellows Exp $
+//------------------------------------------------------------------------------
+// *|
+// *! (C) Copyright International Business Machines Corp. 2013
+// *! All Rights Reserved -- Property of IBM
+// *! *** IBM Confidential ***
+// *|
+// *! TITLE : mss_get_cen_ecid_decode.H
+// *! DESCRIPTION : Decode the ECID into a string
+// *!
+// *! OWNER NAME : Mark Bellows Email: bellows@us.ibm.com
+// *! Copied From : Joe McGill's proc_cleanup code
+// *!
+// *! ADDITIONAL COMMENTS:
+// *!
+// *!
+//------------------------------------------------------------------------------
+// CHANGE HISTORY:
+//------------------------------------------------------------------------------
+// Version:| Author: | Date: | Comment:
+//---------|----------|---------|-----------------------------------------------
+// 1.3 | bellows |02-OCT-13| Minor Review Comments addressed
+// 1.2 | bellows |24-SEP-13| Fixed typo
+// 1.1 | bellows |17-SEP-13| Original Program
+
+#ifndef _MSS_GET_CEN_ECID_DECODE_H_
+#define _MSS_GET_CEN_ECID_DECODE_H_
+
+//------------------------------------------------------------------------------
+// Includes
+//------------------------------------------------------------------------------
+
+#include <fapi.H>
+#include <mss_get_cen_ecid.H>
+
+
+
+// function pointer typedef definition for HWP call support
+typedef fapi::ReturnCode
+(*mss_get_cen_ecid_decode_FP_t)(uint8_t & i_ddr_port_status, uint8_t & i_cache_enable, uint8_t & i_centaur_sub_revision, ecid_user_struct & i_user_data, char *o_display_string
+ );
+
+const int MSS_GET_CEN_ECID_DECODE_STRING_LENGTH=1000;
+
+//void decode_base_code(uint64_t ecid[2], uint8_t ddr_port, uint8_t cache_enable_o, uint8_t centaur_sub_revision_o, uint8_t o_nwell_misplacement, uint8_t o_bluewaterfall_broken, uint8_t user_defined, uint8_t psro, uint8_t i_ec );
+//ReturnCode get_ecid_char(uint8_t c, char *creturn);
+//void get_ecid_checksum(char ECID[12]);
+
+enum user_flags {
+ USER_INPUT_ECID = 1,
+ CSV = 2,
+ COMMENT = 4,
+};
+
+//------------------------------------------------------------------------------
+// Function prototypes
+//------------------------------------------------------------------------------
+
+extern "C"
+{
+
+// function: FAPI mss_get_cen_ecid_decode HWP entry point
+// parameters:
+// &o_ddr_port_status => indicates if the MBA's are bad, with MBA 1 being the rightmost bit and MBA 0 being the next to right most bit
+// &o_cache_enable => what it would have set the cache enable attribute to if it sets attributes
+// &o_centaur_sub_revision => the sub revision indicator between DD1.0 and DD1.01
+// &o_user_data => holder for additional information for printing
+// &o_display_string -> output string- max of MSS_GET_CEN_ECID_DECODE_STRING_LENGTH length
+// returns: FAPI_RC_SUCCESS if FBC stop is deasserted at end of execution
+// else FAPI return code for failing operation
+ fapi::ReturnCode mss_get_cen_ecid_decode(
+ uint8_t & i_ddr_port_status,
+ uint8_t & i_cache_enable,
+ uint8_t & i_centaur_sub_revision,
+ ecid_user_struct & i_user_data,
+ char * o_display_string
+
+ );
+
+} // extern "C"
+
+#endif // _MSS_GET_CEN_ECID_DECODE_H_
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