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author | Dean Sanner <dsanner@us.ibm.com> | 2013-07-10 09:28:50 -0500 |
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committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2013-08-21 15:37:33 -0500 |
commit | a6f46d0a9461b96781bc85c9fd82c24d14b5ce42 (patch) | |
tree | dfa696458e593a61d2c73b6de54a0e05d9a7a5cb /src/usr/hwpf/hwp/core_activate/core_activate.C | |
parent | 486fc31f3be1c268b1bf6012c9d0910dc2012c5a (diff) | |
download | talos-hostboot-a6f46d0a9461b96781bc85c9fd82c24d14b5ce42.tar.gz talos-hostboot-a6f46d0a9461b96781bc85c9fd82c24d14b5ce42.zip |
Hostboot support for running Sapphire on FSP
Key Changes:
--Distinguish between Sapphire SPless/FSP
--Place HOMER image at top of memory
--Allow SPIRA to be outside of 128MB "HDAT" window
--Don't clear the PORE BARs in Sapphire mode
--Force payload address to 0 if in sapphire mode
Change-Id: I1e4d5bb68dad51e4408a568217b08a6aadef2494
RTC: 73481
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/5361
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/hwpf/hwp/core_activate/core_activate.C')
-rw-r--r-- | src/usr/hwpf/hwp/core_activate/core_activate.C | 86 |
1 files changed, 11 insertions, 75 deletions
diff --git a/src/usr/hwpf/hwp/core_activate/core_activate.C b/src/usr/hwpf/hwp/core_activate/core_activate.C index 9524e0069..d3433f3f4 100644 --- a/src/usr/hwpf/hwp/core_activate/core_activate.C +++ b/src/usr/hwpf/hwp/core_activate/core_activate.C @@ -50,6 +50,7 @@ #include <targeting/common/utilFilter.H> #include <targeting/namedtarget.H> #include <targeting/attrsync.H> +#include <runtime/runtime.H> // fapi support #include <fapi.H> @@ -331,84 +332,10 @@ void* call_host_activate_slave_cores( void *io_pArgs ) } else { - TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, - "set PORE bars back to 0" ); - - // @todo see RTC 51264 - - // This has to be modified if we are loading other AVP's instead - // of PHYP + // Call proc_post_winkle TARGETING::TargetHandleList l_procTargetList; getAllChips(l_procTargetList, TYPE_PROC); - // loop thru all the cpus and reset the pore bars. - for (TargetHandleList::const_iterator - l_proc_iter = l_procTargetList.begin(); - l_proc_iter != l_procTargetList.end(); - ++l_proc_iter) - { - // make a local copy of the CPU target - const TARGETING::Target* l_proc_target = *l_proc_iter; - - // trace HUID - TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, - "target HUID %.8X", TARGETING::get_huid(l_proc_target)); - - // cast OUR type of target to a FAPI type of target. - fapi::Target l_fapi_proc_target( TARGET_TYPE_PROC_CHIP, - (const_cast<TARGETING::Target*>(l_proc_target)) ); - - // reset pore bar notes: - // A mem_size of 0 means to ignore the image address - // This image should have been moved to memory after winkle - - // call the HWP with each fapi::Target - FAPI_INVOKE_HWP( l_errl, - p8_set_pore_bar, - l_fapi_proc_target, - 0, - 0, - 0, - SLW_MEMORY - ); - if ( l_errl ) - { - // capture the target data in the elog - ErrlUserDetailsTarget(l_proc_target).addToLog( l_errl ); - - /*@ - * @errortype - * @reasoncode ISTEP_RESET_PORE_BARS_FAILED - * @severity ERRORLOG::ERRL_SEV_UNRECOVERABLE - * @moduleid ISTEP_HOST_ACTIVATE_SLAVE_CORES - * @userdata1 bytes 0-1: plid identifying first error - * bytes 2-3: reason code of first error - * @userdata2 bytes 0-1: total number of elogs included - * bytes 2-3: N/A - * @devdesc call to set_pore_bars failed. - * see error identified by the plid in - * user data field. - */ - l_stepError.addErrorDetails(ISTEP_RESET_PORE_BARS_FAILED, - ISTEP_HOST_ACTIVATE_SLAVE_CORES, - l_errl ); - - errlCommit( l_errl, HWPF_COMP_ID ); - - TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, - "ERROR : p8_set_pore_bar, PLID=0x%x", - l_errl->plid() ); - } - else - { - TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, - "SUCCESS : p8_set_pore_bar" ); - } - - } // end for - - - // Call proc_post_winkle - // Done activate all master/slave cores. // Run post winkle check on all EX targets, one proc at a time. for (TargetHandleList::const_iterator l_procIter = @@ -710,6 +637,15 @@ void* call_host_ipl_complete( void *io_pArgs ) break; } + //If Sapphire Payload need to set payload base to zero + if (is_sapphire_load()) + { + TARGETING::Target* sys = NULL; + TARGETING::targetService().getTopLevelTarget(sys); + assert( sys != NULL ); + sys->setAttr<ATTR_PAYLOAD_BASE>(0x0); + } + // Sync attributes to Fsp l_err = syncAllAttributesToFsp(); |