INITPROC: Hostboot - Low Priority HW Init Procedures for week of 5/14

SW203934

Change-Id: I2fae67ce21872156fb3d7bd3be8d476695b6bb9a
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/4784
Reviewed-by: Brian H. Horton <brianh@linux.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Tested-by: Jenkins Server

1 files changed, 50 insertions, 32 deletions

diff --git a/src/usr/hwpf/hwp/bus_training/io_power_down_lanes.C b/src/usr/hwpf/hwp/bus_training/io_power_down_lanes.C
index 993daf49a..0887ac866 100644
--- a/src/usr/hwpf/hwp/bus_training/io_power_down_lanes.C
+++ b/src/usr/hwpf/hwp/bus_training/io_power_down_lanes.C
@@ -1,7 +1,7 @@
 /* IBM_PROLOG_BEGIN_TAG                                                   */
 /* This is an automatically generated prolog.                             */
 /*                                                                        */
-/* $Source: src/usr/hwpf/hwp/io_power_down_lanes/io_power_down_lanes.C $  */
+/* $Source: src/usr/hwpf/hwp/bus_training/io_power_down_lanes.C $         */
 /*                                                                        */
 /* IBM CONFIDENTIAL                                                       */
 /*                                                                        */
@@ -20,26 +20,27 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: io_power_down_lanes.C,v 1.5 2013/02/12 07:31:55 varkeykv Exp $
+// $Id: io_power_down_lanes.C,v 1.7 2013/04/30 17:48:50 mjjones Exp $
 // *!***************************************************************************
 // *! (C) Copyright International Business Machines Corp. 1997, 1998
 // *!           All Rights Reserved -- Property of IBM
 // *!                   *** IBM Confidential ***
 // *!***************************************************************************
 // *! FILENAME             : io_read_erepair.C
-// *! TITLE                :
+// *! TITLE                : 
 // *! DESCRIPTION          : Power down bad lanes
-// *! CONTEXT              :
+// *! CONTEXT              : 
 // *!
 // *! OWNER  NAME          : Varghese, Varkey         Email: varkey.kv@in.ibm.com
-// *! BACKUP NAME          : Swaminathan, Janani      Email: jaswamin@in.ibm.com
+// *! BACKUP NAME          : Swaminathan, Janani      Email: jaswamin@in.ibm.com      
 // *!
 // *!***************************************************************************
 // CHANGE HISTORY:
 //------------------------------------------------------------------------------
 // Version:|Author: | Date:  | Comment:
 // --------|--------|--------|--------------------------------------------------
-//   1.0   |varkeykv||Initial check in
+//   1.7   |mjjones |04/30/13| Removed unused variables
+//   1.0   |varkeykv||Initial check in 
 //------------------------------------------------------------------------------
 
 #include <fapi.H>
@@ -55,7 +56,7 @@ using namespace fapi;
 /*
  This function will perform power down of lanes on any IO target MEMBUF,MCS , XBUS or ABUS
  * Bad lanes are powered down , but caller is expected to logically disable lanes by calling restore_repair prior
- * to calling this HWP
+ * to calling this HWP 
 */
 
 ReturnCode io_power_down_lanes(const Target& target,const std::vector<uint8_t> &tx_lanes,const std::vector<uint8_t> &rx_lanes)
@@ -63,48 +64,41 @@ ReturnCode io_power_down_lanes(const Target& target,const std::vector<uint8_t> &
   ReturnCode rc;
   ecmdDataBufferBase data(16);
   ecmdDataBufferBase mask(16);
-  uint8_t lane;
+  ecmdDataBufferBase mode_reg(16);
+  uint8_t lane=0;
+  bool msbswap=false;
   const uint8_t xbus_lanes_per_group=20;
-
+  uint8_t end_lane=0;
+  
   io_interface_t interface=CP_IOMC0_P0; // Since G
   uint32_t rc_ecmd=0;
   uint8_t clock_group=0;
-  uint8_t __attribute__((unused)) start_group=0; // HACK
-  uint8_t __attribute__((unused)) end_group=0; // HACK
-
+  
     rc_ecmd=mask.flushTo1();
     if(rc_ecmd)
     {
         rc.setEcmdError(rc_ecmd);
         return(rc);
     }
-    // Both TX and RX power down bits are on bit 0
+    // Both TX and RX power down bits are on bit 0 
     rc_ecmd=mask.clearBit(0);
     if(rc_ecmd)
     {
         rc.setEcmdError(rc_ecmd);
         return(rc);
     }
-
-  // Check which type of bus this is and do setup needed
+  
+  // Check which type of bus this is and do setup needed 
   if(target.getType() == fapi::TARGET_TYPE_ABUS_ENDPOINT) {
-    start_group=0;
-    end_group=0;
-    interface=CP_FABRIC_A0; // base scom for A bus , assume translation to A1 by PLAT
+    interface=CP_FABRIC_A0; // base scom for A bus , assume translation to A1 by PLAT 
   }
   else if(target.getType() == fapi::TARGET_TYPE_XBUS_ENDPOINT ) {
-    start_group=0;
-    end_group=3;
     interface=CP_FABRIC_X0; // base scom for X bus
   }
   else if(target.getType() == fapi::TARGET_TYPE_MCS_CHIPLET){
-    start_group=3;
-    end_group=3;
     interface=CP_IOMC0_P0; // base scom for MC bus
   }
   else if(target.getType() == fapi::TARGET_TYPE_MEMBUF_CHIP){
-    start_group=0;
-    end_group=0;
     interface=CEN_DMI; // base scom Centaur chip
   }
   else{
@@ -112,7 +106,7 @@ ReturnCode io_power_down_lanes(const Target& target,const std::vector<uint8_t> &
       FAPI_SET_HWP_ERROR(rc, IO_RUN_TRAINING_INVALID_INVOCATION_RC);
       return(rc);
   }
-
+  
    FAPI_INF("Power down IO lanes\n");
 
       rc_ecmd|=data.flushTo0();
@@ -123,26 +117,50 @@ ReturnCode io_power_down_lanes(const Target& target,const std::vector<uint8_t> &
           rc.setEcmdError(rc_ecmd);
           return(rc);
       }
-
-    //TX Lanes power down
+      
+      rc = GCR_read( target, interface,tx_mode_pg, clock_group,  0,  mode_reg);
+      if(rc){return rc;}
+      
+      if(mode_reg.isBitSet(5)){
+        FAPI_DBG("TX MSB-LSB SWAP MODE ON on this target \n",tx_end_lane_id);
+        msbswap=true;
+      }
+      
+    //TX Lanes power down 
       for(uint8_t i=0;i<tx_lanes.size();++i){
         clock_group=0;
         lane=tx_lanes[i];
-        //For Xbus figure out the clock group number
+        //For Xbus figure out the clock group number 
         if(interface==CP_FABRIC_X0){
           while(lane>(xbus_lanes_per_group-1)){
             lane=lane-xbus_lanes_per_group;
             clock_group++;
           }
         }
-        //Power down this lane
+        else{
+          // MSBLSB SWAP condition can be there in MC or A 
+             if(msbswap){
+                // We can read out tx_end_lane_id now for swap correction
+                rc = GCR_read( target, interface,tx_id3_pg, clock_group,  0,  mode_reg);
+                if(rc){return rc;}
+                rc_ecmd=mode_reg.extract(&end_lane,9,7);
+                if(rc_ecmd)
+                {
+                    rc.setEcmdError(rc_ecmd);
+                    return(rc);
+                }
+                end_lane=end_lane>>1;// move left aligned extract by 1
+                FAPI_DBG("END lane id is %d\n",end_lane);
+                lane=end_lane-tx_lanes[i]; // GFW VPD does not know about MSBSWAP , this adjusts for swapping
+             }
+        }
+        //Power down this lane 
         rc = GCR_write( target, interface, tx_mode_pl, clock_group,  lane,  data,mask );
         if(rc){return rc;}
 
       }
 
-
-      // Process RX lane powerdown
+      // Process RX lane powerdown 
       for(uint8_t i=0;i<rx_lanes.size();++i){
         clock_group=0;
         lane=rx_lanes[i];
@@ -153,7 +171,7 @@ ReturnCode io_power_down_lanes(const Target& target,const std::vector<uint8_t> &
             clock_group++;
           }
         }
-        //Power down this lane
+        //Power down this lane 
         rc = GCR_write( target, interface, rx_mode_pl, clock_group,  lane,  data,mask );
         if(rc){return rc;}
       }