SW287690: INITPROC: Hostboot - PBA BAR 0 must be configured during SLW load

Change-Id: I8e7f07c3ae266402437cb38be990f0c147b7a3ac
CQ:SW287690
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/14591
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: PRACHI GUPTA <pragupta@us.ibm.com>
Tested-by: PRACHI GUPTA <pragupta@us.ibm.com>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/14623
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

4 files changed, 151 insertions, 39 deletions

diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_homer_map.h b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_homer_map.h
new file mode 100644
index 000000000..bae728ee3
--- /dev/null
+++ b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_homer_map.h
@@ -0,0 +1,91 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_homer_map.h $ */
+/*                                                                        */
+/* OpenPOWER HostBoot Project                                             */
+/*                                                                        */
+/* Contributors Listed Below - COPYRIGHT 2014                             */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
+/*                                                                        */
+/* Licensed under the Apache License, Version 2.0 (the "License");        */
+/* you may not use this file except in compliance with the License.       */
+/* You may obtain a copy of the License at                                */
+/*                                                                        */
+/*     http://www.apache.org/licenses/LICENSE-2.0                         */
+/*                                                                        */
+/* Unless required by applicable law or agreed to in writing, software    */
+/* distributed under the License is distributed on an "AS IS" BASIS,      */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
+/* implied. See the License for the specific language governing           */
+/* permissions and limitations under the License.                         */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+// $Id: p8_homer_map.h,v 1.2 2014/07/26 13:58:54 jmcgill Exp $
+//------------------------------------------------------------------------------
+// *! (C) Copyright International Business Machines Corp. 2013
+// *! All Rights Reserved -- Property of IBM
+//------------------------------------------------------------------------------
+// *! OWNER NAME  : Frank Campisano Email: campisan@us.ibm.com
+
+/**
+ *  @file p8_homer_map.h
+ *
+ *  @brief Defines the memory layout for the 4MB HOMER space for OCC, SLW, CPM, and other 
+ *
+ * Start	End     	Size	Description
+ *============= =============== ======= ===================================================
+ * 0x00000000	0x000FFFFF	1 MB	OCC Image (Bootloader, OCC Image, OCC Applets)
+ * 0x00100000	0x0011FFFF	128 kB	OCC Host Data Area (nest freq, config) (per chip)
+ * 0x00120000	0x001EFFFF	832 kB	Unused Pad for OCC
+ * 0x001F0000	0x001F7FFF	32 kB 	PowerProxy Trace Records
+ * 0x001F8000	0x001FFFFF	32 kB 	Sapphire Data
+ * 0x00200000	0x002FFFFF	1 MB	SLW Image
+ * 0x00300000	0x0031FFFF	128 kB	SLW Spill over
+ * 0x00320000	0x0039FFFF	512 kB	SLW 24x7 Counters Data Area (per chip)
+ * 0x003A0000	0x003AFFFF	64 kB	SLW<->PHYP I2C Offload Comm Buffers (per chip)
+ * 0x003B0000	0x003BFFFF	64 kB	CPM Calibration Data Buffer Block 
+ * 0x003C0000	0x003C0FFF	4 kB	CPM Control Vector Block
+ * 0x003C1000	0x003C1FFF	4 kB	PTS debug/FFDC assist data
+ * 0x003C2000	0x003FFFFF	248 kB	Unused Pad for PBABAR
+ */
+
+#ifndef _P8_HOMER_MAP_H_
+#define _P8_HOMER_MAP_H_
+
+// Offset Addresses from HOMER BAR address (per chip)
+
+CONST_UINT64_T( HOMER_OCC_IMAGE_OFFSET_ADDR                , ULL(0x00000000) );
+CONST_UINT64_T( HOMER_OCC_HOST_DATA_OFFSET_ADDR            , ULL(0x00100000) );
+CONST_UINT64_T( HOMER_OCC_PAD_OFFSET_ADDR                  , ULL(0x00120000) );
+CONST_UINT64_T( HOMER_POWERPROXY_TRACE_OFFSET_ADDR         , ULL(0x001F0000) );
+CONST_UINT64_T( HOMER_SAPPHIRE_DATA_OFFSET_ADDR            , ULL(0x001F8000) );
+CONST_UINT64_T( HOMER_SLW_IMAGE_OFFSET_ADDR                , ULL(0x00200000) );
+CONST_UINT64_T( HOMER_SLW_SPILL_BUFFER_OFFSET_ADDR         , ULL(0x00300000) );
+CONST_UINT64_T( HOMER_SLW_24X7_COUNTER_OFFSET_ADDR         , ULL(0x00320000) );
+CONST_UINT64_T( HOMER_SLW_PHYP_I2C_OFFOAD_OFFSET_ADDR      , ULL(0x003A0000) );
+CONST_UINT64_T( HOMER_CPM_CAL_DATA_VECTOR_OFFSET_ADDR      , ULL(0x003B0000) );
+CONST_UINT64_T( HOMER_CPM_CAL_CTRL_VECTOR_OFFSET_ADDR      , ULL(0x003C0000) );
+CONST_UINT64_T( HOMER_CPM_CAL_GOLD_CTRL_VECTOR_OFFSET_ADDR , ULL(0x003C0080) );
+CONST_UINT64_T( HOMER_PTS_DATA                             , ULL(0x003C1000) );
+CONST_UINT64_T( HOMER_PAD_OFFSET_ADDR                      , ULL(0x003C2000) );
+
+// Buffer sizes for HOMER sections
+
+CONST_UINT64_T( HOMER_OCC_IMAGE_BUFFER_SIZE                , ULL(0x00100000) );
+CONST_UINT64_T( HOMER_OCC_HOST_DATA_BUFFER_SIZE            , ULL(0x00020000) );
+CONST_UINT64_T( HOMER_OCC_PAD_BUFFER_SIZE                  , ULL(0x000D0000) );
+CONST_UINT64_T( HOMER_POWERPROXY_TRACE_RECORD_BUFFER_SIZE  , ULL(0x00008000) );
+CONST_UINT64_T( HOMER_SAPPHIRE_DATA_BUFFER_SIZE            , ULL(0x00008000) );
+CONST_UINT64_T( HOMER_SLW_IMAGE_BUFFER_SIZE                , ULL(0x00100000) );
+CONST_UINT64_T( HOMER_SLW_SPILL_BUFFER_BUFFER_SIZE         , ULL(0x00020000) );
+CONST_UINT64_T( HOMER_SLW_24X7_COUNTER_BUFFER_SIZE         , ULL(0x00080000) );
+CONST_UINT64_T( HOMER_SLW_PHYP_I2C_OFFOAD_BUFFER_SIZE      , ULL(0x00010000) );
+CONST_UINT64_T( HOMER_CPM_CAL_DATA_BUFFER_BUFFER_SIZE      , ULL(0x00010000) );
+CONST_UINT64_T( HOMER_CPM_CAL_CTRL_VECTOR_BUFFER_SIZE      , ULL(0x00001000) );
+CONST_UINT64_T( HOMER_CPM_CAL_GOLD_CTRL_VECTOR_BUFFER_SIZE , ULL(0x00000080) );
+CONST_UINT64_T( HOMER_PTS_DATA_SIZE                        , ULL(0x00001000) );
+CONST_UINT64_T( HOMER_PAD_BUFFER_SIZE                      , ULL(0x0003E000) );
+
+#endif  // _P8_HOMER_MAP_H_
diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pba_bar_config.C b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pba_bar_config.C
index a44704113..dd74acac9 100644
--- a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pba_bar_config.C
+++ b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pba_bar_config.C
@@ -22,7 +22,7 @@
 /* permissions and limitations under the License.                         */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_pba_bar_config.C,v 1.4 2014/03/03 23:44:49 stillgs Exp $
+// $Id: p8_pba_bar_config.C,v 1.5 2014/11/07 17:53:36 cmolsen Exp $
 // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pba_bar_config.C,v $
 //------------------------------------------------------------------------------
 // *! (C) Copyright International Business Machines Corp. 2011
@@ -32,6 +32,8 @@
 // *! OWNER NAME: Klaus P. Gungl         Email: kgungl@de.ibm.com
 // *!
 // *!
+// *! To build  -  buildfapiprcd -e ../../xml/error_info/p8_pba_bar_config_errors.xml p8_pba_bar_config.C
+// *!
 /// \file p8_pba_bar_config.C
 /// \brief Initialize PAB and PAB_MSK of PBA
 ///
@@ -172,25 +174,14 @@ p8_pba_bar_config (const Target&  i_target,
 
     // Check if the size is 0 but the BAR is not zero.  If so, return error.
     // The combination of both the size and BAR being zero is legal.
-    if ( (i_pba_bar_size == 0x0ull) && (i_pba_bar_size != 0x0ull) )
+    if ( (i_pba_bar_size == 0x0ull) && (i_index != 0) )
     {
-        FAPI_ERR("ERROR: Size must be 1MB or greater : i_pba_bar_size=%08llX", i_pba_bar_size);
+        FAPI_ERR("ERROR: Bar size must be >=1MB for PBABAR%d but i_pba_bar_size=0x%08llx",
+                    i_index, i_pba_bar_size);
         FAPI_SET_HWP_ERROR(l_rc, RC_PROC_PBA_BAR_SIZE_INVALID);
         return l_rc;
     }
 
-    // The PBA Mask indicates which bits from 23:43 (1MB grandularity) are
-    // enabled to be passed from the OCI addresses.  Inverting this mask
-    // indicates which address bits are going to come from the PBA BAR value.
-    // The image address (the starting address) must match these post mask bits
-    // to be resident in the range.
-    //
-    // Starting bit number: 64 bit Big Endian
-    //                                          12223344
-    //                                          60482604
-    // region_inverted_mask = i_mem_mask ^ BAR_MASK_LIMIT;  // XOR
-
-
     // Check that the image address passed is within the memory region that
     // is also passed.
     //
@@ -247,11 +238,22 @@ p8_pba_bar_config (const Target&  i_target,
     // Compute and write the mask based on passed region size.
 
     // If the size is already a power of 2, then set the mask to that value - 1.
-    // If the is not a power of 2, then set the mask the rounded up power of 2
-    // value minus 1.
+    // If the size is not a power of 2, then set the maskto  the rounded up power of 2
+    // value - 1.
+    // If the size is zero, then treat as if equal to 1 and then do the round up check.
 
-    work_size = PowerOf2Roundedup(i_pba_bar_size);
-    FAPI_DBG("\ti_pba_bar_size: 0x%llX work_size: 0x%llX", i_pba_bar_size, work_size);
+    if (i_pba_bar_size!=0)
+    {
+        work_size = PowerOf2Roundedup(i_pba_bar_size);
+        FAPI_INF("\ti_pba_bar_size: 0x%llX.  Final work_size: 0x%llX", 
+                    i_pba_bar_size, work_size);
+    }
+    else
+    { // If bar_size==0, treat as if ==1. Otherwize, range will max out to 2TB.
+        work_size = PowerOf2Roundedup(1ull);
+        FAPI_INF("\ti_pba_bar_size: 0x%llX but treated as if bar_size=1. Final work_size: 0x%llX", 
+                    i_pba_bar_size, work_size);
+    }
 
     barmask.value=0;
     barmask.fields.mask = work_size-1;
diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_set_pore_bar.C b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_set_pore_bar.C
index 09ae71fe0..1e7b93106 100644
--- a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_set_pore_bar.C
+++ b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_set_pore_bar.C
@@ -22,7 +22,7 @@
 /* permissions and limitations under the License.                         */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_set_pore_bar.C,v 1.9 2014/03/07 14:38:52 stillgs Exp $
+// $Id: p8_set_pore_bar.C,v 1.10 2014/11/07 18:26:34 cmolsen Exp $
 // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_set_pore_bar.C,v $
 //-------------------------------------------------------------------------------
 // *! (C) Copyright International Business Machines Corp. 2011
@@ -31,6 +31,13 @@
 //-------------------------------------------------------------------------------
 // *! OWNER NAME: Greg Still         Email: stillgs@us.ibm.com
 // *!
+// *! *** IMPORTANT *** 
+// *! For P9, this proc should be changed to setup HOMER in PBABAR0 and then setup
+// *! SLW in PBABAR2 by calculating BAR2 = BAR0 + HOMER_SLW_IMAGE_OFFSET_ADDR.
+// *! *** IMPORTANT ***
+// *!
+// *! To build -  buildfapiprcd -e ../../xml/error_info/p8_set_pore_bar_errors.xml p8_set_pore_bar.C
+// *!
 /// \file p8_set_pore_bar.C
 /// \brief Set up the Sleep/Winkle (SLW) PORE Memory Relocation (MRR) and
 /// Table Base Address (TBA) for accessing the SLW image
@@ -97,6 +104,7 @@
 #include "p8_pba_bar_config.H"
 #include "pgp_pba.h"
 #include "sbe_xip_image.h"
+#include "p8_homer_map.h"
 
 
 extern "C" {
@@ -107,9 +115,6 @@ using namespace fapi;
 // Constant definitions
 // ------------------------------------------------------------------------------
 
-const uint32_t  SLW_PBA_BAR = 2;
-const uint32_t  SLW_PBA_SLAVE = 2;
-
 // ------------------------------------------------------------------------------
 // Global variables
 // ------------------------------------------------------------------------------
@@ -172,8 +177,13 @@ p8_set_pore_bar(      const fapi::Target& i_target,
     const uint32_t      pba_bar_slw = PBA_SLW_BAR2;
     const uint32_t      pba_slave = PBA_SLAVE2;
 
-    const uint64_t      slw_pba_cmd_scope = 0x2;   // Set to system
+    const uint64_t      slw_pba_cmd_scope = 0x2;   // Set to SYSTEM
     
+    const uint32_t      occ_pba_bar = PBA_BAR0;
+    uint64_t            occ_mem_bar = 0x0;         // Set later when sure SLW in MS/L3.
+    const uint64_t      occ_mem_size = 0x4;
+    const uint64_t      occ_pba_cmd_scope = 0x0;   // Set to NODAL
+
     SbeXipItem          slw_control_vector_info;
     uint32_t            slw_control_vector_offset;
     
@@ -457,18 +467,6 @@ p8_set_pore_bar(      const fapi::Target& i_target,
             }
 
 
-            // The PBA Mask indicates which bits from 23:43 (1MB grandularity) are
-            // enabled to be passed from the OCI addresses.  Inverting this mask
-            // indicates which address bits are going to come from the PBA BAR value.
-            // The image address (the starting address) must match these post mask bits
-            // to be resident in the range.
-            //
-            // Starting bit number: 64 bit Big Endian
-            //                                          12223344
-            //                                          60482604
-            // region_inverted_mask = i_mem_mask ^ BAR_MASK_LIMIT;  // XOR
-
-
             // Check that the image address passed is within the memory region that
             // is also passed.
             //
@@ -585,7 +583,7 @@ p8_set_pore_bar(      const fapi::Target& i_target,
             // reprogram this slave for IMA writes using special code sequences that
             // restore normal DMA writes after each IMA sequence.
 
-            rc = bar_pba_slave_reset(i_target, SLW_PBA_SLAVE);
+            rc = bar_pba_slave_reset(i_target, PBA_SLAVE2);
             if (rc)
             {
                 FAPI_ERR("PBA Slave Reset failed");
@@ -622,6 +620,27 @@ p8_set_pore_bar(      const fapi::Target& i_target,
                 FAPI_ERR("Put SCOM error for PBA Slave Control");
                 return rc;
             }
+
+            // While here, also setup of OCC PBABAR0 to indicate the location and size
+            //   of HOMER. This is to support PTS/24x7 launch before OCC startup.
+            // The address to use is 2MB below the SLW image location. This offset is
+            //   represented by HOMER_SLW_IMAGE_OFFSET_ADDR.
+            // The memory size is 4MB.
+            occ_mem_bar = i_mem_bar - HOMER_SLW_IMAGE_OFFSET_ADDR;
+            FAPI_DBG("Calling pba_bar_config to BAR %x Addr: 0x%16llX  Size: 0x%16llX",
+                        occ_pba_bar, occ_mem_bar, occ_mem_size);
+
+            // Set the PBA BAR for the OCC region
+            FAPI_EXEC_HWP(rc, p8_pba_bar_config, i_target,
+                                                 occ_pba_bar,
+                                                 occ_mem_bar,
+                                                 occ_mem_size,
+                                                 occ_pba_cmd_scope);
+            if(rc)
+            {
+                break;
+            }
+
         } // PBA setup for Memory or L3
     } while (0);
     return rc;
diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_set_pore_bar.H b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_set_pore_bar.H
index 1d64c91b3..c32581113 100644
--- a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_set_pore_bar.H
+++ b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_set_pore_bar.H
@@ -22,7 +22,7 @@
 /* permissions and limitations under the License.                         */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_set_pore_bar.H,v 1.1 2012/08/23 04:58:53 stillgs Exp $
+// $Id: p8_set_pore_bar.H,v 1.2 2014/11/07 18:27:55 cmolsen Exp $
 // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_set_pore_bar.H,v $
 //------------------------------------------------------------------------------
 // *|
@@ -86,7 +86,7 @@ enum PORE_PBA_BAR {
         PBA_BAR3    = 0x3
         };
         
-enum PORE__BA_SLAVE {
+enum PORE_PBA_SLAVE {
         PBA_SLAVE0    = 0x0,
         PBA_SLAVE1    = 0x1,
         PBA_SLAVE2    = 0x2,