INITPROC: Hostboot - Updated HWPs from defect SW213883

SW213883

Change-Id: I54f74de5103e62ee49d9e83155ae1a968f4b06d5
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/5588
Tested-by: Jenkins Server
Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

2 files changed, 215 insertions, 31 deletions

diff --git a/src/usr/hwpf/hwp/activate_powerbus/proc_build_smp/proc_build_smp_fbc_cd.C b/src/usr/hwpf/hwp/activate_powerbus/proc_build_smp/proc_build_smp_fbc_cd.C
index 80dc5a4aa..52f019a1b 100644
--- a/src/usr/hwpf/hwp/activate_powerbus/proc_build_smp/proc_build_smp_fbc_cd.C
+++ b/src/usr/hwpf/hwp/activate_powerbus/proc_build_smp/proc_build_smp_fbc_cd.C
@@ -20,7 +20,7 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: proc_build_smp_fbc_cd.C,v 1.8 2013/05/07 22:10:20 jmcgill Exp $
+// $Id: proc_build_smp_fbc_cd.C,v 1.9 2013/06/20 21:19:02 jmcgill Exp $
 // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_build_smp_fbc_cd.C,v $
 //------------------------------------------------------------------------------
 // *|
@@ -1266,19 +1266,44 @@ fapi::ReturnCode proc_build_smp_set_sconfig_we5(
     fapi::ReturnCode rc;
     uint32_t rc_ecmd = 0x0;
     ecmdDataBufferBase data(64);
+    uint8_t ver2 = 0x0;
 
     // mark function entry
     FAPI_DBG("proc_build_smp_set_sconfig_we5: Start");
 
     do
     {
+        rc = FAPI_ATTR_GET(ATTR_CHIP_EC_FEATURE_FBC_SERIAL_SCOM_CENT5_VER2,
+                           &(i_smp_chip.chip->this_chip),
+                           ver2);
+        if (!rc.ok())
+        {
+            FAPI_ERR("Error querying Chip EC feature: ATTR_CHIP_EC_FEATURE_FBC_SERIAL_SCOM_CENT5_VER2");
+            break;
+        }
+
         // build register content
         // pb_cfg_lock_on_links
+        uint32_t PB_SCONFIG_WE5_LOCK_ON_LINKS_BIT =
+            (ver2)?
+            (PB_SCONFIG_WE5_LOCK_ON_LINKS_BIT_VER2):
+            (PB_SCONFIG_WE5_LOCK_ON_LINKS_BIT_VER1);
+
         rc_ecmd |= data.writeBit(
             PB_SCONFIG_WE5_LOCK_ON_LINKS_BIT,
             PB_SCONFIG_WE5_LOCK_ON_LINKS?1:0);
 
         // pb_cfg_x_on_link_tok_agg_threshold
+        uint32_t PB_SCONFIG_WE5_X_ON_LINK_TOK_AGG_THRESHOLD_START_BIT =
+            (ver2)?
+            (PB_SCONFIG_WE5_X_ON_LINK_TOK_AGG_THRESHOLD_START_BIT_VER2):
+            (PB_SCONFIG_WE5_X_ON_LINK_TOK_AGG_THRESHOLD_START_BIT_VER1);
+
+        uint32_t PB_SCONFIG_WE5_X_ON_LINK_TOK_AGG_THRESHOLD_END_BIT =
+            (ver2)?
+            (PB_SCONFIG_WE5_X_ON_LINK_TOK_AGG_THRESHOLD_END_BIT_VER2):
+            (PB_SCONFIG_WE5_X_ON_LINK_TOK_AGG_THRESHOLD_END_BIT_VER1);
+
         rc_ecmd |= data.insertFromRight(
             PB_SCONFIG_WE5_X_ON_LINK_TOK_AGG_THRESHOLD,
             PB_SCONFIG_WE5_X_ON_LINK_TOK_AGG_THRESHOLD_START_BIT,
@@ -1286,6 +1311,16 @@ fapi::ReturnCode proc_build_smp_set_sconfig_we5(
              PB_SCONFIG_WE5_X_ON_LINK_TOK_AGG_THRESHOLD_START_BIT+1));
 
         // pb_cfg_x_off_link_tok_agg_threshold
+        uint32_t PB_SCONFIG_WE5_X_OFF_LINK_TOK_AGG_THRESHOLD_START_BIT =
+            (ver2)?
+            (PB_SCONFIG_WE5_X_OFF_LINK_TOK_AGG_THRESHOLD_START_BIT_VER2):
+            (PB_SCONFIG_WE5_X_OFF_LINK_TOK_AGG_THRESHOLD_START_BIT_VER1);
+
+        uint32_t PB_SCONFIG_WE5_X_OFF_LINK_TOK_AGG_THRESHOLD_END_BIT =
+            (ver2)?
+            (PB_SCONFIG_WE5_X_OFF_LINK_TOK_AGG_THRESHOLD_END_BIT_VER2):
+            (PB_SCONFIG_WE5_X_OFF_LINK_TOK_AGG_THRESHOLD_END_BIT_VER1);
+
         rc_ecmd |= data.insertFromRight(
             PB_SCONFIG_WE5_X_OFF_LINK_TOK_AGG_THRESHOLD,
             PB_SCONFIG_WE5_X_OFF_LINK_TOK_AGG_THRESHOLD_START_BIT,
@@ -1293,6 +1328,16 @@ fapi::ReturnCode proc_build_smp_set_sconfig_we5(
              PB_SCONFIG_WE5_X_OFF_LINK_TOK_AGG_THRESHOLD_START_BIT+1));
 
         // pb_cfg_x_a_link_tok_agg_threshold
+        uint32_t PB_SCONFIG_WE5_A_LINK_TOK_AGG_THRESHOLD_START_BIT =
+            (ver2)?
+            (PB_SCONFIG_WE5_A_LINK_TOK_AGG_THRESHOLD_START_BIT_VER2):
+            (PB_SCONFIG_WE5_A_LINK_TOK_AGG_THRESHOLD_START_BIT_VER1);
+
+        uint32_t PB_SCONFIG_WE5_A_LINK_TOK_AGG_THRESHOLD_END_BIT =
+            (ver2)?
+            (PB_SCONFIG_WE5_A_LINK_TOK_AGG_THRESHOLD_END_BIT_VER2):
+            (PB_SCONFIG_WE5_A_LINK_TOK_AGG_THRESHOLD_END_BIT_VER1);
+
         rc_ecmd |= data.insertFromRight(
             PB_SCONFIG_WE5_A_LINK_TOK_AGG_THRESHOLD,
             PB_SCONFIG_WE5_A_LINK_TOK_AGG_THRESHOLD_START_BIT,
@@ -1300,6 +1345,16 @@ fapi::ReturnCode proc_build_smp_set_sconfig_we5(
              PB_SCONFIG_WE5_A_LINK_TOK_AGG_THRESHOLD_START_BIT+1));
 
         // pb_cfg_x_f_link_tok_agg_threshold
+        uint32_t PB_SCONFIG_WE5_F_LINK_TOK_AGG_THRESHOLD_START_BIT =
+            (ver2)?
+            (PB_SCONFIG_WE5_F_LINK_TOK_AGG_THRESHOLD_START_BIT_VER2):
+            (PB_SCONFIG_WE5_F_LINK_TOK_AGG_THRESHOLD_START_BIT_VER1);
+
+        uint32_t PB_SCONFIG_WE5_F_LINK_TOK_AGG_THRESHOLD_END_BIT =
+            (ver2)?
+            (PB_SCONFIG_WE5_F_LINK_TOK_AGG_THRESHOLD_END_BIT_VER2):
+            (PB_SCONFIG_WE5_F_LINK_TOK_AGG_THRESHOLD_END_BIT_VER1);
+
         rc_ecmd |= data.insertFromRight(
             PB_SCONFIG_WE5_F_LINK_TOK_AGG_THRESHOLD,
             PB_SCONFIG_WE5_F_LINK_TOK_AGG_THRESHOLD_START_BIT,
@@ -1307,6 +1362,16 @@ fapi::ReturnCode proc_build_smp_set_sconfig_we5(
              PB_SCONFIG_WE5_F_LINK_TOK_AGG_THRESHOLD_START_BIT+1));
 
         // pb_cfg_x_a_link_tok_ind_threshold
+        uint32_t PB_SCONFIG_WE5_A_LINK_TOK_IND_THRESHOLD_START_BIT =
+            (ver2)?
+            (PB_SCONFIG_WE5_A_LINK_TOK_IND_THRESHOLD_START_BIT_VER2):
+            (PB_SCONFIG_WE5_A_LINK_TOK_IND_THRESHOLD_START_BIT_VER1);
+
+        uint32_t PB_SCONFIG_WE5_A_LINK_TOK_IND_THRESHOLD_END_BIT =
+            (ver2)?
+            (PB_SCONFIG_WE5_A_LINK_TOK_IND_THRESHOLD_END_BIT_VER2):
+            (PB_SCONFIG_WE5_A_LINK_TOK_IND_THRESHOLD_END_BIT_VER1);
+
         rc_ecmd |= data.insertFromRight(
             PB_SCONFIG_WE5_A_LINK_TOK_IND_THRESHOLD,
             PB_SCONFIG_WE5_A_LINK_TOK_IND_THRESHOLD_START_BIT,
@@ -1314,11 +1379,26 @@ fapi::ReturnCode proc_build_smp_set_sconfig_we5(
              PB_SCONFIG_WE5_A_LINK_TOK_IND_THRESHOLD_START_BIT+1));
 
         // pb_cfg_passthru_enable
+        uint32_t PB_SCONFIG_WE5_PASSTHRU_ENABLE_BIT =
+            (ver2)?
+            (PB_SCONFIG_WE5_PASSTHRU_ENABLE_BIT_VER2):
+            (PB_SCONFIG_WE5_PASSTHRU_ENABLE_BIT_VER1);
+
         rc_ecmd |= data.writeBit(
             PB_SCONFIG_WE5_PASSTHRU_ENABLE_BIT,
             PB_SCONFIG_WE5_PASSTHRU_ENABLE?1:0);
 
         // pb_cfg_passthru_x_priority
+        uint32_t PB_SCONFIG_WE5_PASSTHRU_X_PRIORITY_START_BIT =
+            (ver2)?
+            (PB_SCONFIG_WE5_PASSTHRU_X_PRIORITY_START_BIT_VER2):
+            (PB_SCONFIG_WE5_PASSTHRU_X_PRIORITY_START_BIT_VER1);
+
+        uint32_t PB_SCONFIG_WE5_PASSTHRU_X_PRIORITY_END_BIT =
+            (ver2)?
+            (PB_SCONFIG_WE5_PASSTHRU_X_PRIORITY_END_BIT_VER2):
+            (PB_SCONFIG_WE5_PASSTHRU_X_PRIORITY_END_BIT_VER1);
+
         rc_ecmd |= data.insertFromRight(
             PB_SCONFIG_WE5_PASSTHRU_X_PRIORITY,
             PB_SCONFIG_WE5_PASSTHRU_X_PRIORITY_START_BIT,
@@ -1326,6 +1406,16 @@ fapi::ReturnCode proc_build_smp_set_sconfig_we5(
              PB_SCONFIG_WE5_PASSTHRU_X_PRIORITY_START_BIT+1));
 
         // pb_cfg_passthru_a_priority
+        uint32_t PB_SCONFIG_WE5_PASSTHRU_A_PRIORITY_START_BIT =
+            (ver2)?
+            (PB_SCONFIG_WE5_PASSTHRU_A_PRIORITY_START_BIT_VER2):
+            (PB_SCONFIG_WE5_PASSTHRU_A_PRIORITY_START_BIT_VER1);
+
+        uint32_t PB_SCONFIG_WE5_PASSTHRU_A_PRIORITY_END_BIT =
+            (ver2)?
+            (PB_SCONFIG_WE5_PASSTHRU_A_PRIORITY_END_BIT_VER2):
+            (PB_SCONFIG_WE5_PASSTHRU_A_PRIORITY_END_BIT_VER1);
+
         rc_ecmd |= data.insertFromRight(
             PB_SCONFIG_WE5_PASSTHRU_A_PRIORITY,
             PB_SCONFIG_WE5_PASSTHRU_A_PRIORITY_START_BIT,
@@ -1333,6 +1423,16 @@ fapi::ReturnCode proc_build_smp_set_sconfig_we5(
              PB_SCONFIG_WE5_PASSTHRU_A_PRIORITY_START_BIT+1));
 
         // pb_cfg_a_tok_init
+        uint32_t PB_SCONFIG_WE5_A_TOK_INIT_START_BIT =
+            (ver2)?
+            (PB_SCONFIG_WE5_A_TOK_INIT_START_BIT_VER2):
+            (PB_SCONFIG_WE5_A_TOK_INIT_START_BIT_VER1);
+
+        uint32_t PB_SCONFIG_WE5_A_TOK_INIT_END_BIT =
+            (ver2)?
+            (PB_SCONFIG_WE5_A_TOK_INIT_END_BIT_VER2):
+            (PB_SCONFIG_WE5_A_TOK_INIT_END_BIT_VER1);
+
         rc_ecmd |= data.insertFromRight(
             PB_SCONFIG_WE5_A_TOK_INIT,
             PB_SCONFIG_WE5_A_TOK_INIT_START_BIT,
@@ -1340,6 +1440,15 @@ fapi::ReturnCode proc_build_smp_set_sconfig_we5(
              PB_SCONFIG_WE5_A_TOK_INIT_START_BIT+1));
 
         // pb_cfg_f_tok_init
+        uint32_t PB_SCONFIG_WE5_F_TOK_INIT_START_BIT =
+            (ver2)?
+            (PB_SCONFIG_WE5_F_TOK_INIT_START_BIT_VER2):
+            (PB_SCONFIG_WE5_F_TOK_INIT_START_BIT_VER1);
+
+        uint32_t PB_SCONFIG_WE5_F_TOK_INIT_END_BIT =
+            (ver2)?
+            (PB_SCONFIG_WE5_F_TOK_INIT_END_BIT_VER2):
+            (PB_SCONFIG_WE5_F_TOK_INIT_END_BIT_VER1);
         rc_ecmd |= data.insertFromRight(
             PB_SCONFIG_WE5_F_TOK_INIT,
             PB_SCONFIG_WE5_F_TOK_INIT_START_BIT,
@@ -1347,24 +1456,65 @@ fapi::ReturnCode proc_build_smp_set_sconfig_we5(
              PB_SCONFIG_WE5_F_TOK_INIT_START_BIT+1));
 
         // pb_cfg_em_fp_enable
+        uint32_t PB_SCONFIG_WE5_EM_FP_ENABLE_BIT =
+            (ver2)?
+            (PB_SCONFIG_WE5_EM_FP_ENABLE_BIT_VER2):
+            (PB_SCONFIG_WE5_EM_FP_ENABLE_BIT_VER1);
+
         rc_ecmd |= data.writeBit(
             PB_SCONFIG_WE5_EM_FP_ENABLE_BIT,
             PB_SCONFIG_WE5_EM_FP_ENABLE?1:0);
 
         // spare
+        uint32_t PB_SCONFIG_WE5_SPARE_START_BIT =
+            (ver2)?
+            (PB_SCONFIG_WE5_SPARE_START_BIT_VER2):
+            (PB_SCONFIG_WE5_SPARE_START_BIT_VER1);
+
+        uint32_t PB_SCONFIG_WE5_SPARE_END_BIT =
+            (ver2)?
+            (PB_SCONFIG_WE5_SPARE_END_BIT_VER2):
+            (PB_SCONFIG_WE5_SPARE_END_BIT_VER1);
+
         rc_ecmd |= data.insertFromRight(
             PB_SCONFIG_WE5_SPARE,
             PB_SCONFIG_WE5_SPARE_START_BIT,
             (PB_SCONFIG_WE5_SPARE_END_BIT-
              PB_SCONFIG_WE5_SPARE_START_BIT+1));
 
+        // pb_cfg_a_ind_threshold
+        if (ver2)
+        {
+            rc_ecmd |= data.writeBit(
+                PB_SCONFIG_WE5_A_IND_THRESHOLD_BIT_VER2,
+                PB_SCONFIG_WE5_A_IND_THRESHOLD?1:0);
+        }
+
         // pb_cfg_mem_stv_priority
+        uint32_t PB_SCONFIG_WE5_MEM_STV_PRIORITY_START_BIT =
+            (ver2)?
+            (PB_SCONFIG_WE5_MEM_STV_PRIORITY_START_BIT_VER2):
+            (PB_SCONFIG_WE5_MEM_STV_PRIORITY_START_BIT_VER1);
+
+        uint32_t PB_SCONFIG_WE5_MEM_STV_PRIORITY_END_BIT =
+            (ver2)?
+            (PB_SCONFIG_WE5_MEM_STV_PRIORITY_END_BIT_VER2):
+            (PB_SCONFIG_WE5_MEM_STV_PRIORITY_END_BIT_VER1);
+
         rc_ecmd |= data.insertFromRight(
             PB_SCONFIG_WE5_MEM_STV_PRIORITY,
             PB_SCONFIG_WE5_MEM_STV_PRIORITY_START_BIT,
             (PB_SCONFIG_WE5_MEM_STV_PRIORITY_END_BIT-
              PB_SCONFIG_WE5_MEM_STV_PRIORITY_START_BIT+1));
 
+        // pb_cfg_x_off_set
+        if (ver2)
+        {
+            rc_ecmd |= data.writeBit(
+                PB_SCONFIG_WE5_X_OFF_SEL_BIT_VER2,
+                PB_SCONFIG_WE5_X_OFF_SEL?1:0);
+        }
+
         if (rc_ecmd)
         {
             FAPI_ERR("proc_build_smp_set_sconfig_we5: Error 0x%x setting up PB Serial Configuration load register data buffer",
@@ -1374,7 +1524,10 @@ fapi::ReturnCode proc_build_smp_set_sconfig_we5(
         }
 
         // call common routine to program chain
-        rc = proc_build_smp_set_sconfig(i_smp_chip, PB_SCONFIG_WE5_DEF, data);
+        rc = proc_build_smp_set_sconfig(
+            i_smp_chip,
+            (ver2)?(PB_SCONFIG_WE5_DEF_VER2):(PB_SCONFIG_WE5_DEF_VER1),
+            data);
         if (!rc.ok())
         {
             FAPI_ERR("proc_build_smp_set_sconfig_we5: Error from proc_build_smp_set_sconfig");
diff --git a/src/usr/hwpf/hwp/activate_powerbus/proc_build_smp/proc_build_smp_fbc_cd.H b/src/usr/hwpf/hwp/activate_powerbus/proc_build_smp/proc_build_smp_fbc_cd.H
index 03299b2ba..940c05bb7 100644
--- a/src/usr/hwpf/hwp/activate_powerbus/proc_build_smp/proc_build_smp_fbc_cd.H
+++ b/src/usr/hwpf/hwp/activate_powerbus/proc_build_smp/proc_build_smp_fbc_cd.H
@@ -20,7 +20,7 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: proc_build_smp_fbc_cd.H,v 1.6 2013/05/07 22:10:24 jmcgill Exp $
+// $Id: proc_build_smp_fbc_cd.H,v 1.8 2013/06/20 21:19:05 jmcgill Exp $
 // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_build_smp_fbc_cd.H,v $
 //------------------------------------------------------------------------------
 // *|
@@ -232,7 +232,7 @@ const uint8_t PB_SCONFIG_C9_GP_STARVE_LIMIT  = 0x80;
 const uint8_t PB_SCONFIG_C9_RGP_STARVE_LIMIT = 0x80;
 const uint8_t PB_SCONFIG_C9_SP_STARVE_LIMIT  = 0x80;
 const uint8_t PB_SCONFIG_C9_FP_STARVE_LIMIT  = 0x80;
-const uint8_t PB_SCONFIG_C9_UX_SCOPE_ARB_MODE = 0x1; // RR_ONLY
+const uint8_t PB_SCONFIG_C9_UX_SCOPE_ARB_MODE = 0x0; // LFSR_ONLY
 const uint8_t PB_SCONFIG_C9_UX_LOCAL_ARB_MODE = 0x2; // LFSR_ON_STARVATION_ELSE_RR
 
 
@@ -410,33 +410,62 @@ const bool    PB_SCONFIG_WE1_FP_C2I_SPARE_MODE = false;                // spare
 // PBH_DAT_ARB_EM (east/west, chain #5) field/bit definitions
 //
 
-const proc_build_smp_sconfig_def PB_SCONFIG_WE5_DEF = { 0x5, 51, false, { true, false, true } };
-
-const uint32_t PB_SCONFIG_WE5_LOCK_ON_LINKS_BIT = 13;
-const uint32_t PB_SCONFIG_WE5_X_ON_LINK_TOK_AGG_THRESHOLD_START_BIT = 14;
-const uint32_t PB_SCONFIG_WE5_X_ON_LINK_TOK_AGG_THRESHOLD_END_BIT = 17;
-const uint32_t PB_SCONFIG_WE5_X_OFF_LINK_TOK_AGG_THRESHOLD_START_BIT = 18;
-const uint32_t PB_SCONFIG_WE5_X_OFF_LINK_TOK_AGG_THRESHOLD_END_BIT = 21;
-const uint32_t PB_SCONFIG_WE5_A_LINK_TOK_AGG_THRESHOLD_START_BIT = 22;
-const uint32_t PB_SCONFIG_WE5_A_LINK_TOK_AGG_THRESHOLD_END_BIT = 25;
-const uint32_t PB_SCONFIG_WE5_F_LINK_TOK_AGG_THRESHOLD_START_BIT = 26;
-const uint32_t PB_SCONFIG_WE5_F_LINK_TOK_AGG_THRESHOLD_END_BIT = 29;
-const uint32_t PB_SCONFIG_WE5_A_LINK_TOK_IND_THRESHOLD_START_BIT = 30;
-const uint32_t PB_SCONFIG_WE5_A_LINK_TOK_IND_THRESHOLD_END_BIT = 33;
-const uint32_t PB_SCONFIG_WE5_PASSTHRU_ENABLE_BIT = 34;
-const uint32_t PB_SCONFIG_WE5_PASSTHRU_X_PRIORITY_START_BIT = 35;
-const uint32_t PB_SCONFIG_WE5_PASSTHRU_X_PRIORITY_END_BIT = 42;
-const uint32_t PB_SCONFIG_WE5_PASSTHRU_A_PRIORITY_START_BIT = 43;
-const uint32_t PB_SCONFIG_WE5_PASSTHRU_A_PRIORITY_END_BIT = 50;
-const uint32_t PB_SCONFIG_WE5_A_TOK_INIT_START_BIT = 51;
-const uint32_t PB_SCONFIG_WE5_A_TOK_INIT_END_BIT = 54;
-const uint32_t PB_SCONFIG_WE5_F_TOK_INIT_START_BIT = 55;
-const uint32_t PB_SCONFIG_WE5_F_TOK_INIT_END_BIT = 58;
-const uint32_t PB_SCONFIG_WE5_EM_FP_ENABLE_BIT = 59;
-const uint32_t PB_SCONFIG_WE5_SPARE_START_BIT = 60;
-const uint32_t PB_SCONFIG_WE5_SPARE_END_BIT = 61;
-const uint32_t PB_SCONFIG_WE5_MEM_STV_PRIORITY_START_BIT = 62;
-const uint32_t PB_SCONFIG_WE5_MEM_STV_PRIORITY_END_BIT = 63;
+const proc_build_smp_sconfig_def PB_SCONFIG_WE5_DEF_VER1 = { 0x5, 51, false, { true, false, true } };
+const proc_build_smp_sconfig_def PB_SCONFIG_WE5_DEF_VER2 = { 0x5, 52, false, { true, false, true } };
+
+const uint32_t PB_SCONFIG_WE5_LOCK_ON_LINKS_BIT_VER1 = 13;
+const uint32_t PB_SCONFIG_WE5_X_ON_LINK_TOK_AGG_THRESHOLD_START_BIT_VER1 = 14;
+const uint32_t PB_SCONFIG_WE5_X_ON_LINK_TOK_AGG_THRESHOLD_END_BIT_VER1 = 17;
+const uint32_t PB_SCONFIG_WE5_X_OFF_LINK_TOK_AGG_THRESHOLD_START_BIT_VER1 = 18;
+const uint32_t PB_SCONFIG_WE5_X_OFF_LINK_TOK_AGG_THRESHOLD_END_BIT_VER1 = 21;
+const uint32_t PB_SCONFIG_WE5_A_LINK_TOK_AGG_THRESHOLD_START_BIT_VER1 = 22;
+const uint32_t PB_SCONFIG_WE5_A_LINK_TOK_AGG_THRESHOLD_END_BIT_VER1 = 25;
+const uint32_t PB_SCONFIG_WE5_F_LINK_TOK_AGG_THRESHOLD_START_BIT_VER1 = 26;
+const uint32_t PB_SCONFIG_WE5_F_LINK_TOK_AGG_THRESHOLD_END_BIT_VER1 = 29;
+const uint32_t PB_SCONFIG_WE5_A_LINK_TOK_IND_THRESHOLD_START_BIT_VER1 = 30;
+const uint32_t PB_SCONFIG_WE5_A_LINK_TOK_IND_THRESHOLD_END_BIT_VER1 = 33;
+const uint32_t PB_SCONFIG_WE5_PASSTHRU_ENABLE_BIT_VER1 = 34;
+const uint32_t PB_SCONFIG_WE5_PASSTHRU_X_PRIORITY_START_BIT_VER1 = 35;
+const uint32_t PB_SCONFIG_WE5_PASSTHRU_X_PRIORITY_END_BIT_VER1 = 42;
+const uint32_t PB_SCONFIG_WE5_PASSTHRU_A_PRIORITY_START_BIT_VER1 = 43;
+const uint32_t PB_SCONFIG_WE5_PASSTHRU_A_PRIORITY_END_BIT_VER1 = 50;
+const uint32_t PB_SCONFIG_WE5_A_TOK_INIT_START_BIT_VER1 = 51;
+const uint32_t PB_SCONFIG_WE5_A_TOK_INIT_END_BIT_VER1 = 54;
+const uint32_t PB_SCONFIG_WE5_F_TOK_INIT_START_BIT_VER1 = 55;
+const uint32_t PB_SCONFIG_WE5_F_TOK_INIT_END_BIT_VER1 = 58;
+const uint32_t PB_SCONFIG_WE5_EM_FP_ENABLE_BIT_VER1 = 59;
+const uint32_t PB_SCONFIG_WE5_SPARE_START_BIT_VER1 = 60;
+const uint32_t PB_SCONFIG_WE5_SPARE_END_BIT_VER1 = 61;
+const uint32_t PB_SCONFIG_WE5_MEM_STV_PRIORITY_START_BIT_VER1 = 62;
+const uint32_t PB_SCONFIG_WE5_MEM_STV_PRIORITY_END_BIT_VER1 = 63;
+
+const uint32_t PB_SCONFIG_WE5_LOCK_ON_LINKS_BIT_VER2 = 12;
+const uint32_t PB_SCONFIG_WE5_X_ON_LINK_TOK_AGG_THRESHOLD_START_BIT_VER2 = 13;
+const uint32_t PB_SCONFIG_WE5_X_ON_LINK_TOK_AGG_THRESHOLD_END_BIT_VER2 = 16;
+const uint32_t PB_SCONFIG_WE5_X_OFF_LINK_TOK_AGG_THRESHOLD_START_BIT_VER2 = 17;
+const uint32_t PB_SCONFIG_WE5_X_OFF_LINK_TOK_AGG_THRESHOLD_END_BIT_VER2 = 20;
+const uint32_t PB_SCONFIG_WE5_A_LINK_TOK_AGG_THRESHOLD_START_BIT_VER2 = 21;
+const uint32_t PB_SCONFIG_WE5_A_LINK_TOK_AGG_THRESHOLD_END_BIT_VER2 = 24;
+const uint32_t PB_SCONFIG_WE5_F_LINK_TOK_AGG_THRESHOLD_START_BIT_VER2 = 25;
+const uint32_t PB_SCONFIG_WE5_F_LINK_TOK_AGG_THRESHOLD_END_BIT_VER2 = 28;
+const uint32_t PB_SCONFIG_WE5_A_LINK_TOK_IND_THRESHOLD_START_BIT_VER2 = 29;
+const uint32_t PB_SCONFIG_WE5_A_LINK_TOK_IND_THRESHOLD_END_BIT_VER2 = 32;
+const uint32_t PB_SCONFIG_WE5_PASSTHRU_ENABLE_BIT_VER2 = 33;
+const uint32_t PB_SCONFIG_WE5_PASSTHRU_X_PRIORITY_START_BIT_VER2 = 34;
+const uint32_t PB_SCONFIG_WE5_PASSTHRU_X_PRIORITY_END_BIT_VER2 = 41;
+const uint32_t PB_SCONFIG_WE5_PASSTHRU_A_PRIORITY_START_BIT_VER2 = 42;
+const uint32_t PB_SCONFIG_WE5_PASSTHRU_A_PRIORITY_END_BIT_VER2 = 49;
+const uint32_t PB_SCONFIG_WE5_A_TOK_INIT_START_BIT_VER2 = 50;
+const uint32_t PB_SCONFIG_WE5_A_TOK_INIT_END_BIT_VER2 = 53;
+const uint32_t PB_SCONFIG_WE5_F_TOK_INIT_START_BIT_VER2 = 54;
+const uint32_t PB_SCONFIG_WE5_F_TOK_INIT_END_BIT_VER2 = 57;
+const uint32_t PB_SCONFIG_WE5_EM_FP_ENABLE_BIT_VER2 = 58;
+const uint32_t PB_SCONFIG_WE5_SPARE_START_BIT_VER2 = 59;
+const uint32_t PB_SCONFIG_WE5_SPARE_END_BIT_VER2 = 59;
+const uint32_t PB_SCONFIG_WE5_A_IND_THRESHOLD_BIT_VER2 = 60;
+const uint32_t PB_SCONFIG_WE5_MEM_STV_PRIORITY_START_BIT_VER2 = 61;
+const uint32_t PB_SCONFIG_WE5_MEM_STV_PRIORITY_END_BIT_VER2 = 62;
+const uint32_t PB_SCONFIG_WE5_X_OFF_SEL_BIT_VER2 = 63;
 
 const bool    PB_SCONFIG_WE5_LOCK_ON_LINKS = true;                   // lock
 const uint8_t PB_SCONFIG_WE5_X_ON_LINK_TOK_AGG_THRESHOLD = 0x4;      // cnt_4
@@ -453,6 +482,8 @@ const bool    PB_SCONFIG_WE5_EM_FP_ENABLE = true;                    // enable
 const uint8_t PB_SCONFIG_WE5_SPARE = 0x0;                            // spare
 const uint8_t PB_SCONFIG_WE5_MEM_STV_PRIORITY = 0x2;                 // stv
 
+const uint8_t PB_SCONFIG_WE5_A_IND_THRESHOLD = 0x0;                  // gt4
+const uint8_t PB_SCONFIG_WE5_X_OFF_SEL = 0x0;                        // disable
 
 extern "C"
 {